Low Level Development

This document should provide you with a greater level of detail if you are trying to make changes to the operational functionality of the radar. If you are editing Verilog, C, or Python files that the radar uses to operate, this document is for you. If your goals are to operate the radar, see Reflect Array User Guide. If you are wanting to use the data produced by the radar, see Creating a Client Program.

This document gives a more detailed look at the details of how the whole thing fits together.

FPGA

The FPGA is responsible for external I/O, deterministic timing of events, filtering of the data, and waveform configuration.

  • external I/O
    • The FPGA transmits and receives to/from the AD9361 using its digital interface.
    • The FPGA sends out a trigger for an external amplifier
    • The MIO pins must be configured appropriately for various devices (AD9361, clock chip, UDC LO)
    • Some pins control AD9361 enable/disable state, reset state, and
  • deterministic timing
    • Rx time gating: validates Rx data for only certain periods
    • Tx amplifier trigger
    • PRT
  • data filtering
    • The FPGA has two data paths. One goes through a complex FIR filter which decimates the data by 6. The other does no filtering on the data.
    • The FIR filters can be set up as a matched filter, using up to 1176 coefficients.
    • The data rate without going through the FIR filters is 240 MB/s. Going through the FIR filters reduces it to 40 MB/s, which a 1Gb ethernet link can handle.
  • DMA core for moving data into the PS
  • Sending interrupts for initiating DMA transfers.

Software

The software is responsible for configuring all the hardware (including the FPGA), processing the radar data, and providing a user interface.

Processes

The MicroZed and processing computer start several processes, which are managed by a wni.processes.ProcessManager. The process manager can start and stop the processes it controls and check the status of its child processes. The process manager also exposes a Nano Message interface for asking it the status of its children. The processes started on the MicroZed are started by the module wni.scripts.uzpm. The processes started on the processing computer are started by the module wni.scripts.pcpm.

Several aliases in bash are set up for quickly checking on the status of all the processes which are running. The command uzpm lists the processes running on the MicroZed. The command pcpm lists the processes running on the processing computer.

The processes can be individually stopped and started. This is useful when making changes that affect only one process and not wanting to restart everything. All the client aliases are defined in sw/scripts/procman.sh. This file is sourced by default on the MicroZed, so all the aliases are available.

DMA Notes

One of the most important role of the MicroZed is to configure the DMA to get data from the FPGA to be accessible to the processor. This is done by writing a slave DMA driver to ensure that data flows smoothly. During a scan, the FPGA sends an interrupt at the first of every N pulses, where N is configured by writing a register in the FPGA. The interrupt handler in the kernel driver initiates a DMA transfer. The length of the transfer is determined by The number of pulses, the rx_length register, and whether the FIR filters are enabled. Whenever the DMA transfer is completed, the processor receives an interrupt from the Xilinx DMA core, and our client driver notifies userspace that more data is ready.

If you’re changing anything on the Rx data path in the FPGA, be prepared to change the kernel driver code as well.