# This file was automatically generated by SWIG (http://www.swig.org).
# Version 3.0.8
#
# Do not make changes to this file unless you know what you are doing--modify
# the SWIG interface file instead.
from sys import version_info
if version_info >= (2, 6, 0):
def swig_import_helper():
from os.path import dirname
import imp
fp = None
try:
fp, pathname, description = imp.find_module('_ad9361_swig', [dirname(__file__)])
except ImportError:
import _ad9361_swig
return _ad9361_swig
if fp is not None:
try:
_mod = imp.load_module('_ad9361_swig', fp, pathname, description)
finally:
fp.close()
return _mod
_ad9361_swig = swig_import_helper()
del swig_import_helper
else:
import _ad9361_swig
del version_info
try:
_swig_property = property
except NameError:
pass # Python < 2.2 doesn't have 'property'.
def _swig_setattr_nondynamic(self, class_type, name, value, static=1):
if (name == "thisown"):
return self.this.own(value)
if (name == "this"):
if type(value).__name__ == 'SwigPyObject':
self.__dict__[name] = value
return
method = class_type.__swig_setmethods__.get(name, None)
if method:
return method(self, value)
if (not static):
if _newclass:
object.__setattr__(self, name, value)
else:
self.__dict__[name] = value
else:
raise AttributeError("You cannot add attributes to %s" % self)
def _swig_setattr(self, class_type, name, value):
return _swig_setattr_nondynamic(self, class_type, name, value, 0)
def _swig_getattr_nondynamic(self, class_type, name, static=1):
if (name == "thisown"):
return self.this.own()
method = class_type.__swig_getmethods__.get(name, None)
if method:
return method(self)
if (not static):
return object.__getattr__(self, name)
else:
raise AttributeError(name)
def _swig_getattr(self, class_type, name):
return _swig_getattr_nondynamic(self, class_type, name, 0)
def _swig_repr(self):
try:
strthis = "proxy of " + self.this.__repr__()
except Exception:
strthis = ""
return "<%s.%s; %s >" % (self.__class__.__module__, self.__class__.__name__, strthis,)
try:
_object = object
_newclass = 1
except AttributeError:
class _object:
pass
_newclass = 0
[docs]class AD9361_InitParam(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, AD9361_InitParam, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, AD9361_InitParam, name)
__repr__ = _swig_repr
__swig_setmethods__["id_no"] = _ad9361_swig.AD9361_InitParam_id_no_set
__swig_getmethods__["id_no"] = _ad9361_swig.AD9361_InitParam_id_no_get
if _newclass:
id_no = _swig_property(_ad9361_swig.AD9361_InitParam_id_no_get, _ad9361_swig.AD9361_InitParam_id_no_set)
__swig_setmethods__["reference_clk_rate"] = _ad9361_swig.AD9361_InitParam_reference_clk_rate_set
__swig_getmethods__["reference_clk_rate"] = _ad9361_swig.AD9361_InitParam_reference_clk_rate_get
if _newclass:
reference_clk_rate = _swig_property(_ad9361_swig.AD9361_InitParam_reference_clk_rate_get, _ad9361_swig.AD9361_InitParam_reference_clk_rate_set)
__swig_setmethods__["two_rx_two_tx_mode_enable"] = _ad9361_swig.AD9361_InitParam_two_rx_two_tx_mode_enable_set
__swig_getmethods__["two_rx_two_tx_mode_enable"] = _ad9361_swig.AD9361_InitParam_two_rx_two_tx_mode_enable_get
if _newclass:
two_rx_two_tx_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_two_rx_two_tx_mode_enable_get, _ad9361_swig.AD9361_InitParam_two_rx_two_tx_mode_enable_set)
__swig_setmethods__["one_rx_one_tx_mode_use_rx_num"] = _ad9361_swig.AD9361_InitParam_one_rx_one_tx_mode_use_rx_num_set
__swig_getmethods__["one_rx_one_tx_mode_use_rx_num"] = _ad9361_swig.AD9361_InitParam_one_rx_one_tx_mode_use_rx_num_get
if _newclass:
one_rx_one_tx_mode_use_rx_num = _swig_property(_ad9361_swig.AD9361_InitParam_one_rx_one_tx_mode_use_rx_num_get, _ad9361_swig.AD9361_InitParam_one_rx_one_tx_mode_use_rx_num_set)
__swig_setmethods__["one_rx_one_tx_mode_use_tx_num"] = _ad9361_swig.AD9361_InitParam_one_rx_one_tx_mode_use_tx_num_set
__swig_getmethods__["one_rx_one_tx_mode_use_tx_num"] = _ad9361_swig.AD9361_InitParam_one_rx_one_tx_mode_use_tx_num_get
if _newclass:
one_rx_one_tx_mode_use_tx_num = _swig_property(_ad9361_swig.AD9361_InitParam_one_rx_one_tx_mode_use_tx_num_get, _ad9361_swig.AD9361_InitParam_one_rx_one_tx_mode_use_tx_num_set)
__swig_setmethods__["frequency_division_duplex_mode_enable"] = _ad9361_swig.AD9361_InitParam_frequency_division_duplex_mode_enable_set
__swig_getmethods__["frequency_division_duplex_mode_enable"] = _ad9361_swig.AD9361_InitParam_frequency_division_duplex_mode_enable_get
if _newclass:
frequency_division_duplex_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_frequency_division_duplex_mode_enable_get, _ad9361_swig.AD9361_InitParam_frequency_division_duplex_mode_enable_set)
__swig_setmethods__["frequency_division_duplex_independent_mode_enable"] = _ad9361_swig.AD9361_InitParam_frequency_division_duplex_independent_mode_enable_set
__swig_getmethods__["frequency_division_duplex_independent_mode_enable"] = _ad9361_swig.AD9361_InitParam_frequency_division_duplex_independent_mode_enable_get
if _newclass:
frequency_division_duplex_independent_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_frequency_division_duplex_independent_mode_enable_get, _ad9361_swig.AD9361_InitParam_frequency_division_duplex_independent_mode_enable_set)
__swig_setmethods__["tdd_use_dual_synth_mode_enable"] = _ad9361_swig.AD9361_InitParam_tdd_use_dual_synth_mode_enable_set
__swig_getmethods__["tdd_use_dual_synth_mode_enable"] = _ad9361_swig.AD9361_InitParam_tdd_use_dual_synth_mode_enable_get
if _newclass:
tdd_use_dual_synth_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_tdd_use_dual_synth_mode_enable_get, _ad9361_swig.AD9361_InitParam_tdd_use_dual_synth_mode_enable_set)
__swig_setmethods__["tdd_skip_vco_cal_enable"] = _ad9361_swig.AD9361_InitParam_tdd_skip_vco_cal_enable_set
__swig_getmethods__["tdd_skip_vco_cal_enable"] = _ad9361_swig.AD9361_InitParam_tdd_skip_vco_cal_enable_get
if _newclass:
tdd_skip_vco_cal_enable = _swig_property(_ad9361_swig.AD9361_InitParam_tdd_skip_vco_cal_enable_get, _ad9361_swig.AD9361_InitParam_tdd_skip_vco_cal_enable_set)
__swig_setmethods__["tx_fastlock_delay_ns"] = _ad9361_swig.AD9361_InitParam_tx_fastlock_delay_ns_set
__swig_getmethods__["tx_fastlock_delay_ns"] = _ad9361_swig.AD9361_InitParam_tx_fastlock_delay_ns_get
if _newclass:
tx_fastlock_delay_ns = _swig_property(_ad9361_swig.AD9361_InitParam_tx_fastlock_delay_ns_get, _ad9361_swig.AD9361_InitParam_tx_fastlock_delay_ns_set)
__swig_setmethods__["rx_fastlock_delay_ns"] = _ad9361_swig.AD9361_InitParam_rx_fastlock_delay_ns_set
__swig_getmethods__["rx_fastlock_delay_ns"] = _ad9361_swig.AD9361_InitParam_rx_fastlock_delay_ns_get
if _newclass:
rx_fastlock_delay_ns = _swig_property(_ad9361_swig.AD9361_InitParam_rx_fastlock_delay_ns_get, _ad9361_swig.AD9361_InitParam_rx_fastlock_delay_ns_set)
__swig_setmethods__["rx_fastlock_pincontrol_enable"] = _ad9361_swig.AD9361_InitParam_rx_fastlock_pincontrol_enable_set
__swig_getmethods__["rx_fastlock_pincontrol_enable"] = _ad9361_swig.AD9361_InitParam_rx_fastlock_pincontrol_enable_get
if _newclass:
rx_fastlock_pincontrol_enable = _swig_property(_ad9361_swig.AD9361_InitParam_rx_fastlock_pincontrol_enable_get, _ad9361_swig.AD9361_InitParam_rx_fastlock_pincontrol_enable_set)
__swig_setmethods__["tx_fastlock_pincontrol_enable"] = _ad9361_swig.AD9361_InitParam_tx_fastlock_pincontrol_enable_set
__swig_getmethods__["tx_fastlock_pincontrol_enable"] = _ad9361_swig.AD9361_InitParam_tx_fastlock_pincontrol_enable_get
if _newclass:
tx_fastlock_pincontrol_enable = _swig_property(_ad9361_swig.AD9361_InitParam_tx_fastlock_pincontrol_enable_get, _ad9361_swig.AD9361_InitParam_tx_fastlock_pincontrol_enable_set)
__swig_setmethods__["external_rx_lo_enable"] = _ad9361_swig.AD9361_InitParam_external_rx_lo_enable_set
__swig_getmethods__["external_rx_lo_enable"] = _ad9361_swig.AD9361_InitParam_external_rx_lo_enable_get
if _newclass:
external_rx_lo_enable = _swig_property(_ad9361_swig.AD9361_InitParam_external_rx_lo_enable_get, _ad9361_swig.AD9361_InitParam_external_rx_lo_enable_set)
__swig_setmethods__["external_tx_lo_enable"] = _ad9361_swig.AD9361_InitParam_external_tx_lo_enable_set
__swig_getmethods__["external_tx_lo_enable"] = _ad9361_swig.AD9361_InitParam_external_tx_lo_enable_get
if _newclass:
external_tx_lo_enable = _swig_property(_ad9361_swig.AD9361_InitParam_external_tx_lo_enable_get, _ad9361_swig.AD9361_InitParam_external_tx_lo_enable_set)
__swig_setmethods__["dc_offset_tracking_update_event_mask"] = _ad9361_swig.AD9361_InitParam_dc_offset_tracking_update_event_mask_set
__swig_getmethods__["dc_offset_tracking_update_event_mask"] = _ad9361_swig.AD9361_InitParam_dc_offset_tracking_update_event_mask_get
if _newclass:
dc_offset_tracking_update_event_mask = _swig_property(_ad9361_swig.AD9361_InitParam_dc_offset_tracking_update_event_mask_get, _ad9361_swig.AD9361_InitParam_dc_offset_tracking_update_event_mask_set)
__swig_setmethods__["dc_offset_attenuation_high_range"] = _ad9361_swig.AD9361_InitParam_dc_offset_attenuation_high_range_set
__swig_getmethods__["dc_offset_attenuation_high_range"] = _ad9361_swig.AD9361_InitParam_dc_offset_attenuation_high_range_get
if _newclass:
dc_offset_attenuation_high_range = _swig_property(_ad9361_swig.AD9361_InitParam_dc_offset_attenuation_high_range_get, _ad9361_swig.AD9361_InitParam_dc_offset_attenuation_high_range_set)
__swig_setmethods__["dc_offset_attenuation_low_range"] = _ad9361_swig.AD9361_InitParam_dc_offset_attenuation_low_range_set
__swig_getmethods__["dc_offset_attenuation_low_range"] = _ad9361_swig.AD9361_InitParam_dc_offset_attenuation_low_range_get
if _newclass:
dc_offset_attenuation_low_range = _swig_property(_ad9361_swig.AD9361_InitParam_dc_offset_attenuation_low_range_get, _ad9361_swig.AD9361_InitParam_dc_offset_attenuation_low_range_set)
__swig_setmethods__["dc_offset_count_high_range"] = _ad9361_swig.AD9361_InitParam_dc_offset_count_high_range_set
__swig_getmethods__["dc_offset_count_high_range"] = _ad9361_swig.AD9361_InitParam_dc_offset_count_high_range_get
if _newclass:
dc_offset_count_high_range = _swig_property(_ad9361_swig.AD9361_InitParam_dc_offset_count_high_range_get, _ad9361_swig.AD9361_InitParam_dc_offset_count_high_range_set)
__swig_setmethods__["dc_offset_count_low_range"] = _ad9361_swig.AD9361_InitParam_dc_offset_count_low_range_set
__swig_getmethods__["dc_offset_count_low_range"] = _ad9361_swig.AD9361_InitParam_dc_offset_count_low_range_get
if _newclass:
dc_offset_count_low_range = _swig_property(_ad9361_swig.AD9361_InitParam_dc_offset_count_low_range_get, _ad9361_swig.AD9361_InitParam_dc_offset_count_low_range_set)
__swig_setmethods__["tdd_use_fdd_vco_tables_enable"] = _ad9361_swig.AD9361_InitParam_tdd_use_fdd_vco_tables_enable_set
__swig_getmethods__["tdd_use_fdd_vco_tables_enable"] = _ad9361_swig.AD9361_InitParam_tdd_use_fdd_vco_tables_enable_get
if _newclass:
tdd_use_fdd_vco_tables_enable = _swig_property(_ad9361_swig.AD9361_InitParam_tdd_use_fdd_vco_tables_enable_get, _ad9361_swig.AD9361_InitParam_tdd_use_fdd_vco_tables_enable_set)
__swig_setmethods__["split_gain_table_mode_enable"] = _ad9361_swig.AD9361_InitParam_split_gain_table_mode_enable_set
__swig_getmethods__["split_gain_table_mode_enable"] = _ad9361_swig.AD9361_InitParam_split_gain_table_mode_enable_get
if _newclass:
split_gain_table_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_split_gain_table_mode_enable_get, _ad9361_swig.AD9361_InitParam_split_gain_table_mode_enable_set)
__swig_setmethods__["trx_synthesizer_target_fref_overwrite_hz"] = _ad9361_swig.AD9361_InitParam_trx_synthesizer_target_fref_overwrite_hz_set
__swig_getmethods__["trx_synthesizer_target_fref_overwrite_hz"] = _ad9361_swig.AD9361_InitParam_trx_synthesizer_target_fref_overwrite_hz_get
if _newclass:
trx_synthesizer_target_fref_overwrite_hz = _swig_property(_ad9361_swig.AD9361_InitParam_trx_synthesizer_target_fref_overwrite_hz_get, _ad9361_swig.AD9361_InitParam_trx_synthesizer_target_fref_overwrite_hz_set)
__swig_setmethods__["qec_tracking_slow_mode_enable"] = _ad9361_swig.AD9361_InitParam_qec_tracking_slow_mode_enable_set
__swig_getmethods__["qec_tracking_slow_mode_enable"] = _ad9361_swig.AD9361_InitParam_qec_tracking_slow_mode_enable_get
if _newclass:
qec_tracking_slow_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_qec_tracking_slow_mode_enable_get, _ad9361_swig.AD9361_InitParam_qec_tracking_slow_mode_enable_set)
__swig_setmethods__["ensm_enable_pin_pulse_mode_enable"] = _ad9361_swig.AD9361_InitParam_ensm_enable_pin_pulse_mode_enable_set
__swig_getmethods__["ensm_enable_pin_pulse_mode_enable"] = _ad9361_swig.AD9361_InitParam_ensm_enable_pin_pulse_mode_enable_get
if _newclass:
ensm_enable_pin_pulse_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_ensm_enable_pin_pulse_mode_enable_get, _ad9361_swig.AD9361_InitParam_ensm_enable_pin_pulse_mode_enable_set)
__swig_setmethods__["ensm_enable_txnrx_control_enable"] = _ad9361_swig.AD9361_InitParam_ensm_enable_txnrx_control_enable_set
__swig_getmethods__["ensm_enable_txnrx_control_enable"] = _ad9361_swig.AD9361_InitParam_ensm_enable_txnrx_control_enable_get
if _newclass:
ensm_enable_txnrx_control_enable = _swig_property(_ad9361_swig.AD9361_InitParam_ensm_enable_txnrx_control_enable_get, _ad9361_swig.AD9361_InitParam_ensm_enable_txnrx_control_enable_set)
__swig_setmethods__["rx_synthesizer_frequency_hz"] = _ad9361_swig.AD9361_InitParam_rx_synthesizer_frequency_hz_set
__swig_getmethods__["rx_synthesizer_frequency_hz"] = _ad9361_swig.AD9361_InitParam_rx_synthesizer_frequency_hz_get
if _newclass:
rx_synthesizer_frequency_hz = _swig_property(_ad9361_swig.AD9361_InitParam_rx_synthesizer_frequency_hz_get, _ad9361_swig.AD9361_InitParam_rx_synthesizer_frequency_hz_set)
__swig_setmethods__["tx_synthesizer_frequency_hz"] = _ad9361_swig.AD9361_InitParam_tx_synthesizer_frequency_hz_set
__swig_getmethods__["tx_synthesizer_frequency_hz"] = _ad9361_swig.AD9361_InitParam_tx_synthesizer_frequency_hz_get
if _newclass:
tx_synthesizer_frequency_hz = _swig_property(_ad9361_swig.AD9361_InitParam_tx_synthesizer_frequency_hz_get, _ad9361_swig.AD9361_InitParam_tx_synthesizer_frequency_hz_set)
__swig_setmethods__["rx_path_clock_frequencies"] = _ad9361_swig.AD9361_InitParam_rx_path_clock_frequencies_set
__swig_getmethods__["rx_path_clock_frequencies"] = _ad9361_swig.AD9361_InitParam_rx_path_clock_frequencies_get
if _newclass:
rx_path_clock_frequencies = _swig_property(_ad9361_swig.AD9361_InitParam_rx_path_clock_frequencies_get, _ad9361_swig.AD9361_InitParam_rx_path_clock_frequencies_set)
__swig_setmethods__["tx_path_clock_frequencies"] = _ad9361_swig.AD9361_InitParam_tx_path_clock_frequencies_set
__swig_getmethods__["tx_path_clock_frequencies"] = _ad9361_swig.AD9361_InitParam_tx_path_clock_frequencies_get
if _newclass:
tx_path_clock_frequencies = _swig_property(_ad9361_swig.AD9361_InitParam_tx_path_clock_frequencies_get, _ad9361_swig.AD9361_InitParam_tx_path_clock_frequencies_set)
__swig_setmethods__["rf_rx_bandwidth_hz"] = _ad9361_swig.AD9361_InitParam_rf_rx_bandwidth_hz_set
__swig_getmethods__["rf_rx_bandwidth_hz"] = _ad9361_swig.AD9361_InitParam_rf_rx_bandwidth_hz_get
if _newclass:
rf_rx_bandwidth_hz = _swig_property(_ad9361_swig.AD9361_InitParam_rf_rx_bandwidth_hz_get, _ad9361_swig.AD9361_InitParam_rf_rx_bandwidth_hz_set)
__swig_setmethods__["rf_tx_bandwidth_hz"] = _ad9361_swig.AD9361_InitParam_rf_tx_bandwidth_hz_set
__swig_getmethods__["rf_tx_bandwidth_hz"] = _ad9361_swig.AD9361_InitParam_rf_tx_bandwidth_hz_get
if _newclass:
rf_tx_bandwidth_hz = _swig_property(_ad9361_swig.AD9361_InitParam_rf_tx_bandwidth_hz_get, _ad9361_swig.AD9361_InitParam_rf_tx_bandwidth_hz_set)
__swig_setmethods__["rx_rf_port_input_select"] = _ad9361_swig.AD9361_InitParam_rx_rf_port_input_select_set
__swig_getmethods__["rx_rf_port_input_select"] = _ad9361_swig.AD9361_InitParam_rx_rf_port_input_select_get
if _newclass:
rx_rf_port_input_select = _swig_property(_ad9361_swig.AD9361_InitParam_rx_rf_port_input_select_get, _ad9361_swig.AD9361_InitParam_rx_rf_port_input_select_set)
__swig_setmethods__["tx_rf_port_input_select"] = _ad9361_swig.AD9361_InitParam_tx_rf_port_input_select_set
__swig_getmethods__["tx_rf_port_input_select"] = _ad9361_swig.AD9361_InitParam_tx_rf_port_input_select_get
if _newclass:
tx_rf_port_input_select = _swig_property(_ad9361_swig.AD9361_InitParam_tx_rf_port_input_select_get, _ad9361_swig.AD9361_InitParam_tx_rf_port_input_select_set)
__swig_setmethods__["tx_attenuation_mdB"] = _ad9361_swig.AD9361_InitParam_tx_attenuation_mdB_set
__swig_getmethods__["tx_attenuation_mdB"] = _ad9361_swig.AD9361_InitParam_tx_attenuation_mdB_get
if _newclass:
tx_attenuation_mdB = _swig_property(_ad9361_swig.AD9361_InitParam_tx_attenuation_mdB_get, _ad9361_swig.AD9361_InitParam_tx_attenuation_mdB_set)
__swig_setmethods__["update_tx_gain_in_alert_enable"] = _ad9361_swig.AD9361_InitParam_update_tx_gain_in_alert_enable_set
__swig_getmethods__["update_tx_gain_in_alert_enable"] = _ad9361_swig.AD9361_InitParam_update_tx_gain_in_alert_enable_get
if _newclass:
update_tx_gain_in_alert_enable = _swig_property(_ad9361_swig.AD9361_InitParam_update_tx_gain_in_alert_enable_get, _ad9361_swig.AD9361_InitParam_update_tx_gain_in_alert_enable_set)
__swig_setmethods__["xo_disable_use_ext_refclk_enable"] = _ad9361_swig.AD9361_InitParam_xo_disable_use_ext_refclk_enable_set
__swig_getmethods__["xo_disable_use_ext_refclk_enable"] = _ad9361_swig.AD9361_InitParam_xo_disable_use_ext_refclk_enable_get
if _newclass:
xo_disable_use_ext_refclk_enable = _swig_property(_ad9361_swig.AD9361_InitParam_xo_disable_use_ext_refclk_enable_get, _ad9361_swig.AD9361_InitParam_xo_disable_use_ext_refclk_enable_set)
__swig_setmethods__["dcxo_coarse_and_fine_tune"] = _ad9361_swig.AD9361_InitParam_dcxo_coarse_and_fine_tune_set
__swig_getmethods__["dcxo_coarse_and_fine_tune"] = _ad9361_swig.AD9361_InitParam_dcxo_coarse_and_fine_tune_get
if _newclass:
dcxo_coarse_and_fine_tune = _swig_property(_ad9361_swig.AD9361_InitParam_dcxo_coarse_and_fine_tune_get, _ad9361_swig.AD9361_InitParam_dcxo_coarse_and_fine_tune_set)
__swig_setmethods__["clk_output_mode_select"] = _ad9361_swig.AD9361_InitParam_clk_output_mode_select_set
__swig_getmethods__["clk_output_mode_select"] = _ad9361_swig.AD9361_InitParam_clk_output_mode_select_get
if _newclass:
clk_output_mode_select = _swig_property(_ad9361_swig.AD9361_InitParam_clk_output_mode_select_get, _ad9361_swig.AD9361_InitParam_clk_output_mode_select_set)
__swig_setmethods__["gc_rx1_mode"] = _ad9361_swig.AD9361_InitParam_gc_rx1_mode_set
__swig_getmethods__["gc_rx1_mode"] = _ad9361_swig.AD9361_InitParam_gc_rx1_mode_get
if _newclass:
gc_rx1_mode = _swig_property(_ad9361_swig.AD9361_InitParam_gc_rx1_mode_get, _ad9361_swig.AD9361_InitParam_gc_rx1_mode_set)
__swig_setmethods__["gc_rx2_mode"] = _ad9361_swig.AD9361_InitParam_gc_rx2_mode_set
__swig_getmethods__["gc_rx2_mode"] = _ad9361_swig.AD9361_InitParam_gc_rx2_mode_get
if _newclass:
gc_rx2_mode = _swig_property(_ad9361_swig.AD9361_InitParam_gc_rx2_mode_get, _ad9361_swig.AD9361_InitParam_gc_rx2_mode_set)
__swig_setmethods__["gc_adc_large_overload_thresh"] = _ad9361_swig.AD9361_InitParam_gc_adc_large_overload_thresh_set
__swig_getmethods__["gc_adc_large_overload_thresh"] = _ad9361_swig.AD9361_InitParam_gc_adc_large_overload_thresh_get
if _newclass:
gc_adc_large_overload_thresh = _swig_property(_ad9361_swig.AD9361_InitParam_gc_adc_large_overload_thresh_get, _ad9361_swig.AD9361_InitParam_gc_adc_large_overload_thresh_set)
__swig_setmethods__["gc_adc_ovr_sample_size"] = _ad9361_swig.AD9361_InitParam_gc_adc_ovr_sample_size_set
__swig_getmethods__["gc_adc_ovr_sample_size"] = _ad9361_swig.AD9361_InitParam_gc_adc_ovr_sample_size_get
if _newclass:
gc_adc_ovr_sample_size = _swig_property(_ad9361_swig.AD9361_InitParam_gc_adc_ovr_sample_size_get, _ad9361_swig.AD9361_InitParam_gc_adc_ovr_sample_size_set)
__swig_setmethods__["gc_adc_small_overload_thresh"] = _ad9361_swig.AD9361_InitParam_gc_adc_small_overload_thresh_set
__swig_getmethods__["gc_adc_small_overload_thresh"] = _ad9361_swig.AD9361_InitParam_gc_adc_small_overload_thresh_get
if _newclass:
gc_adc_small_overload_thresh = _swig_property(_ad9361_swig.AD9361_InitParam_gc_adc_small_overload_thresh_get, _ad9361_swig.AD9361_InitParam_gc_adc_small_overload_thresh_set)
__swig_setmethods__["gc_dec_pow_measurement_duration"] = _ad9361_swig.AD9361_InitParam_gc_dec_pow_measurement_duration_set
__swig_getmethods__["gc_dec_pow_measurement_duration"] = _ad9361_swig.AD9361_InitParam_gc_dec_pow_measurement_duration_get
if _newclass:
gc_dec_pow_measurement_duration = _swig_property(_ad9361_swig.AD9361_InitParam_gc_dec_pow_measurement_duration_get, _ad9361_swig.AD9361_InitParam_gc_dec_pow_measurement_duration_set)
__swig_setmethods__["gc_dig_gain_enable"] = _ad9361_swig.AD9361_InitParam_gc_dig_gain_enable_set
__swig_getmethods__["gc_dig_gain_enable"] = _ad9361_swig.AD9361_InitParam_gc_dig_gain_enable_get
if _newclass:
gc_dig_gain_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gc_dig_gain_enable_get, _ad9361_swig.AD9361_InitParam_gc_dig_gain_enable_set)
__swig_setmethods__["gc_lmt_overload_high_thresh"] = _ad9361_swig.AD9361_InitParam_gc_lmt_overload_high_thresh_set
__swig_getmethods__["gc_lmt_overload_high_thresh"] = _ad9361_swig.AD9361_InitParam_gc_lmt_overload_high_thresh_get
if _newclass:
gc_lmt_overload_high_thresh = _swig_property(_ad9361_swig.AD9361_InitParam_gc_lmt_overload_high_thresh_get, _ad9361_swig.AD9361_InitParam_gc_lmt_overload_high_thresh_set)
__swig_setmethods__["gc_lmt_overload_low_thresh"] = _ad9361_swig.AD9361_InitParam_gc_lmt_overload_low_thresh_set
__swig_getmethods__["gc_lmt_overload_low_thresh"] = _ad9361_swig.AD9361_InitParam_gc_lmt_overload_low_thresh_get
if _newclass:
gc_lmt_overload_low_thresh = _swig_property(_ad9361_swig.AD9361_InitParam_gc_lmt_overload_low_thresh_get, _ad9361_swig.AD9361_InitParam_gc_lmt_overload_low_thresh_set)
__swig_setmethods__["gc_low_power_thresh"] = _ad9361_swig.AD9361_InitParam_gc_low_power_thresh_set
__swig_getmethods__["gc_low_power_thresh"] = _ad9361_swig.AD9361_InitParam_gc_low_power_thresh_get
if _newclass:
gc_low_power_thresh = _swig_property(_ad9361_swig.AD9361_InitParam_gc_low_power_thresh_get, _ad9361_swig.AD9361_InitParam_gc_low_power_thresh_set)
__swig_setmethods__["gc_max_dig_gain"] = _ad9361_swig.AD9361_InitParam_gc_max_dig_gain_set
__swig_getmethods__["gc_max_dig_gain"] = _ad9361_swig.AD9361_InitParam_gc_max_dig_gain_get
if _newclass:
gc_max_dig_gain = _swig_property(_ad9361_swig.AD9361_InitParam_gc_max_dig_gain_get, _ad9361_swig.AD9361_InitParam_gc_max_dig_gain_set)
__swig_setmethods__["mgc_dec_gain_step"] = _ad9361_swig.AD9361_InitParam_mgc_dec_gain_step_set
__swig_getmethods__["mgc_dec_gain_step"] = _ad9361_swig.AD9361_InitParam_mgc_dec_gain_step_get
if _newclass:
mgc_dec_gain_step = _swig_property(_ad9361_swig.AD9361_InitParam_mgc_dec_gain_step_get, _ad9361_swig.AD9361_InitParam_mgc_dec_gain_step_set)
__swig_setmethods__["mgc_inc_gain_step"] = _ad9361_swig.AD9361_InitParam_mgc_inc_gain_step_set
__swig_getmethods__["mgc_inc_gain_step"] = _ad9361_swig.AD9361_InitParam_mgc_inc_gain_step_get
if _newclass:
mgc_inc_gain_step = _swig_property(_ad9361_swig.AD9361_InitParam_mgc_inc_gain_step_get, _ad9361_swig.AD9361_InitParam_mgc_inc_gain_step_set)
__swig_setmethods__["mgc_rx1_ctrl_inp_enable"] = _ad9361_swig.AD9361_InitParam_mgc_rx1_ctrl_inp_enable_set
__swig_getmethods__["mgc_rx1_ctrl_inp_enable"] = _ad9361_swig.AD9361_InitParam_mgc_rx1_ctrl_inp_enable_get
if _newclass:
mgc_rx1_ctrl_inp_enable = _swig_property(_ad9361_swig.AD9361_InitParam_mgc_rx1_ctrl_inp_enable_get, _ad9361_swig.AD9361_InitParam_mgc_rx1_ctrl_inp_enable_set)
__swig_setmethods__["mgc_rx2_ctrl_inp_enable"] = _ad9361_swig.AD9361_InitParam_mgc_rx2_ctrl_inp_enable_set
__swig_getmethods__["mgc_rx2_ctrl_inp_enable"] = _ad9361_swig.AD9361_InitParam_mgc_rx2_ctrl_inp_enable_get
if _newclass:
mgc_rx2_ctrl_inp_enable = _swig_property(_ad9361_swig.AD9361_InitParam_mgc_rx2_ctrl_inp_enable_get, _ad9361_swig.AD9361_InitParam_mgc_rx2_ctrl_inp_enable_set)
__swig_setmethods__["mgc_split_table_ctrl_inp_gain_mode"] = _ad9361_swig.AD9361_InitParam_mgc_split_table_ctrl_inp_gain_mode_set
__swig_getmethods__["mgc_split_table_ctrl_inp_gain_mode"] = _ad9361_swig.AD9361_InitParam_mgc_split_table_ctrl_inp_gain_mode_get
if _newclass:
mgc_split_table_ctrl_inp_gain_mode = _swig_property(_ad9361_swig.AD9361_InitParam_mgc_split_table_ctrl_inp_gain_mode_get, _ad9361_swig.AD9361_InitParam_mgc_split_table_ctrl_inp_gain_mode_set)
__swig_setmethods__["agc_adc_large_overload_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_adc_large_overload_exceed_counter_set
__swig_getmethods__["agc_adc_large_overload_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_adc_large_overload_exceed_counter_get
if _newclass:
agc_adc_large_overload_exceed_counter = _swig_property(_ad9361_swig.AD9361_InitParam_agc_adc_large_overload_exceed_counter_get, _ad9361_swig.AD9361_InitParam_agc_adc_large_overload_exceed_counter_set)
__swig_setmethods__["agc_adc_large_overload_inc_steps"] = _ad9361_swig.AD9361_InitParam_agc_adc_large_overload_inc_steps_set
__swig_getmethods__["agc_adc_large_overload_inc_steps"] = _ad9361_swig.AD9361_InitParam_agc_adc_large_overload_inc_steps_get
if _newclass:
agc_adc_large_overload_inc_steps = _swig_property(_ad9361_swig.AD9361_InitParam_agc_adc_large_overload_inc_steps_get, _ad9361_swig.AD9361_InitParam_agc_adc_large_overload_inc_steps_set)
__swig_setmethods__["agc_adc_lmt_small_overload_prevent_gain_inc_enable"] = _ad9361_swig.AD9361_InitParam_agc_adc_lmt_small_overload_prevent_gain_inc_enable_set
__swig_getmethods__["agc_adc_lmt_small_overload_prevent_gain_inc_enable"] = _ad9361_swig.AD9361_InitParam_agc_adc_lmt_small_overload_prevent_gain_inc_enable_get
if _newclass:
agc_adc_lmt_small_overload_prevent_gain_inc_enable = _swig_property(_ad9361_swig.AD9361_InitParam_agc_adc_lmt_small_overload_prevent_gain_inc_enable_get, _ad9361_swig.AD9361_InitParam_agc_adc_lmt_small_overload_prevent_gain_inc_enable_set)
__swig_setmethods__["agc_adc_small_overload_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_adc_small_overload_exceed_counter_set
__swig_getmethods__["agc_adc_small_overload_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_adc_small_overload_exceed_counter_get
if _newclass:
agc_adc_small_overload_exceed_counter = _swig_property(_ad9361_swig.AD9361_InitParam_agc_adc_small_overload_exceed_counter_get, _ad9361_swig.AD9361_InitParam_agc_adc_small_overload_exceed_counter_set)
__swig_setmethods__["agc_dig_gain_step_size"] = _ad9361_swig.AD9361_InitParam_agc_dig_gain_step_size_set
__swig_getmethods__["agc_dig_gain_step_size"] = _ad9361_swig.AD9361_InitParam_agc_dig_gain_step_size_get
if _newclass:
agc_dig_gain_step_size = _swig_property(_ad9361_swig.AD9361_InitParam_agc_dig_gain_step_size_get, _ad9361_swig.AD9361_InitParam_agc_dig_gain_step_size_set)
__swig_setmethods__["agc_dig_saturation_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_dig_saturation_exceed_counter_set
__swig_getmethods__["agc_dig_saturation_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_dig_saturation_exceed_counter_get
if _newclass:
agc_dig_saturation_exceed_counter = _swig_property(_ad9361_swig.AD9361_InitParam_agc_dig_saturation_exceed_counter_get, _ad9361_swig.AD9361_InitParam_agc_dig_saturation_exceed_counter_set)
__swig_setmethods__["agc_gain_update_interval_us"] = _ad9361_swig.AD9361_InitParam_agc_gain_update_interval_us_set
__swig_getmethods__["agc_gain_update_interval_us"] = _ad9361_swig.AD9361_InitParam_agc_gain_update_interval_us_get
if _newclass:
agc_gain_update_interval_us = _swig_property(_ad9361_swig.AD9361_InitParam_agc_gain_update_interval_us_get, _ad9361_swig.AD9361_InitParam_agc_gain_update_interval_us_set)
__swig_setmethods__["agc_immed_gain_change_if_large_adc_overload_enable"] = _ad9361_swig.AD9361_InitParam_agc_immed_gain_change_if_large_adc_overload_enable_set
__swig_getmethods__["agc_immed_gain_change_if_large_adc_overload_enable"] = _ad9361_swig.AD9361_InitParam_agc_immed_gain_change_if_large_adc_overload_enable_get
if _newclass:
agc_immed_gain_change_if_large_adc_overload_enable = _swig_property(_ad9361_swig.AD9361_InitParam_agc_immed_gain_change_if_large_adc_overload_enable_get, _ad9361_swig.AD9361_InitParam_agc_immed_gain_change_if_large_adc_overload_enable_set)
__swig_setmethods__["agc_immed_gain_change_if_large_lmt_overload_enable"] = _ad9361_swig.AD9361_InitParam_agc_immed_gain_change_if_large_lmt_overload_enable_set
__swig_getmethods__["agc_immed_gain_change_if_large_lmt_overload_enable"] = _ad9361_swig.AD9361_InitParam_agc_immed_gain_change_if_large_lmt_overload_enable_get
if _newclass:
agc_immed_gain_change_if_large_lmt_overload_enable = _swig_property(_ad9361_swig.AD9361_InitParam_agc_immed_gain_change_if_large_lmt_overload_enable_get, _ad9361_swig.AD9361_InitParam_agc_immed_gain_change_if_large_lmt_overload_enable_set)
__swig_setmethods__["agc_inner_thresh_high"] = _ad9361_swig.AD9361_InitParam_agc_inner_thresh_high_set
__swig_getmethods__["agc_inner_thresh_high"] = _ad9361_swig.AD9361_InitParam_agc_inner_thresh_high_get
if _newclass:
agc_inner_thresh_high = _swig_property(_ad9361_swig.AD9361_InitParam_agc_inner_thresh_high_get, _ad9361_swig.AD9361_InitParam_agc_inner_thresh_high_set)
__swig_setmethods__["agc_inner_thresh_high_dec_steps"] = _ad9361_swig.AD9361_InitParam_agc_inner_thresh_high_dec_steps_set
__swig_getmethods__["agc_inner_thresh_high_dec_steps"] = _ad9361_swig.AD9361_InitParam_agc_inner_thresh_high_dec_steps_get
if _newclass:
agc_inner_thresh_high_dec_steps = _swig_property(_ad9361_swig.AD9361_InitParam_agc_inner_thresh_high_dec_steps_get, _ad9361_swig.AD9361_InitParam_agc_inner_thresh_high_dec_steps_set)
__swig_setmethods__["agc_inner_thresh_low"] = _ad9361_swig.AD9361_InitParam_agc_inner_thresh_low_set
__swig_getmethods__["agc_inner_thresh_low"] = _ad9361_swig.AD9361_InitParam_agc_inner_thresh_low_get
if _newclass:
agc_inner_thresh_low = _swig_property(_ad9361_swig.AD9361_InitParam_agc_inner_thresh_low_get, _ad9361_swig.AD9361_InitParam_agc_inner_thresh_low_set)
__swig_setmethods__["agc_inner_thresh_low_inc_steps"] = _ad9361_swig.AD9361_InitParam_agc_inner_thresh_low_inc_steps_set
__swig_getmethods__["agc_inner_thresh_low_inc_steps"] = _ad9361_swig.AD9361_InitParam_agc_inner_thresh_low_inc_steps_get
if _newclass:
agc_inner_thresh_low_inc_steps = _swig_property(_ad9361_swig.AD9361_InitParam_agc_inner_thresh_low_inc_steps_get, _ad9361_swig.AD9361_InitParam_agc_inner_thresh_low_inc_steps_set)
__swig_setmethods__["agc_lmt_overload_large_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_lmt_overload_large_exceed_counter_set
__swig_getmethods__["agc_lmt_overload_large_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_lmt_overload_large_exceed_counter_get
if _newclass:
agc_lmt_overload_large_exceed_counter = _swig_property(_ad9361_swig.AD9361_InitParam_agc_lmt_overload_large_exceed_counter_get, _ad9361_swig.AD9361_InitParam_agc_lmt_overload_large_exceed_counter_set)
__swig_setmethods__["agc_lmt_overload_large_inc_steps"] = _ad9361_swig.AD9361_InitParam_agc_lmt_overload_large_inc_steps_set
__swig_getmethods__["agc_lmt_overload_large_inc_steps"] = _ad9361_swig.AD9361_InitParam_agc_lmt_overload_large_inc_steps_get
if _newclass:
agc_lmt_overload_large_inc_steps = _swig_property(_ad9361_swig.AD9361_InitParam_agc_lmt_overload_large_inc_steps_get, _ad9361_swig.AD9361_InitParam_agc_lmt_overload_large_inc_steps_set)
__swig_setmethods__["agc_lmt_overload_small_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_lmt_overload_small_exceed_counter_set
__swig_getmethods__["agc_lmt_overload_small_exceed_counter"] = _ad9361_swig.AD9361_InitParam_agc_lmt_overload_small_exceed_counter_get
if _newclass:
agc_lmt_overload_small_exceed_counter = _swig_property(_ad9361_swig.AD9361_InitParam_agc_lmt_overload_small_exceed_counter_get, _ad9361_swig.AD9361_InitParam_agc_lmt_overload_small_exceed_counter_set)
__swig_setmethods__["agc_outer_thresh_high"] = _ad9361_swig.AD9361_InitParam_agc_outer_thresh_high_set
__swig_getmethods__["agc_outer_thresh_high"] = _ad9361_swig.AD9361_InitParam_agc_outer_thresh_high_get
if _newclass:
agc_outer_thresh_high = _swig_property(_ad9361_swig.AD9361_InitParam_agc_outer_thresh_high_get, _ad9361_swig.AD9361_InitParam_agc_outer_thresh_high_set)
__swig_setmethods__["agc_outer_thresh_high_dec_steps"] = _ad9361_swig.AD9361_InitParam_agc_outer_thresh_high_dec_steps_set
__swig_getmethods__["agc_outer_thresh_high_dec_steps"] = _ad9361_swig.AD9361_InitParam_agc_outer_thresh_high_dec_steps_get
if _newclass:
agc_outer_thresh_high_dec_steps = _swig_property(_ad9361_swig.AD9361_InitParam_agc_outer_thresh_high_dec_steps_get, _ad9361_swig.AD9361_InitParam_agc_outer_thresh_high_dec_steps_set)
__swig_setmethods__["agc_outer_thresh_low"] = _ad9361_swig.AD9361_InitParam_agc_outer_thresh_low_set
__swig_getmethods__["agc_outer_thresh_low"] = _ad9361_swig.AD9361_InitParam_agc_outer_thresh_low_get
if _newclass:
agc_outer_thresh_low = _swig_property(_ad9361_swig.AD9361_InitParam_agc_outer_thresh_low_get, _ad9361_swig.AD9361_InitParam_agc_outer_thresh_low_set)
__swig_setmethods__["agc_outer_thresh_low_inc_steps"] = _ad9361_swig.AD9361_InitParam_agc_outer_thresh_low_inc_steps_set
__swig_getmethods__["agc_outer_thresh_low_inc_steps"] = _ad9361_swig.AD9361_InitParam_agc_outer_thresh_low_inc_steps_get
if _newclass:
agc_outer_thresh_low_inc_steps = _swig_property(_ad9361_swig.AD9361_InitParam_agc_outer_thresh_low_inc_steps_get, _ad9361_swig.AD9361_InitParam_agc_outer_thresh_low_inc_steps_set)
__swig_setmethods__["agc_attack_delay_extra_margin_us"] = _ad9361_swig.AD9361_InitParam_agc_attack_delay_extra_margin_us_set
__swig_getmethods__["agc_attack_delay_extra_margin_us"] = _ad9361_swig.AD9361_InitParam_agc_attack_delay_extra_margin_us_get
if _newclass:
agc_attack_delay_extra_margin_us = _swig_property(_ad9361_swig.AD9361_InitParam_agc_attack_delay_extra_margin_us_get, _ad9361_swig.AD9361_InitParam_agc_attack_delay_extra_margin_us_set)
__swig_setmethods__["agc_sync_for_gain_counter_enable"] = _ad9361_swig.AD9361_InitParam_agc_sync_for_gain_counter_enable_set
__swig_getmethods__["agc_sync_for_gain_counter_enable"] = _ad9361_swig.AD9361_InitParam_agc_sync_for_gain_counter_enable_get
if _newclass:
agc_sync_for_gain_counter_enable = _swig_property(_ad9361_swig.AD9361_InitParam_agc_sync_for_gain_counter_enable_get, _ad9361_swig.AD9361_InitParam_agc_sync_for_gain_counter_enable_set)
__swig_setmethods__["fagc_dec_pow_measuremnt_duration"] = _ad9361_swig.AD9361_InitParam_fagc_dec_pow_measuremnt_duration_set
__swig_getmethods__["fagc_dec_pow_measuremnt_duration"] = _ad9361_swig.AD9361_InitParam_fagc_dec_pow_measuremnt_duration_get
if _newclass:
fagc_dec_pow_measuremnt_duration = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_dec_pow_measuremnt_duration_get, _ad9361_swig.AD9361_InitParam_fagc_dec_pow_measuremnt_duration_set)
__swig_setmethods__["fagc_state_wait_time_ns"] = _ad9361_swig.AD9361_InitParam_fagc_state_wait_time_ns_set
__swig_getmethods__["fagc_state_wait_time_ns"] = _ad9361_swig.AD9361_InitParam_fagc_state_wait_time_ns_get
if _newclass:
fagc_state_wait_time_ns = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_state_wait_time_ns_get, _ad9361_swig.AD9361_InitParam_fagc_state_wait_time_ns_set)
__swig_setmethods__["fagc_allow_agc_gain_increase"] = _ad9361_swig.AD9361_InitParam_fagc_allow_agc_gain_increase_set
__swig_getmethods__["fagc_allow_agc_gain_increase"] = _ad9361_swig.AD9361_InitParam_fagc_allow_agc_gain_increase_get
if _newclass:
fagc_allow_agc_gain_increase = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_allow_agc_gain_increase_get, _ad9361_swig.AD9361_InitParam_fagc_allow_agc_gain_increase_set)
__swig_setmethods__["fagc_lp_thresh_increment_time"] = _ad9361_swig.AD9361_InitParam_fagc_lp_thresh_increment_time_set
__swig_getmethods__["fagc_lp_thresh_increment_time"] = _ad9361_swig.AD9361_InitParam_fagc_lp_thresh_increment_time_get
if _newclass:
fagc_lp_thresh_increment_time = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_lp_thresh_increment_time_get, _ad9361_swig.AD9361_InitParam_fagc_lp_thresh_increment_time_set)
__swig_setmethods__["fagc_lp_thresh_increment_steps"] = _ad9361_swig.AD9361_InitParam_fagc_lp_thresh_increment_steps_set
__swig_getmethods__["fagc_lp_thresh_increment_steps"] = _ad9361_swig.AD9361_InitParam_fagc_lp_thresh_increment_steps_get
if _newclass:
fagc_lp_thresh_increment_steps = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_lp_thresh_increment_steps_get, _ad9361_swig.AD9361_InitParam_fagc_lp_thresh_increment_steps_set)
__swig_setmethods__["fagc_lock_level"] = _ad9361_swig.AD9361_InitParam_fagc_lock_level_set
__swig_getmethods__["fagc_lock_level"] = _ad9361_swig.AD9361_InitParam_fagc_lock_level_get
if _newclass:
fagc_lock_level = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_lock_level_get, _ad9361_swig.AD9361_InitParam_fagc_lock_level_set)
__swig_setmethods__["fagc_lock_level_lmt_gain_increase_en"] = _ad9361_swig.AD9361_InitParam_fagc_lock_level_lmt_gain_increase_en_set
__swig_getmethods__["fagc_lock_level_lmt_gain_increase_en"] = _ad9361_swig.AD9361_InitParam_fagc_lock_level_lmt_gain_increase_en_get
if _newclass:
fagc_lock_level_lmt_gain_increase_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_lock_level_lmt_gain_increase_en_get, _ad9361_swig.AD9361_InitParam_fagc_lock_level_lmt_gain_increase_en_set)
__swig_setmethods__["fagc_lock_level_gain_increase_upper_limit"] = _ad9361_swig.AD9361_InitParam_fagc_lock_level_gain_increase_upper_limit_set
__swig_getmethods__["fagc_lock_level_gain_increase_upper_limit"] = _ad9361_swig.AD9361_InitParam_fagc_lock_level_gain_increase_upper_limit_get
if _newclass:
fagc_lock_level_gain_increase_upper_limit = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_lock_level_gain_increase_upper_limit_get, _ad9361_swig.AD9361_InitParam_fagc_lock_level_gain_increase_upper_limit_set)
__swig_setmethods__["fagc_lpf_final_settling_steps"] = _ad9361_swig.AD9361_InitParam_fagc_lpf_final_settling_steps_set
__swig_getmethods__["fagc_lpf_final_settling_steps"] = _ad9361_swig.AD9361_InitParam_fagc_lpf_final_settling_steps_get
if _newclass:
fagc_lpf_final_settling_steps = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_lpf_final_settling_steps_get, _ad9361_swig.AD9361_InitParam_fagc_lpf_final_settling_steps_set)
__swig_setmethods__["fagc_lmt_final_settling_steps"] = _ad9361_swig.AD9361_InitParam_fagc_lmt_final_settling_steps_set
__swig_getmethods__["fagc_lmt_final_settling_steps"] = _ad9361_swig.AD9361_InitParam_fagc_lmt_final_settling_steps_get
if _newclass:
fagc_lmt_final_settling_steps = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_lmt_final_settling_steps_get, _ad9361_swig.AD9361_InitParam_fagc_lmt_final_settling_steps_set)
__swig_setmethods__["fagc_final_overrange_count"] = _ad9361_swig.AD9361_InitParam_fagc_final_overrange_count_set
__swig_getmethods__["fagc_final_overrange_count"] = _ad9361_swig.AD9361_InitParam_fagc_final_overrange_count_get
if _newclass:
fagc_final_overrange_count = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_final_overrange_count_get, _ad9361_swig.AD9361_InitParam_fagc_final_overrange_count_set)
__swig_setmethods__["fagc_gain_increase_after_gain_lock_en"] = _ad9361_swig.AD9361_InitParam_fagc_gain_increase_after_gain_lock_en_set
__swig_getmethods__["fagc_gain_increase_after_gain_lock_en"] = _ad9361_swig.AD9361_InitParam_fagc_gain_increase_after_gain_lock_en_get
if _newclass:
fagc_gain_increase_after_gain_lock_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_gain_increase_after_gain_lock_en_get, _ad9361_swig.AD9361_InitParam_fagc_gain_increase_after_gain_lock_en_set)
__swig_setmethods__["fagc_gain_index_type_after_exit_rx_mode"] = _ad9361_swig.AD9361_InitParam_fagc_gain_index_type_after_exit_rx_mode_set
__swig_getmethods__["fagc_gain_index_type_after_exit_rx_mode"] = _ad9361_swig.AD9361_InitParam_fagc_gain_index_type_after_exit_rx_mode_get
if _newclass:
fagc_gain_index_type_after_exit_rx_mode = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_gain_index_type_after_exit_rx_mode_get, _ad9361_swig.AD9361_InitParam_fagc_gain_index_type_after_exit_rx_mode_set)
__swig_setmethods__["fagc_use_last_lock_level_for_set_gain_en"] = _ad9361_swig.AD9361_InitParam_fagc_use_last_lock_level_for_set_gain_en_set
__swig_getmethods__["fagc_use_last_lock_level_for_set_gain_en"] = _ad9361_swig.AD9361_InitParam_fagc_use_last_lock_level_for_set_gain_en_get
if _newclass:
fagc_use_last_lock_level_for_set_gain_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_use_last_lock_level_for_set_gain_en_get, _ad9361_swig.AD9361_InitParam_fagc_use_last_lock_level_for_set_gain_en_set)
__swig_setmethods__["fagc_rst_gla_stronger_sig_thresh_exceeded_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_stronger_sig_thresh_exceeded_en_set
__swig_getmethods__["fagc_rst_gla_stronger_sig_thresh_exceeded_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_stronger_sig_thresh_exceeded_en_get
if _newclass:
fagc_rst_gla_stronger_sig_thresh_exceeded_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_stronger_sig_thresh_exceeded_en_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_stronger_sig_thresh_exceeded_en_set)
__swig_setmethods__["fagc_optimized_gain_offset"] = _ad9361_swig.AD9361_InitParam_fagc_optimized_gain_offset_set
__swig_getmethods__["fagc_optimized_gain_offset"] = _ad9361_swig.AD9361_InitParam_fagc_optimized_gain_offset_get
if _newclass:
fagc_optimized_gain_offset = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_optimized_gain_offset_get, _ad9361_swig.AD9361_InitParam_fagc_optimized_gain_offset_set)
__swig_setmethods__["fagc_rst_gla_stronger_sig_thresh_above_ll"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_stronger_sig_thresh_above_ll_set
__swig_getmethods__["fagc_rst_gla_stronger_sig_thresh_above_ll"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_stronger_sig_thresh_above_ll_get
if _newclass:
fagc_rst_gla_stronger_sig_thresh_above_ll = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_stronger_sig_thresh_above_ll_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_stronger_sig_thresh_above_ll_set)
__swig_setmethods__["fagc_rst_gla_engergy_lost_sig_thresh_exceeded_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_sig_thresh_exceeded_en_set
__swig_getmethods__["fagc_rst_gla_engergy_lost_sig_thresh_exceeded_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_sig_thresh_exceeded_en_get
if _newclass:
fagc_rst_gla_engergy_lost_sig_thresh_exceeded_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_sig_thresh_exceeded_en_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_sig_thresh_exceeded_en_set)
__swig_setmethods__["fagc_rst_gla_engergy_lost_goto_optim_gain_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_goto_optim_gain_en_set
__swig_getmethods__["fagc_rst_gla_engergy_lost_goto_optim_gain_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_goto_optim_gain_en_get
if _newclass:
fagc_rst_gla_engergy_lost_goto_optim_gain_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_goto_optim_gain_en_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_goto_optim_gain_en_set)
__swig_setmethods__["fagc_rst_gla_engergy_lost_sig_thresh_below_ll"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_sig_thresh_below_ll_set
__swig_getmethods__["fagc_rst_gla_engergy_lost_sig_thresh_below_ll"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_sig_thresh_below_ll_get
if _newclass:
fagc_rst_gla_engergy_lost_sig_thresh_below_ll = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_sig_thresh_below_ll_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_engergy_lost_sig_thresh_below_ll_set)
__swig_setmethods__["fagc_energy_lost_stronger_sig_gain_lock_exit_cnt"] = _ad9361_swig.AD9361_InitParam_fagc_energy_lost_stronger_sig_gain_lock_exit_cnt_set
__swig_getmethods__["fagc_energy_lost_stronger_sig_gain_lock_exit_cnt"] = _ad9361_swig.AD9361_InitParam_fagc_energy_lost_stronger_sig_gain_lock_exit_cnt_get
if _newclass:
fagc_energy_lost_stronger_sig_gain_lock_exit_cnt = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_energy_lost_stronger_sig_gain_lock_exit_cnt_get, _ad9361_swig.AD9361_InitParam_fagc_energy_lost_stronger_sig_gain_lock_exit_cnt_set)
__swig_setmethods__["fagc_rst_gla_large_adc_overload_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_large_adc_overload_en_set
__swig_getmethods__["fagc_rst_gla_large_adc_overload_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_large_adc_overload_en_get
if _newclass:
fagc_rst_gla_large_adc_overload_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_large_adc_overload_en_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_large_adc_overload_en_set)
__swig_setmethods__["fagc_rst_gla_large_lmt_overload_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_large_lmt_overload_en_set
__swig_getmethods__["fagc_rst_gla_large_lmt_overload_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_large_lmt_overload_en_get
if _newclass:
fagc_rst_gla_large_lmt_overload_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_large_lmt_overload_en_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_large_lmt_overload_en_set)
__swig_setmethods__["fagc_rst_gla_en_agc_pulled_high_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_en_agc_pulled_high_en_set
__swig_getmethods__["fagc_rst_gla_en_agc_pulled_high_en"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_en_agc_pulled_high_en_get
if _newclass:
fagc_rst_gla_en_agc_pulled_high_en = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_en_agc_pulled_high_en_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_en_agc_pulled_high_en_set)
__swig_setmethods__["fagc_rst_gla_if_en_agc_pulled_high_mode"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_if_en_agc_pulled_high_mode_set
__swig_getmethods__["fagc_rst_gla_if_en_agc_pulled_high_mode"] = _ad9361_swig.AD9361_InitParam_fagc_rst_gla_if_en_agc_pulled_high_mode_get
if _newclass:
fagc_rst_gla_if_en_agc_pulled_high_mode = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_rst_gla_if_en_agc_pulled_high_mode_get, _ad9361_swig.AD9361_InitParam_fagc_rst_gla_if_en_agc_pulled_high_mode_set)
__swig_setmethods__["fagc_power_measurement_duration_in_state5"] = _ad9361_swig.AD9361_InitParam_fagc_power_measurement_duration_in_state5_set
__swig_getmethods__["fagc_power_measurement_duration_in_state5"] = _ad9361_swig.AD9361_InitParam_fagc_power_measurement_duration_in_state5_get
if _newclass:
fagc_power_measurement_duration_in_state5 = _swig_property(_ad9361_swig.AD9361_InitParam_fagc_power_measurement_duration_in_state5_get, _ad9361_swig.AD9361_InitParam_fagc_power_measurement_duration_in_state5_set)
__swig_setmethods__["rssi_delay"] = _ad9361_swig.AD9361_InitParam_rssi_delay_set
__swig_getmethods__["rssi_delay"] = _ad9361_swig.AD9361_InitParam_rssi_delay_get
if _newclass:
rssi_delay = _swig_property(_ad9361_swig.AD9361_InitParam_rssi_delay_get, _ad9361_swig.AD9361_InitParam_rssi_delay_set)
__swig_setmethods__["rssi_duration"] = _ad9361_swig.AD9361_InitParam_rssi_duration_set
__swig_getmethods__["rssi_duration"] = _ad9361_swig.AD9361_InitParam_rssi_duration_get
if _newclass:
rssi_duration = _swig_property(_ad9361_swig.AD9361_InitParam_rssi_duration_get, _ad9361_swig.AD9361_InitParam_rssi_duration_set)
__swig_setmethods__["rssi_restart_mode"] = _ad9361_swig.AD9361_InitParam_rssi_restart_mode_set
__swig_getmethods__["rssi_restart_mode"] = _ad9361_swig.AD9361_InitParam_rssi_restart_mode_get
if _newclass:
rssi_restart_mode = _swig_property(_ad9361_swig.AD9361_InitParam_rssi_restart_mode_get, _ad9361_swig.AD9361_InitParam_rssi_restart_mode_set)
__swig_setmethods__["rssi_unit_is_rx_samples_enable"] = _ad9361_swig.AD9361_InitParam_rssi_unit_is_rx_samples_enable_set
__swig_getmethods__["rssi_unit_is_rx_samples_enable"] = _ad9361_swig.AD9361_InitParam_rssi_unit_is_rx_samples_enable_get
if _newclass:
rssi_unit_is_rx_samples_enable = _swig_property(_ad9361_swig.AD9361_InitParam_rssi_unit_is_rx_samples_enable_get, _ad9361_swig.AD9361_InitParam_rssi_unit_is_rx_samples_enable_set)
__swig_setmethods__["rssi_wait"] = _ad9361_swig.AD9361_InitParam_rssi_wait_set
__swig_getmethods__["rssi_wait"] = _ad9361_swig.AD9361_InitParam_rssi_wait_get
if _newclass:
rssi_wait = _swig_property(_ad9361_swig.AD9361_InitParam_rssi_wait_get, _ad9361_swig.AD9361_InitParam_rssi_wait_set)
__swig_setmethods__["aux_adc_decimation"] = _ad9361_swig.AD9361_InitParam_aux_adc_decimation_set
__swig_getmethods__["aux_adc_decimation"] = _ad9361_swig.AD9361_InitParam_aux_adc_decimation_get
if _newclass:
aux_adc_decimation = _swig_property(_ad9361_swig.AD9361_InitParam_aux_adc_decimation_get, _ad9361_swig.AD9361_InitParam_aux_adc_decimation_set)
__swig_setmethods__["aux_adc_rate"] = _ad9361_swig.AD9361_InitParam_aux_adc_rate_set
__swig_getmethods__["aux_adc_rate"] = _ad9361_swig.AD9361_InitParam_aux_adc_rate_get
if _newclass:
aux_adc_rate = _swig_property(_ad9361_swig.AD9361_InitParam_aux_adc_rate_get, _ad9361_swig.AD9361_InitParam_aux_adc_rate_set)
__swig_setmethods__["aux_dac_manual_mode_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac_manual_mode_enable_set
__swig_getmethods__["aux_dac_manual_mode_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac_manual_mode_enable_get
if _newclass:
aux_dac_manual_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac_manual_mode_enable_get, _ad9361_swig.AD9361_InitParam_aux_dac_manual_mode_enable_set)
__swig_setmethods__["aux_dac1_default_value_mV"] = _ad9361_swig.AD9361_InitParam_aux_dac1_default_value_mV_set
__swig_getmethods__["aux_dac1_default_value_mV"] = _ad9361_swig.AD9361_InitParam_aux_dac1_default_value_mV_get
if _newclass:
aux_dac1_default_value_mV = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac1_default_value_mV_get, _ad9361_swig.AD9361_InitParam_aux_dac1_default_value_mV_set)
__swig_setmethods__["aux_dac1_active_in_rx_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_rx_enable_set
__swig_getmethods__["aux_dac1_active_in_rx_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_rx_enable_get
if _newclass:
aux_dac1_active_in_rx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac1_active_in_rx_enable_get, _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_rx_enable_set)
__swig_setmethods__["aux_dac1_active_in_tx_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_tx_enable_set
__swig_getmethods__["aux_dac1_active_in_tx_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_tx_enable_get
if _newclass:
aux_dac1_active_in_tx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac1_active_in_tx_enable_get, _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_tx_enable_set)
__swig_setmethods__["aux_dac1_active_in_alert_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_alert_enable_set
__swig_getmethods__["aux_dac1_active_in_alert_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_alert_enable_get
if _newclass:
aux_dac1_active_in_alert_enable = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac1_active_in_alert_enable_get, _ad9361_swig.AD9361_InitParam_aux_dac1_active_in_alert_enable_set)
__swig_setmethods__["aux_dac1_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_aux_dac1_rx_delay_us_set
__swig_getmethods__["aux_dac1_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_aux_dac1_rx_delay_us_get
if _newclass:
aux_dac1_rx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac1_rx_delay_us_get, _ad9361_swig.AD9361_InitParam_aux_dac1_rx_delay_us_set)
__swig_setmethods__["aux_dac1_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_aux_dac1_tx_delay_us_set
__swig_getmethods__["aux_dac1_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_aux_dac1_tx_delay_us_get
if _newclass:
aux_dac1_tx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac1_tx_delay_us_get, _ad9361_swig.AD9361_InitParam_aux_dac1_tx_delay_us_set)
__swig_setmethods__["aux_dac2_default_value_mV"] = _ad9361_swig.AD9361_InitParam_aux_dac2_default_value_mV_set
__swig_getmethods__["aux_dac2_default_value_mV"] = _ad9361_swig.AD9361_InitParam_aux_dac2_default_value_mV_get
if _newclass:
aux_dac2_default_value_mV = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac2_default_value_mV_get, _ad9361_swig.AD9361_InitParam_aux_dac2_default_value_mV_set)
__swig_setmethods__["aux_dac2_active_in_rx_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_rx_enable_set
__swig_getmethods__["aux_dac2_active_in_rx_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_rx_enable_get
if _newclass:
aux_dac2_active_in_rx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac2_active_in_rx_enable_get, _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_rx_enable_set)
__swig_setmethods__["aux_dac2_active_in_tx_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_tx_enable_set
__swig_getmethods__["aux_dac2_active_in_tx_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_tx_enable_get
if _newclass:
aux_dac2_active_in_tx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac2_active_in_tx_enable_get, _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_tx_enable_set)
__swig_setmethods__["aux_dac2_active_in_alert_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_alert_enable_set
__swig_getmethods__["aux_dac2_active_in_alert_enable"] = _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_alert_enable_get
if _newclass:
aux_dac2_active_in_alert_enable = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac2_active_in_alert_enable_get, _ad9361_swig.AD9361_InitParam_aux_dac2_active_in_alert_enable_set)
__swig_setmethods__["aux_dac2_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_aux_dac2_rx_delay_us_set
__swig_getmethods__["aux_dac2_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_aux_dac2_rx_delay_us_get
if _newclass:
aux_dac2_rx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac2_rx_delay_us_get, _ad9361_swig.AD9361_InitParam_aux_dac2_rx_delay_us_set)
__swig_setmethods__["aux_dac2_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_aux_dac2_tx_delay_us_set
__swig_getmethods__["aux_dac2_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_aux_dac2_tx_delay_us_get
if _newclass:
aux_dac2_tx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_aux_dac2_tx_delay_us_get, _ad9361_swig.AD9361_InitParam_aux_dac2_tx_delay_us_set)
__swig_setmethods__["temp_sense_decimation"] = _ad9361_swig.AD9361_InitParam_temp_sense_decimation_set
__swig_getmethods__["temp_sense_decimation"] = _ad9361_swig.AD9361_InitParam_temp_sense_decimation_get
if _newclass:
temp_sense_decimation = _swig_property(_ad9361_swig.AD9361_InitParam_temp_sense_decimation_get, _ad9361_swig.AD9361_InitParam_temp_sense_decimation_set)
__swig_setmethods__["temp_sense_measurement_interval_ms"] = _ad9361_swig.AD9361_InitParam_temp_sense_measurement_interval_ms_set
__swig_getmethods__["temp_sense_measurement_interval_ms"] = _ad9361_swig.AD9361_InitParam_temp_sense_measurement_interval_ms_get
if _newclass:
temp_sense_measurement_interval_ms = _swig_property(_ad9361_swig.AD9361_InitParam_temp_sense_measurement_interval_ms_get, _ad9361_swig.AD9361_InitParam_temp_sense_measurement_interval_ms_set)
__swig_setmethods__["temp_sense_offset_signed"] = _ad9361_swig.AD9361_InitParam_temp_sense_offset_signed_set
__swig_getmethods__["temp_sense_offset_signed"] = _ad9361_swig.AD9361_InitParam_temp_sense_offset_signed_get
if _newclass:
temp_sense_offset_signed = _swig_property(_ad9361_swig.AD9361_InitParam_temp_sense_offset_signed_get, _ad9361_swig.AD9361_InitParam_temp_sense_offset_signed_set)
__swig_setmethods__["temp_sense_periodic_measurement_enable"] = _ad9361_swig.AD9361_InitParam_temp_sense_periodic_measurement_enable_set
__swig_getmethods__["temp_sense_periodic_measurement_enable"] = _ad9361_swig.AD9361_InitParam_temp_sense_periodic_measurement_enable_get
if _newclass:
temp_sense_periodic_measurement_enable = _swig_property(_ad9361_swig.AD9361_InitParam_temp_sense_periodic_measurement_enable_get, _ad9361_swig.AD9361_InitParam_temp_sense_periodic_measurement_enable_set)
__swig_setmethods__["ctrl_outs_enable_mask"] = _ad9361_swig.AD9361_InitParam_ctrl_outs_enable_mask_set
__swig_getmethods__["ctrl_outs_enable_mask"] = _ad9361_swig.AD9361_InitParam_ctrl_outs_enable_mask_get
if _newclass:
ctrl_outs_enable_mask = _swig_property(_ad9361_swig.AD9361_InitParam_ctrl_outs_enable_mask_get, _ad9361_swig.AD9361_InitParam_ctrl_outs_enable_mask_set)
__swig_setmethods__["ctrl_outs_index"] = _ad9361_swig.AD9361_InitParam_ctrl_outs_index_set
__swig_getmethods__["ctrl_outs_index"] = _ad9361_swig.AD9361_InitParam_ctrl_outs_index_get
if _newclass:
ctrl_outs_index = _swig_property(_ad9361_swig.AD9361_InitParam_ctrl_outs_index_get, _ad9361_swig.AD9361_InitParam_ctrl_outs_index_set)
__swig_setmethods__["elna_settling_delay_ns"] = _ad9361_swig.AD9361_InitParam_elna_settling_delay_ns_set
__swig_getmethods__["elna_settling_delay_ns"] = _ad9361_swig.AD9361_InitParam_elna_settling_delay_ns_get
if _newclass:
elna_settling_delay_ns = _swig_property(_ad9361_swig.AD9361_InitParam_elna_settling_delay_ns_get, _ad9361_swig.AD9361_InitParam_elna_settling_delay_ns_set)
__swig_setmethods__["elna_gain_mdB"] = _ad9361_swig.AD9361_InitParam_elna_gain_mdB_set
__swig_getmethods__["elna_gain_mdB"] = _ad9361_swig.AD9361_InitParam_elna_gain_mdB_get
if _newclass:
elna_gain_mdB = _swig_property(_ad9361_swig.AD9361_InitParam_elna_gain_mdB_get, _ad9361_swig.AD9361_InitParam_elna_gain_mdB_set)
__swig_setmethods__["elna_bypass_loss_mdB"] = _ad9361_swig.AD9361_InitParam_elna_bypass_loss_mdB_set
__swig_getmethods__["elna_bypass_loss_mdB"] = _ad9361_swig.AD9361_InitParam_elna_bypass_loss_mdB_get
if _newclass:
elna_bypass_loss_mdB = _swig_property(_ad9361_swig.AD9361_InitParam_elna_bypass_loss_mdB_get, _ad9361_swig.AD9361_InitParam_elna_bypass_loss_mdB_set)
__swig_setmethods__["elna_rx1_gpo0_control_enable"] = _ad9361_swig.AD9361_InitParam_elna_rx1_gpo0_control_enable_set
__swig_getmethods__["elna_rx1_gpo0_control_enable"] = _ad9361_swig.AD9361_InitParam_elna_rx1_gpo0_control_enable_get
if _newclass:
elna_rx1_gpo0_control_enable = _swig_property(_ad9361_swig.AD9361_InitParam_elna_rx1_gpo0_control_enable_get, _ad9361_swig.AD9361_InitParam_elna_rx1_gpo0_control_enable_set)
__swig_setmethods__["elna_rx2_gpo1_control_enable"] = _ad9361_swig.AD9361_InitParam_elna_rx2_gpo1_control_enable_set
__swig_getmethods__["elna_rx2_gpo1_control_enable"] = _ad9361_swig.AD9361_InitParam_elna_rx2_gpo1_control_enable_get
if _newclass:
elna_rx2_gpo1_control_enable = _swig_property(_ad9361_swig.AD9361_InitParam_elna_rx2_gpo1_control_enable_get, _ad9361_swig.AD9361_InitParam_elna_rx2_gpo1_control_enable_set)
__swig_setmethods__["elna_gaintable_all_index_enable"] = _ad9361_swig.AD9361_InitParam_elna_gaintable_all_index_enable_set
__swig_getmethods__["elna_gaintable_all_index_enable"] = _ad9361_swig.AD9361_InitParam_elna_gaintable_all_index_enable_get
if _newclass:
elna_gaintable_all_index_enable = _swig_property(_ad9361_swig.AD9361_InitParam_elna_gaintable_all_index_enable_get, _ad9361_swig.AD9361_InitParam_elna_gaintable_all_index_enable_set)
__swig_setmethods__["digital_interface_tune_skip_mode"] = _ad9361_swig.AD9361_InitParam_digital_interface_tune_skip_mode_set
__swig_getmethods__["digital_interface_tune_skip_mode"] = _ad9361_swig.AD9361_InitParam_digital_interface_tune_skip_mode_get
if _newclass:
digital_interface_tune_skip_mode = _swig_property(_ad9361_swig.AD9361_InitParam_digital_interface_tune_skip_mode_get, _ad9361_swig.AD9361_InitParam_digital_interface_tune_skip_mode_set)
__swig_setmethods__["digital_interface_tune_fir_disable"] = _ad9361_swig.AD9361_InitParam_digital_interface_tune_fir_disable_set
__swig_getmethods__["digital_interface_tune_fir_disable"] = _ad9361_swig.AD9361_InitParam_digital_interface_tune_fir_disable_get
if _newclass:
digital_interface_tune_fir_disable = _swig_property(_ad9361_swig.AD9361_InitParam_digital_interface_tune_fir_disable_get, _ad9361_swig.AD9361_InitParam_digital_interface_tune_fir_disable_set)
__swig_setmethods__["pp_tx_swap_enable"] = _ad9361_swig.AD9361_InitParam_pp_tx_swap_enable_set
__swig_getmethods__["pp_tx_swap_enable"] = _ad9361_swig.AD9361_InitParam_pp_tx_swap_enable_get
if _newclass:
pp_tx_swap_enable = _swig_property(_ad9361_swig.AD9361_InitParam_pp_tx_swap_enable_get, _ad9361_swig.AD9361_InitParam_pp_tx_swap_enable_set)
__swig_setmethods__["pp_rx_swap_enable"] = _ad9361_swig.AD9361_InitParam_pp_rx_swap_enable_set
__swig_getmethods__["pp_rx_swap_enable"] = _ad9361_swig.AD9361_InitParam_pp_rx_swap_enable_get
if _newclass:
pp_rx_swap_enable = _swig_property(_ad9361_swig.AD9361_InitParam_pp_rx_swap_enable_get, _ad9361_swig.AD9361_InitParam_pp_rx_swap_enable_set)
__swig_setmethods__["tx_channel_swap_enable"] = _ad9361_swig.AD9361_InitParam_tx_channel_swap_enable_set
__swig_getmethods__["tx_channel_swap_enable"] = _ad9361_swig.AD9361_InitParam_tx_channel_swap_enable_get
if _newclass:
tx_channel_swap_enable = _swig_property(_ad9361_swig.AD9361_InitParam_tx_channel_swap_enable_get, _ad9361_swig.AD9361_InitParam_tx_channel_swap_enable_set)
__swig_setmethods__["rx_channel_swap_enable"] = _ad9361_swig.AD9361_InitParam_rx_channel_swap_enable_set
__swig_getmethods__["rx_channel_swap_enable"] = _ad9361_swig.AD9361_InitParam_rx_channel_swap_enable_get
if _newclass:
rx_channel_swap_enable = _swig_property(_ad9361_swig.AD9361_InitParam_rx_channel_swap_enable_get, _ad9361_swig.AD9361_InitParam_rx_channel_swap_enable_set)
__swig_setmethods__["rx_frame_pulse_mode_enable"] = _ad9361_swig.AD9361_InitParam_rx_frame_pulse_mode_enable_set
__swig_getmethods__["rx_frame_pulse_mode_enable"] = _ad9361_swig.AD9361_InitParam_rx_frame_pulse_mode_enable_get
if _newclass:
rx_frame_pulse_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_rx_frame_pulse_mode_enable_get, _ad9361_swig.AD9361_InitParam_rx_frame_pulse_mode_enable_set)
__swig_setmethods__["two_t_two_r_timing_enable"] = _ad9361_swig.AD9361_InitParam_two_t_two_r_timing_enable_set
__swig_getmethods__["two_t_two_r_timing_enable"] = _ad9361_swig.AD9361_InitParam_two_t_two_r_timing_enable_get
if _newclass:
two_t_two_r_timing_enable = _swig_property(_ad9361_swig.AD9361_InitParam_two_t_two_r_timing_enable_get, _ad9361_swig.AD9361_InitParam_two_t_two_r_timing_enable_set)
__swig_setmethods__["invert_data_bus_enable"] = _ad9361_swig.AD9361_InitParam_invert_data_bus_enable_set
__swig_getmethods__["invert_data_bus_enable"] = _ad9361_swig.AD9361_InitParam_invert_data_bus_enable_get
if _newclass:
invert_data_bus_enable = _swig_property(_ad9361_swig.AD9361_InitParam_invert_data_bus_enable_get, _ad9361_swig.AD9361_InitParam_invert_data_bus_enable_set)
__swig_setmethods__["invert_data_clk_enable"] = _ad9361_swig.AD9361_InitParam_invert_data_clk_enable_set
__swig_getmethods__["invert_data_clk_enable"] = _ad9361_swig.AD9361_InitParam_invert_data_clk_enable_get
if _newclass:
invert_data_clk_enable = _swig_property(_ad9361_swig.AD9361_InitParam_invert_data_clk_enable_get, _ad9361_swig.AD9361_InitParam_invert_data_clk_enable_set)
__swig_setmethods__["fdd_alt_word_order_enable"] = _ad9361_swig.AD9361_InitParam_fdd_alt_word_order_enable_set
__swig_getmethods__["fdd_alt_word_order_enable"] = _ad9361_swig.AD9361_InitParam_fdd_alt_word_order_enable_get
if _newclass:
fdd_alt_word_order_enable = _swig_property(_ad9361_swig.AD9361_InitParam_fdd_alt_word_order_enable_get, _ad9361_swig.AD9361_InitParam_fdd_alt_word_order_enable_set)
__swig_setmethods__["invert_rx_frame_enable"] = _ad9361_swig.AD9361_InitParam_invert_rx_frame_enable_set
__swig_getmethods__["invert_rx_frame_enable"] = _ad9361_swig.AD9361_InitParam_invert_rx_frame_enable_get
if _newclass:
invert_rx_frame_enable = _swig_property(_ad9361_swig.AD9361_InitParam_invert_rx_frame_enable_get, _ad9361_swig.AD9361_InitParam_invert_rx_frame_enable_set)
__swig_setmethods__["fdd_rx_rate_2tx_enable"] = _ad9361_swig.AD9361_InitParam_fdd_rx_rate_2tx_enable_set
__swig_getmethods__["fdd_rx_rate_2tx_enable"] = _ad9361_swig.AD9361_InitParam_fdd_rx_rate_2tx_enable_get
if _newclass:
fdd_rx_rate_2tx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_fdd_rx_rate_2tx_enable_get, _ad9361_swig.AD9361_InitParam_fdd_rx_rate_2tx_enable_set)
__swig_setmethods__["swap_ports_enable"] = _ad9361_swig.AD9361_InitParam_swap_ports_enable_set
__swig_getmethods__["swap_ports_enable"] = _ad9361_swig.AD9361_InitParam_swap_ports_enable_get
if _newclass:
swap_ports_enable = _swig_property(_ad9361_swig.AD9361_InitParam_swap_ports_enable_get, _ad9361_swig.AD9361_InitParam_swap_ports_enable_set)
__swig_setmethods__["single_data_rate_enable"] = _ad9361_swig.AD9361_InitParam_single_data_rate_enable_set
__swig_getmethods__["single_data_rate_enable"] = _ad9361_swig.AD9361_InitParam_single_data_rate_enable_get
if _newclass:
single_data_rate_enable = _swig_property(_ad9361_swig.AD9361_InitParam_single_data_rate_enable_get, _ad9361_swig.AD9361_InitParam_single_data_rate_enable_set)
__swig_setmethods__["lvds_mode_enable"] = _ad9361_swig.AD9361_InitParam_lvds_mode_enable_set
__swig_getmethods__["lvds_mode_enable"] = _ad9361_swig.AD9361_InitParam_lvds_mode_enable_get
if _newclass:
lvds_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_lvds_mode_enable_get, _ad9361_swig.AD9361_InitParam_lvds_mode_enable_set)
__swig_setmethods__["half_duplex_mode_enable"] = _ad9361_swig.AD9361_InitParam_half_duplex_mode_enable_set
__swig_getmethods__["half_duplex_mode_enable"] = _ad9361_swig.AD9361_InitParam_half_duplex_mode_enable_get
if _newclass:
half_duplex_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_half_duplex_mode_enable_get, _ad9361_swig.AD9361_InitParam_half_duplex_mode_enable_set)
__swig_setmethods__["single_port_mode_enable"] = _ad9361_swig.AD9361_InitParam_single_port_mode_enable_set
__swig_getmethods__["single_port_mode_enable"] = _ad9361_swig.AD9361_InitParam_single_port_mode_enable_get
if _newclass:
single_port_mode_enable = _swig_property(_ad9361_swig.AD9361_InitParam_single_port_mode_enable_get, _ad9361_swig.AD9361_InitParam_single_port_mode_enable_set)
__swig_setmethods__["full_port_enable"] = _ad9361_swig.AD9361_InitParam_full_port_enable_set
__swig_getmethods__["full_port_enable"] = _ad9361_swig.AD9361_InitParam_full_port_enable_get
if _newclass:
full_port_enable = _swig_property(_ad9361_swig.AD9361_InitParam_full_port_enable_get, _ad9361_swig.AD9361_InitParam_full_port_enable_set)
__swig_setmethods__["full_duplex_swap_bits_enable"] = _ad9361_swig.AD9361_InitParam_full_duplex_swap_bits_enable_set
__swig_getmethods__["full_duplex_swap_bits_enable"] = _ad9361_swig.AD9361_InitParam_full_duplex_swap_bits_enable_get
if _newclass:
full_duplex_swap_bits_enable = _swig_property(_ad9361_swig.AD9361_InitParam_full_duplex_swap_bits_enable_get, _ad9361_swig.AD9361_InitParam_full_duplex_swap_bits_enable_set)
__swig_setmethods__["delay_rx_data"] = _ad9361_swig.AD9361_InitParam_delay_rx_data_set
__swig_getmethods__["delay_rx_data"] = _ad9361_swig.AD9361_InitParam_delay_rx_data_get
if _newclass:
delay_rx_data = _swig_property(_ad9361_swig.AD9361_InitParam_delay_rx_data_get, _ad9361_swig.AD9361_InitParam_delay_rx_data_set)
__swig_setmethods__["rx_data_clock_delay"] = _ad9361_swig.AD9361_InitParam_rx_data_clock_delay_set
__swig_getmethods__["rx_data_clock_delay"] = _ad9361_swig.AD9361_InitParam_rx_data_clock_delay_get
if _newclass:
rx_data_clock_delay = _swig_property(_ad9361_swig.AD9361_InitParam_rx_data_clock_delay_get, _ad9361_swig.AD9361_InitParam_rx_data_clock_delay_set)
__swig_setmethods__["rx_data_delay"] = _ad9361_swig.AD9361_InitParam_rx_data_delay_set
__swig_getmethods__["rx_data_delay"] = _ad9361_swig.AD9361_InitParam_rx_data_delay_get
if _newclass:
rx_data_delay = _swig_property(_ad9361_swig.AD9361_InitParam_rx_data_delay_get, _ad9361_swig.AD9361_InitParam_rx_data_delay_set)
__swig_setmethods__["tx_fb_clock_delay"] = _ad9361_swig.AD9361_InitParam_tx_fb_clock_delay_set
__swig_getmethods__["tx_fb_clock_delay"] = _ad9361_swig.AD9361_InitParam_tx_fb_clock_delay_get
if _newclass:
tx_fb_clock_delay = _swig_property(_ad9361_swig.AD9361_InitParam_tx_fb_clock_delay_get, _ad9361_swig.AD9361_InitParam_tx_fb_clock_delay_set)
__swig_setmethods__["tx_data_delay"] = _ad9361_swig.AD9361_InitParam_tx_data_delay_set
__swig_getmethods__["tx_data_delay"] = _ad9361_swig.AD9361_InitParam_tx_data_delay_get
if _newclass:
tx_data_delay = _swig_property(_ad9361_swig.AD9361_InitParam_tx_data_delay_get, _ad9361_swig.AD9361_InitParam_tx_data_delay_set)
__swig_setmethods__["lvds_bias_mV"] = _ad9361_swig.AD9361_InitParam_lvds_bias_mV_set
__swig_getmethods__["lvds_bias_mV"] = _ad9361_swig.AD9361_InitParam_lvds_bias_mV_get
if _newclass:
lvds_bias_mV = _swig_property(_ad9361_swig.AD9361_InitParam_lvds_bias_mV_get, _ad9361_swig.AD9361_InitParam_lvds_bias_mV_set)
__swig_setmethods__["lvds_rx_onchip_termination_enable"] = _ad9361_swig.AD9361_InitParam_lvds_rx_onchip_termination_enable_set
__swig_getmethods__["lvds_rx_onchip_termination_enable"] = _ad9361_swig.AD9361_InitParam_lvds_rx_onchip_termination_enable_get
if _newclass:
lvds_rx_onchip_termination_enable = _swig_property(_ad9361_swig.AD9361_InitParam_lvds_rx_onchip_termination_enable_get, _ad9361_swig.AD9361_InitParam_lvds_rx_onchip_termination_enable_set)
__swig_setmethods__["rx1rx2_phase_inversion_en"] = _ad9361_swig.AD9361_InitParam_rx1rx2_phase_inversion_en_set
__swig_getmethods__["rx1rx2_phase_inversion_en"] = _ad9361_swig.AD9361_InitParam_rx1rx2_phase_inversion_en_get
if _newclass:
rx1rx2_phase_inversion_en = _swig_property(_ad9361_swig.AD9361_InitParam_rx1rx2_phase_inversion_en_get, _ad9361_swig.AD9361_InitParam_rx1rx2_phase_inversion_en_set)
__swig_setmethods__["lvds_invert1_control"] = _ad9361_swig.AD9361_InitParam_lvds_invert1_control_set
__swig_getmethods__["lvds_invert1_control"] = _ad9361_swig.AD9361_InitParam_lvds_invert1_control_get
if _newclass:
lvds_invert1_control = _swig_property(_ad9361_swig.AD9361_InitParam_lvds_invert1_control_get, _ad9361_swig.AD9361_InitParam_lvds_invert1_control_set)
__swig_setmethods__["lvds_invert2_control"] = _ad9361_swig.AD9361_InitParam_lvds_invert2_control_set
__swig_getmethods__["lvds_invert2_control"] = _ad9361_swig.AD9361_InitParam_lvds_invert2_control_get
if _newclass:
lvds_invert2_control = _swig_property(_ad9361_swig.AD9361_InitParam_lvds_invert2_control_get, _ad9361_swig.AD9361_InitParam_lvds_invert2_control_set)
__swig_setmethods__["gpo0_inactive_state_high_enable"] = _ad9361_swig.AD9361_InitParam_gpo0_inactive_state_high_enable_set
__swig_getmethods__["gpo0_inactive_state_high_enable"] = _ad9361_swig.AD9361_InitParam_gpo0_inactive_state_high_enable_get
if _newclass:
gpo0_inactive_state_high_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo0_inactive_state_high_enable_get, _ad9361_swig.AD9361_InitParam_gpo0_inactive_state_high_enable_set)
__swig_setmethods__["gpo1_inactive_state_high_enable"] = _ad9361_swig.AD9361_InitParam_gpo1_inactive_state_high_enable_set
__swig_getmethods__["gpo1_inactive_state_high_enable"] = _ad9361_swig.AD9361_InitParam_gpo1_inactive_state_high_enable_get
if _newclass:
gpo1_inactive_state_high_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo1_inactive_state_high_enable_get, _ad9361_swig.AD9361_InitParam_gpo1_inactive_state_high_enable_set)
__swig_setmethods__["gpo2_inactive_state_high_enable"] = _ad9361_swig.AD9361_InitParam_gpo2_inactive_state_high_enable_set
__swig_getmethods__["gpo2_inactive_state_high_enable"] = _ad9361_swig.AD9361_InitParam_gpo2_inactive_state_high_enable_get
if _newclass:
gpo2_inactive_state_high_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo2_inactive_state_high_enable_get, _ad9361_swig.AD9361_InitParam_gpo2_inactive_state_high_enable_set)
__swig_setmethods__["gpo3_inactive_state_high_enable"] = _ad9361_swig.AD9361_InitParam_gpo3_inactive_state_high_enable_set
__swig_getmethods__["gpo3_inactive_state_high_enable"] = _ad9361_swig.AD9361_InitParam_gpo3_inactive_state_high_enable_get
if _newclass:
gpo3_inactive_state_high_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo3_inactive_state_high_enable_get, _ad9361_swig.AD9361_InitParam_gpo3_inactive_state_high_enable_set)
__swig_setmethods__["gpo0_slave_rx_enable"] = _ad9361_swig.AD9361_InitParam_gpo0_slave_rx_enable_set
__swig_getmethods__["gpo0_slave_rx_enable"] = _ad9361_swig.AD9361_InitParam_gpo0_slave_rx_enable_get
if _newclass:
gpo0_slave_rx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo0_slave_rx_enable_get, _ad9361_swig.AD9361_InitParam_gpo0_slave_rx_enable_set)
__swig_setmethods__["gpo0_slave_tx_enable"] = _ad9361_swig.AD9361_InitParam_gpo0_slave_tx_enable_set
__swig_getmethods__["gpo0_slave_tx_enable"] = _ad9361_swig.AD9361_InitParam_gpo0_slave_tx_enable_get
if _newclass:
gpo0_slave_tx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo0_slave_tx_enable_get, _ad9361_swig.AD9361_InitParam_gpo0_slave_tx_enable_set)
__swig_setmethods__["gpo1_slave_rx_enable"] = _ad9361_swig.AD9361_InitParam_gpo1_slave_rx_enable_set
__swig_getmethods__["gpo1_slave_rx_enable"] = _ad9361_swig.AD9361_InitParam_gpo1_slave_rx_enable_get
if _newclass:
gpo1_slave_rx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo1_slave_rx_enable_get, _ad9361_swig.AD9361_InitParam_gpo1_slave_rx_enable_set)
__swig_setmethods__["gpo1_slave_tx_enable"] = _ad9361_swig.AD9361_InitParam_gpo1_slave_tx_enable_set
__swig_getmethods__["gpo1_slave_tx_enable"] = _ad9361_swig.AD9361_InitParam_gpo1_slave_tx_enable_get
if _newclass:
gpo1_slave_tx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo1_slave_tx_enable_get, _ad9361_swig.AD9361_InitParam_gpo1_slave_tx_enable_set)
__swig_setmethods__["gpo2_slave_rx_enable"] = _ad9361_swig.AD9361_InitParam_gpo2_slave_rx_enable_set
__swig_getmethods__["gpo2_slave_rx_enable"] = _ad9361_swig.AD9361_InitParam_gpo2_slave_rx_enable_get
if _newclass:
gpo2_slave_rx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo2_slave_rx_enable_get, _ad9361_swig.AD9361_InitParam_gpo2_slave_rx_enable_set)
__swig_setmethods__["gpo2_slave_tx_enable"] = _ad9361_swig.AD9361_InitParam_gpo2_slave_tx_enable_set
__swig_getmethods__["gpo2_slave_tx_enable"] = _ad9361_swig.AD9361_InitParam_gpo2_slave_tx_enable_get
if _newclass:
gpo2_slave_tx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo2_slave_tx_enable_get, _ad9361_swig.AD9361_InitParam_gpo2_slave_tx_enable_set)
__swig_setmethods__["gpo3_slave_rx_enable"] = _ad9361_swig.AD9361_InitParam_gpo3_slave_rx_enable_set
__swig_getmethods__["gpo3_slave_rx_enable"] = _ad9361_swig.AD9361_InitParam_gpo3_slave_rx_enable_get
if _newclass:
gpo3_slave_rx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo3_slave_rx_enable_get, _ad9361_swig.AD9361_InitParam_gpo3_slave_rx_enable_set)
__swig_setmethods__["gpo3_slave_tx_enable"] = _ad9361_swig.AD9361_InitParam_gpo3_slave_tx_enable_set
__swig_getmethods__["gpo3_slave_tx_enable"] = _ad9361_swig.AD9361_InitParam_gpo3_slave_tx_enable_get
if _newclass:
gpo3_slave_tx_enable = _swig_property(_ad9361_swig.AD9361_InitParam_gpo3_slave_tx_enable_get, _ad9361_swig.AD9361_InitParam_gpo3_slave_tx_enable_set)
__swig_setmethods__["gpo0_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo0_rx_delay_us_set
__swig_getmethods__["gpo0_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo0_rx_delay_us_get
if _newclass:
gpo0_rx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_gpo0_rx_delay_us_get, _ad9361_swig.AD9361_InitParam_gpo0_rx_delay_us_set)
__swig_setmethods__["gpo0_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo0_tx_delay_us_set
__swig_getmethods__["gpo0_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo0_tx_delay_us_get
if _newclass:
gpo0_tx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_gpo0_tx_delay_us_get, _ad9361_swig.AD9361_InitParam_gpo0_tx_delay_us_set)
__swig_setmethods__["gpo1_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo1_rx_delay_us_set
__swig_getmethods__["gpo1_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo1_rx_delay_us_get
if _newclass:
gpo1_rx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_gpo1_rx_delay_us_get, _ad9361_swig.AD9361_InitParam_gpo1_rx_delay_us_set)
__swig_setmethods__["gpo1_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo1_tx_delay_us_set
__swig_getmethods__["gpo1_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo1_tx_delay_us_get
if _newclass:
gpo1_tx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_gpo1_tx_delay_us_get, _ad9361_swig.AD9361_InitParam_gpo1_tx_delay_us_set)
__swig_setmethods__["gpo2_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo2_rx_delay_us_set
__swig_getmethods__["gpo2_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo2_rx_delay_us_get
if _newclass:
gpo2_rx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_gpo2_rx_delay_us_get, _ad9361_swig.AD9361_InitParam_gpo2_rx_delay_us_set)
__swig_setmethods__["gpo2_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo2_tx_delay_us_set
__swig_getmethods__["gpo2_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo2_tx_delay_us_get
if _newclass:
gpo2_tx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_gpo2_tx_delay_us_get, _ad9361_swig.AD9361_InitParam_gpo2_tx_delay_us_set)
__swig_setmethods__["gpo3_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo3_rx_delay_us_set
__swig_getmethods__["gpo3_rx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo3_rx_delay_us_get
if _newclass:
gpo3_rx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_gpo3_rx_delay_us_get, _ad9361_swig.AD9361_InitParam_gpo3_rx_delay_us_set)
__swig_setmethods__["gpo3_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo3_tx_delay_us_set
__swig_getmethods__["gpo3_tx_delay_us"] = _ad9361_swig.AD9361_InitParam_gpo3_tx_delay_us_get
if _newclass:
gpo3_tx_delay_us = _swig_property(_ad9361_swig.AD9361_InitParam_gpo3_tx_delay_us_get, _ad9361_swig.AD9361_InitParam_gpo3_tx_delay_us_set)
__swig_setmethods__["low_high_gain_threshold_mdB"] = _ad9361_swig.AD9361_InitParam_low_high_gain_threshold_mdB_set
__swig_getmethods__["low_high_gain_threshold_mdB"] = _ad9361_swig.AD9361_InitParam_low_high_gain_threshold_mdB_get
if _newclass:
low_high_gain_threshold_mdB = _swig_property(_ad9361_swig.AD9361_InitParam_low_high_gain_threshold_mdB_get, _ad9361_swig.AD9361_InitParam_low_high_gain_threshold_mdB_set)
__swig_setmethods__["low_gain_dB"] = _ad9361_swig.AD9361_InitParam_low_gain_dB_set
__swig_getmethods__["low_gain_dB"] = _ad9361_swig.AD9361_InitParam_low_gain_dB_get
if _newclass:
low_gain_dB = _swig_property(_ad9361_swig.AD9361_InitParam_low_gain_dB_get, _ad9361_swig.AD9361_InitParam_low_gain_dB_set)
__swig_setmethods__["high_gain_dB"] = _ad9361_swig.AD9361_InitParam_high_gain_dB_set
__swig_getmethods__["high_gain_dB"] = _ad9361_swig.AD9361_InitParam_high_gain_dB_get
if _newclass:
high_gain_dB = _swig_property(_ad9361_swig.AD9361_InitParam_high_gain_dB_get, _ad9361_swig.AD9361_InitParam_high_gain_dB_set)
__swig_setmethods__["tx_mon_track_en"] = _ad9361_swig.AD9361_InitParam_tx_mon_track_en_set
__swig_getmethods__["tx_mon_track_en"] = _ad9361_swig.AD9361_InitParam_tx_mon_track_en_get
if _newclass:
tx_mon_track_en = _swig_property(_ad9361_swig.AD9361_InitParam_tx_mon_track_en_get, _ad9361_swig.AD9361_InitParam_tx_mon_track_en_set)
__swig_setmethods__["one_shot_mode_en"] = _ad9361_swig.AD9361_InitParam_one_shot_mode_en_set
__swig_getmethods__["one_shot_mode_en"] = _ad9361_swig.AD9361_InitParam_one_shot_mode_en_get
if _newclass:
one_shot_mode_en = _swig_property(_ad9361_swig.AD9361_InitParam_one_shot_mode_en_get, _ad9361_swig.AD9361_InitParam_one_shot_mode_en_set)
__swig_setmethods__["tx_mon_delay"] = _ad9361_swig.AD9361_InitParam_tx_mon_delay_set
__swig_getmethods__["tx_mon_delay"] = _ad9361_swig.AD9361_InitParam_tx_mon_delay_get
if _newclass:
tx_mon_delay = _swig_property(_ad9361_swig.AD9361_InitParam_tx_mon_delay_get, _ad9361_swig.AD9361_InitParam_tx_mon_delay_set)
__swig_setmethods__["tx_mon_duration"] = _ad9361_swig.AD9361_InitParam_tx_mon_duration_set
__swig_getmethods__["tx_mon_duration"] = _ad9361_swig.AD9361_InitParam_tx_mon_duration_get
if _newclass:
tx_mon_duration = _swig_property(_ad9361_swig.AD9361_InitParam_tx_mon_duration_get, _ad9361_swig.AD9361_InitParam_tx_mon_duration_set)
__swig_setmethods__["tx1_mon_front_end_gain"] = _ad9361_swig.AD9361_InitParam_tx1_mon_front_end_gain_set
__swig_getmethods__["tx1_mon_front_end_gain"] = _ad9361_swig.AD9361_InitParam_tx1_mon_front_end_gain_get
if _newclass:
tx1_mon_front_end_gain = _swig_property(_ad9361_swig.AD9361_InitParam_tx1_mon_front_end_gain_get, _ad9361_swig.AD9361_InitParam_tx1_mon_front_end_gain_set)
__swig_setmethods__["tx2_mon_front_end_gain"] = _ad9361_swig.AD9361_InitParam_tx2_mon_front_end_gain_set
__swig_getmethods__["tx2_mon_front_end_gain"] = _ad9361_swig.AD9361_InitParam_tx2_mon_front_end_gain_get
if _newclass:
tx2_mon_front_end_gain = _swig_property(_ad9361_swig.AD9361_InitParam_tx2_mon_front_end_gain_get, _ad9361_swig.AD9361_InitParam_tx2_mon_front_end_gain_set)
__swig_setmethods__["tx1_mon_lo_cm"] = _ad9361_swig.AD9361_InitParam_tx1_mon_lo_cm_set
__swig_getmethods__["tx1_mon_lo_cm"] = _ad9361_swig.AD9361_InitParam_tx1_mon_lo_cm_get
if _newclass:
tx1_mon_lo_cm = _swig_property(_ad9361_swig.AD9361_InitParam_tx1_mon_lo_cm_get, _ad9361_swig.AD9361_InitParam_tx1_mon_lo_cm_set)
__swig_setmethods__["tx2_mon_lo_cm"] = _ad9361_swig.AD9361_InitParam_tx2_mon_lo_cm_set
__swig_getmethods__["tx2_mon_lo_cm"] = _ad9361_swig.AD9361_InitParam_tx2_mon_lo_cm_get
if _newclass:
tx2_mon_lo_cm = _swig_property(_ad9361_swig.AD9361_InitParam_tx2_mon_lo_cm_get, _ad9361_swig.AD9361_InitParam_tx2_mon_lo_cm_set)
__swig_setmethods__["gpio_resetb"] = _ad9361_swig.AD9361_InitParam_gpio_resetb_set
__swig_getmethods__["gpio_resetb"] = _ad9361_swig.AD9361_InitParam_gpio_resetb_get
if _newclass:
gpio_resetb = _swig_property(_ad9361_swig.AD9361_InitParam_gpio_resetb_get, _ad9361_swig.AD9361_InitParam_gpio_resetb_set)
__swig_setmethods__["gpio_sync"] = _ad9361_swig.AD9361_InitParam_gpio_sync_set
__swig_getmethods__["gpio_sync"] = _ad9361_swig.AD9361_InitParam_gpio_sync_get
if _newclass:
gpio_sync = _swig_property(_ad9361_swig.AD9361_InitParam_gpio_sync_get, _ad9361_swig.AD9361_InitParam_gpio_sync_set)
__swig_setmethods__["gpio_cal_sw1"] = _ad9361_swig.AD9361_InitParam_gpio_cal_sw1_set
__swig_getmethods__["gpio_cal_sw1"] = _ad9361_swig.AD9361_InitParam_gpio_cal_sw1_get
if _newclass:
gpio_cal_sw1 = _swig_property(_ad9361_swig.AD9361_InitParam_gpio_cal_sw1_get, _ad9361_swig.AD9361_InitParam_gpio_cal_sw1_set)
__swig_setmethods__["gpio_cal_sw2"] = _ad9361_swig.AD9361_InitParam_gpio_cal_sw2_set
__swig_getmethods__["gpio_cal_sw2"] = _ad9361_swig.AD9361_InitParam_gpio_cal_sw2_get
if _newclass:
gpio_cal_sw2 = _swig_property(_ad9361_swig.AD9361_InitParam_gpio_cal_sw2_get, _ad9361_swig.AD9361_InitParam_gpio_cal_sw2_set)
__swig_setmethods__["ad9361_rfpll_ext_recalc_rate"] = _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_recalc_rate_set
__swig_getmethods__["ad9361_rfpll_ext_recalc_rate"] = _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_recalc_rate_get
if _newclass:
ad9361_rfpll_ext_recalc_rate = _swig_property(_ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_recalc_rate_get, _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_recalc_rate_set)
__swig_setmethods__["ad9361_rfpll_ext_round_rate"] = _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_round_rate_set
__swig_getmethods__["ad9361_rfpll_ext_round_rate"] = _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_round_rate_get
if _newclass:
ad9361_rfpll_ext_round_rate = _swig_property(_ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_round_rate_get, _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_round_rate_set)
__swig_setmethods__["ad9361_rfpll_ext_set_rate"] = _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_set_rate_set
__swig_getmethods__["ad9361_rfpll_ext_set_rate"] = _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_set_rate_get
if _newclass:
ad9361_rfpll_ext_set_rate = _swig_property(_ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_set_rate_get, _ad9361_swig.AD9361_InitParam_ad9361_rfpll_ext_set_rate_set)
def __init__(self):
this = _ad9361_swig.new_AD9361_InitParam()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_AD9361_InitParam
__del__ = lambda self: None
AD9361_InitParam_swigregister = _ad9361_swig.AD9361_InitParam_swigregister
AD9361_InitParam_swigregister(AD9361_InitParam)
[docs]class AD9361_RXFIRConfig(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, AD9361_RXFIRConfig, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, AD9361_RXFIRConfig, name)
__repr__ = _swig_repr
__swig_setmethods__["rx"] = _ad9361_swig.AD9361_RXFIRConfig_rx_set
__swig_getmethods__["rx"] = _ad9361_swig.AD9361_RXFIRConfig_rx_get
if _newclass:
rx = _swig_property(_ad9361_swig.AD9361_RXFIRConfig_rx_get, _ad9361_swig.AD9361_RXFIRConfig_rx_set)
__swig_setmethods__["rx_gain"] = _ad9361_swig.AD9361_RXFIRConfig_rx_gain_set
__swig_getmethods__["rx_gain"] = _ad9361_swig.AD9361_RXFIRConfig_rx_gain_get
if _newclass:
rx_gain = _swig_property(_ad9361_swig.AD9361_RXFIRConfig_rx_gain_get, _ad9361_swig.AD9361_RXFIRConfig_rx_gain_set)
__swig_setmethods__["rx_dec"] = _ad9361_swig.AD9361_RXFIRConfig_rx_dec_set
__swig_getmethods__["rx_dec"] = _ad9361_swig.AD9361_RXFIRConfig_rx_dec_get
if _newclass:
rx_dec = _swig_property(_ad9361_swig.AD9361_RXFIRConfig_rx_dec_get, _ad9361_swig.AD9361_RXFIRConfig_rx_dec_set)
__swig_setmethods__["rx_coef"] = _ad9361_swig.AD9361_RXFIRConfig_rx_coef_set
__swig_getmethods__["rx_coef"] = _ad9361_swig.AD9361_RXFIRConfig_rx_coef_get
if _newclass:
rx_coef = _swig_property(_ad9361_swig.AD9361_RXFIRConfig_rx_coef_get, _ad9361_swig.AD9361_RXFIRConfig_rx_coef_set)
__swig_setmethods__["rx_coef_size"] = _ad9361_swig.AD9361_RXFIRConfig_rx_coef_size_set
__swig_getmethods__["rx_coef_size"] = _ad9361_swig.AD9361_RXFIRConfig_rx_coef_size_get
if _newclass:
rx_coef_size = _swig_property(_ad9361_swig.AD9361_RXFIRConfig_rx_coef_size_get, _ad9361_swig.AD9361_RXFIRConfig_rx_coef_size_set)
__swig_setmethods__["rx_path_clks"] = _ad9361_swig.AD9361_RXFIRConfig_rx_path_clks_set
__swig_getmethods__["rx_path_clks"] = _ad9361_swig.AD9361_RXFIRConfig_rx_path_clks_get
if _newclass:
rx_path_clks = _swig_property(_ad9361_swig.AD9361_RXFIRConfig_rx_path_clks_get, _ad9361_swig.AD9361_RXFIRConfig_rx_path_clks_set)
__swig_setmethods__["rx_bandwidth"] = _ad9361_swig.AD9361_RXFIRConfig_rx_bandwidth_set
__swig_getmethods__["rx_bandwidth"] = _ad9361_swig.AD9361_RXFIRConfig_rx_bandwidth_get
if _newclass:
rx_bandwidth = _swig_property(_ad9361_swig.AD9361_RXFIRConfig_rx_bandwidth_get, _ad9361_swig.AD9361_RXFIRConfig_rx_bandwidth_set)
def __init__(self):
this = _ad9361_swig.new_AD9361_RXFIRConfig()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_AD9361_RXFIRConfig
__del__ = lambda self: None
AD9361_RXFIRConfig_swigregister = _ad9361_swig.AD9361_RXFIRConfig_swigregister
AD9361_RXFIRConfig_swigregister(AD9361_RXFIRConfig)
[docs]class AD9361_TXFIRConfig(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, AD9361_TXFIRConfig, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, AD9361_TXFIRConfig, name)
__repr__ = _swig_repr
__swig_setmethods__["tx"] = _ad9361_swig.AD9361_TXFIRConfig_tx_set
__swig_getmethods__["tx"] = _ad9361_swig.AD9361_TXFIRConfig_tx_get
if _newclass:
tx = _swig_property(_ad9361_swig.AD9361_TXFIRConfig_tx_get, _ad9361_swig.AD9361_TXFIRConfig_tx_set)
__swig_setmethods__["tx_gain"] = _ad9361_swig.AD9361_TXFIRConfig_tx_gain_set
__swig_getmethods__["tx_gain"] = _ad9361_swig.AD9361_TXFIRConfig_tx_gain_get
if _newclass:
tx_gain = _swig_property(_ad9361_swig.AD9361_TXFIRConfig_tx_gain_get, _ad9361_swig.AD9361_TXFIRConfig_tx_gain_set)
__swig_setmethods__["tx_int"] = _ad9361_swig.AD9361_TXFIRConfig_tx_int_set
__swig_getmethods__["tx_int"] = _ad9361_swig.AD9361_TXFIRConfig_tx_int_get
if _newclass:
tx_int = _swig_property(_ad9361_swig.AD9361_TXFIRConfig_tx_int_get, _ad9361_swig.AD9361_TXFIRConfig_tx_int_set)
__swig_setmethods__["tx_coef"] = _ad9361_swig.AD9361_TXFIRConfig_tx_coef_set
__swig_getmethods__["tx_coef"] = _ad9361_swig.AD9361_TXFIRConfig_tx_coef_get
if _newclass:
tx_coef = _swig_property(_ad9361_swig.AD9361_TXFIRConfig_tx_coef_get, _ad9361_swig.AD9361_TXFIRConfig_tx_coef_set)
__swig_setmethods__["tx_coef_size"] = _ad9361_swig.AD9361_TXFIRConfig_tx_coef_size_set
__swig_getmethods__["tx_coef_size"] = _ad9361_swig.AD9361_TXFIRConfig_tx_coef_size_get
if _newclass:
tx_coef_size = _swig_property(_ad9361_swig.AD9361_TXFIRConfig_tx_coef_size_get, _ad9361_swig.AD9361_TXFIRConfig_tx_coef_size_set)
__swig_setmethods__["tx_path_clks"] = _ad9361_swig.AD9361_TXFIRConfig_tx_path_clks_set
__swig_getmethods__["tx_path_clks"] = _ad9361_swig.AD9361_TXFIRConfig_tx_path_clks_get
if _newclass:
tx_path_clks = _swig_property(_ad9361_swig.AD9361_TXFIRConfig_tx_path_clks_get, _ad9361_swig.AD9361_TXFIRConfig_tx_path_clks_set)
__swig_setmethods__["tx_bandwidth"] = _ad9361_swig.AD9361_TXFIRConfig_tx_bandwidth_set
__swig_getmethods__["tx_bandwidth"] = _ad9361_swig.AD9361_TXFIRConfig_tx_bandwidth_get
if _newclass:
tx_bandwidth = _swig_property(_ad9361_swig.AD9361_TXFIRConfig_tx_bandwidth_get, _ad9361_swig.AD9361_TXFIRConfig_tx_bandwidth_set)
def __init__(self):
this = _ad9361_swig.new_AD9361_TXFIRConfig()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_AD9361_TXFIRConfig
__del__ = lambda self: None
AD9361_TXFIRConfig_swigregister = _ad9361_swig.AD9361_TXFIRConfig_swigregister
AD9361_TXFIRConfig_swigregister(AD9361_TXFIRConfig)
_ad9361_swig.ENSM_MODE_TX_swigconstant(_ad9361_swig)
ENSM_MODE_TX = _ad9361_swig.ENSM_MODE_TX
_ad9361_swig.ENSM_MODE_RX_swigconstant(_ad9361_swig)
ENSM_MODE_RX = _ad9361_swig.ENSM_MODE_RX
_ad9361_swig.ENSM_MODE_ALERT_swigconstant(_ad9361_swig)
ENSM_MODE_ALERT = _ad9361_swig.ENSM_MODE_ALERT
_ad9361_swig.ENSM_MODE_FDD_swigconstant(_ad9361_swig)
ENSM_MODE_FDD = _ad9361_swig.ENSM_MODE_FDD
_ad9361_swig.ENSM_MODE_WAIT_swigconstant(_ad9361_swig)
ENSM_MODE_WAIT = _ad9361_swig.ENSM_MODE_WAIT
_ad9361_swig.ENSM_MODE_SLEEP_swigconstant(_ad9361_swig)
ENSM_MODE_SLEEP = _ad9361_swig.ENSM_MODE_SLEEP
_ad9361_swig.ENSM_MODE_PINCTRL_swigconstant(_ad9361_swig)
ENSM_MODE_PINCTRL = _ad9361_swig.ENSM_MODE_PINCTRL
_ad9361_swig.ENSM_MODE_PINCTRL_FDD_INDEP_swigconstant(_ad9361_swig)
ENSM_MODE_PINCTRL_FDD_INDEP = _ad9361_swig.ENSM_MODE_PINCTRL_FDD_INDEP
_ad9361_swig.ENABLE_swigconstant(_ad9361_swig)
ENABLE = _ad9361_swig.ENABLE
_ad9361_swig.DISABLE_swigconstant(_ad9361_swig)
DISABLE = _ad9361_swig.DISABLE
_ad9361_swig.RX1_swigconstant(_ad9361_swig)
RX1 = _ad9361_swig.RX1
_ad9361_swig.RX2_swigconstant(_ad9361_swig)
RX2 = _ad9361_swig.RX2
_ad9361_swig.TX1_swigconstant(_ad9361_swig)
TX1 = _ad9361_swig.TX1
_ad9361_swig.TX2_swigconstant(_ad9361_swig)
TX2 = _ad9361_swig.TX2
_ad9361_swig.A_BALANCED_swigconstant(_ad9361_swig)
A_BALANCED = _ad9361_swig.A_BALANCED
_ad9361_swig.B_BALANCED_swigconstant(_ad9361_swig)
B_BALANCED = _ad9361_swig.B_BALANCED
_ad9361_swig.C_BALANCED_swigconstant(_ad9361_swig)
C_BALANCED = _ad9361_swig.C_BALANCED
_ad9361_swig.A_N_swigconstant(_ad9361_swig)
A_N = _ad9361_swig.A_N
_ad9361_swig.A_P_swigconstant(_ad9361_swig)
A_P = _ad9361_swig.A_P
_ad9361_swig.B_N_swigconstant(_ad9361_swig)
B_N = _ad9361_swig.B_N
_ad9361_swig.B_P_swigconstant(_ad9361_swig)
B_P = _ad9361_swig.B_P
_ad9361_swig.C_N_swigconstant(_ad9361_swig)
C_N = _ad9361_swig.C_N
_ad9361_swig.C_P_swigconstant(_ad9361_swig)
C_P = _ad9361_swig.C_P
_ad9361_swig.TX_MON1_swigconstant(_ad9361_swig)
TX_MON1 = _ad9361_swig.TX_MON1
_ad9361_swig.TX_MON2_swigconstant(_ad9361_swig)
TX_MON2 = _ad9361_swig.TX_MON2
_ad9361_swig.TX_MON1_2_swigconstant(_ad9361_swig)
TX_MON1_2 = _ad9361_swig.TX_MON1_2
_ad9361_swig.TXA_swigconstant(_ad9361_swig)
TXA = _ad9361_swig.TXA
_ad9361_swig.TXB_swigconstant(_ad9361_swig)
TXB = _ad9361_swig.TXB
_ad9361_swig.MODE_1x1_swigconstant(_ad9361_swig)
MODE_1x1 = _ad9361_swig.MODE_1x1
_ad9361_swig.MODE_2x2_swigconstant(_ad9361_swig)
MODE_2x2 = _ad9361_swig.MODE_2x2
_ad9361_swig.HIGHEST_OSR_swigconstant(_ad9361_swig)
HIGHEST_OSR = _ad9361_swig.HIGHEST_OSR
_ad9361_swig.NOMINAL_OSR_swigconstant(_ad9361_swig)
NOMINAL_OSR = _ad9361_swig.NOMINAL_OSR
_ad9361_swig.INT_LO_swigconstant(_ad9361_swig)
INT_LO = _ad9361_swig.INT_LO
_ad9361_swig.EXT_LO_swigconstant(_ad9361_swig)
EXT_LO = _ad9361_swig.EXT_LO
def ad9361_init(ad9361_phy, init_param):
return _ad9361_swig.ad9361_init(ad9361_phy, init_param)
ad9361_init = _ad9361_swig.ad9361_init
def ad9361_set_en_state_machine_mode(phy, mode):
return _ad9361_swig.ad9361_set_en_state_machine_mode(phy, mode)
ad9361_set_en_state_machine_mode = _ad9361_swig.ad9361_set_en_state_machine_mode
def ad9361_get_en_state_machine_mode(phy):
return _ad9361_swig.ad9361_get_en_state_machine_mode(phy)
ad9361_get_en_state_machine_mode = _ad9361_swig.ad9361_get_en_state_machine_mode
def ad9361_set_rx_rf_gain(phy, ch, gain_db):
return _ad9361_swig.ad9361_set_rx_rf_gain(phy, ch, gain_db)
ad9361_set_rx_rf_gain = _ad9361_swig.ad9361_set_rx_rf_gain
def ad9361_get_rx_rf_gain(phy, ch):
return _ad9361_swig.ad9361_get_rx_rf_gain(phy, ch)
ad9361_get_rx_rf_gain = _ad9361_swig.ad9361_get_rx_rf_gain
def ad9361_set_rx_rf_bandwidth(phy, bandwidth_hz):
return _ad9361_swig.ad9361_set_rx_rf_bandwidth(phy, bandwidth_hz)
ad9361_set_rx_rf_bandwidth = _ad9361_swig.ad9361_set_rx_rf_bandwidth
def ad9361_get_rx_rf_bandwidth(phy):
return _ad9361_swig.ad9361_get_rx_rf_bandwidth(phy)
ad9361_get_rx_rf_bandwidth = _ad9361_swig.ad9361_get_rx_rf_bandwidth
def ad9361_set_rx_sampling_freq(phy, sampling_freq_hz):
return _ad9361_swig.ad9361_set_rx_sampling_freq(phy, sampling_freq_hz)
ad9361_set_rx_sampling_freq = _ad9361_swig.ad9361_set_rx_sampling_freq
def ad9361_get_rx_sampling_freq(phy):
return _ad9361_swig.ad9361_get_rx_sampling_freq(phy)
ad9361_get_rx_sampling_freq = _ad9361_swig.ad9361_get_rx_sampling_freq
def ad9361_set_rx_lo_freq(phy, lo_freq_hz):
return _ad9361_swig.ad9361_set_rx_lo_freq(phy, lo_freq_hz)
ad9361_set_rx_lo_freq = _ad9361_swig.ad9361_set_rx_lo_freq
def ad9361_get_rx_lo_freq(phy):
return _ad9361_swig.ad9361_get_rx_lo_freq(phy)
ad9361_get_rx_lo_freq = _ad9361_swig.ad9361_get_rx_lo_freq
def ad9361_set_rx_lo_int_ext(phy, int_ext):
return _ad9361_swig.ad9361_set_rx_lo_int_ext(phy, int_ext)
ad9361_set_rx_lo_int_ext = _ad9361_swig.ad9361_set_rx_lo_int_ext
def ad9361_get_rx_rssi(phy, ch, rssi):
return _ad9361_swig.ad9361_get_rx_rssi(phy, ch, rssi)
ad9361_get_rx_rssi = _ad9361_swig.ad9361_get_rx_rssi
def ad9361_set_rx_gain_control_mode(phy, ch, gc_mode):
return _ad9361_swig.ad9361_set_rx_gain_control_mode(phy, ch, gc_mode)
ad9361_set_rx_gain_control_mode = _ad9361_swig.ad9361_set_rx_gain_control_mode
def ad9361_get_rx_gain_control_mode(phy, ch):
return _ad9361_swig.ad9361_get_rx_gain_control_mode(phy, ch)
ad9361_get_rx_gain_control_mode = _ad9361_swig.ad9361_get_rx_gain_control_mode
def ad9361_set_rx_fir_config(phy, fir_cfg):
return _ad9361_swig.ad9361_set_rx_fir_config(phy, fir_cfg)
ad9361_set_rx_fir_config = _ad9361_swig.ad9361_set_rx_fir_config
def ad9361_get_rx_fir_config(phy, rx_ch, fir_cfg):
return _ad9361_swig.ad9361_get_rx_fir_config(phy, rx_ch, fir_cfg)
ad9361_get_rx_fir_config = _ad9361_swig.ad9361_get_rx_fir_config
def ad9361_set_rx_fir_en_dis(phy, en_dis):
return _ad9361_swig.ad9361_set_rx_fir_en_dis(phy, en_dis)
ad9361_set_rx_fir_en_dis = _ad9361_swig.ad9361_set_rx_fir_en_dis
def ad9361_get_rx_fir_en_dis(phy):
return _ad9361_swig.ad9361_get_rx_fir_en_dis(phy)
ad9361_get_rx_fir_en_dis = _ad9361_swig.ad9361_get_rx_fir_en_dis
def ad9361_set_rx_rfdc_track_en_dis(phy, en_dis):
return _ad9361_swig.ad9361_set_rx_rfdc_track_en_dis(phy, en_dis)
ad9361_set_rx_rfdc_track_en_dis = _ad9361_swig.ad9361_set_rx_rfdc_track_en_dis
def ad9361_get_rx_rfdc_track_en_dis(phy):
return _ad9361_swig.ad9361_get_rx_rfdc_track_en_dis(phy)
ad9361_get_rx_rfdc_track_en_dis = _ad9361_swig.ad9361_get_rx_rfdc_track_en_dis
def ad9361_set_rx_bbdc_track_en_dis(phy, en_dis):
return _ad9361_swig.ad9361_set_rx_bbdc_track_en_dis(phy, en_dis)
ad9361_set_rx_bbdc_track_en_dis = _ad9361_swig.ad9361_set_rx_bbdc_track_en_dis
def ad9361_get_rx_bbdc_track_en_dis(phy):
return _ad9361_swig.ad9361_get_rx_bbdc_track_en_dis(phy)
ad9361_get_rx_bbdc_track_en_dis = _ad9361_swig.ad9361_get_rx_bbdc_track_en_dis
def ad9361_set_rx_quad_track_en_dis(phy, en_dis):
return _ad9361_swig.ad9361_set_rx_quad_track_en_dis(phy, en_dis)
ad9361_set_rx_quad_track_en_dis = _ad9361_swig.ad9361_set_rx_quad_track_en_dis
def ad9361_get_rx_quad_track_en_dis(phy):
return _ad9361_swig.ad9361_get_rx_quad_track_en_dis(phy)
ad9361_get_rx_quad_track_en_dis = _ad9361_swig.ad9361_get_rx_quad_track_en_dis
def ad9361_set_rx_rf_port_input(phy, mode):
return _ad9361_swig.ad9361_set_rx_rf_port_input(phy, mode)
ad9361_set_rx_rf_port_input = _ad9361_swig.ad9361_set_rx_rf_port_input
def ad9361_get_rx_rf_port_input(phy):
return _ad9361_swig.ad9361_get_rx_rf_port_input(phy)
ad9361_get_rx_rf_port_input = _ad9361_swig.ad9361_get_rx_rf_port_input
def ad9361_rx_fastlock_store(phy, profile):
return _ad9361_swig.ad9361_rx_fastlock_store(phy, profile)
ad9361_rx_fastlock_store = _ad9361_swig.ad9361_rx_fastlock_store
def ad9361_rx_fastlock_recall(phy, profile):
return _ad9361_swig.ad9361_rx_fastlock_recall(phy, profile)
ad9361_rx_fastlock_recall = _ad9361_swig.ad9361_rx_fastlock_recall
def ad9361_rx_fastlock_load(phy, profile, values):
return _ad9361_swig.ad9361_rx_fastlock_load(phy, profile, values)
ad9361_rx_fastlock_load = _ad9361_swig.ad9361_rx_fastlock_load
def ad9361_rx_fastlock_save(phy, profile, values):
return _ad9361_swig.ad9361_rx_fastlock_save(phy, profile, values)
ad9361_rx_fastlock_save = _ad9361_swig.ad9361_rx_fastlock_save
def ad9361_set_tx_attenuation(phy, ch, attenuation_mdb):
return _ad9361_swig.ad9361_set_tx_attenuation(phy, ch, attenuation_mdb)
ad9361_set_tx_attenuation = _ad9361_swig.ad9361_set_tx_attenuation
def ad9361_get_tx_attenuation(phy, ch):
return _ad9361_swig.ad9361_get_tx_attenuation(phy, ch)
ad9361_get_tx_attenuation = _ad9361_swig.ad9361_get_tx_attenuation
def ad9361_set_tx_rf_bandwidth(phy, bandwidth_hz):
return _ad9361_swig.ad9361_set_tx_rf_bandwidth(phy, bandwidth_hz)
ad9361_set_tx_rf_bandwidth = _ad9361_swig.ad9361_set_tx_rf_bandwidth
def ad9361_get_tx_rf_bandwidth(phy):
return _ad9361_swig.ad9361_get_tx_rf_bandwidth(phy)
ad9361_get_tx_rf_bandwidth = _ad9361_swig.ad9361_get_tx_rf_bandwidth
def ad9361_set_tx_sampling_freq(phy, sampling_freq_hz):
return _ad9361_swig.ad9361_set_tx_sampling_freq(phy, sampling_freq_hz)
ad9361_set_tx_sampling_freq = _ad9361_swig.ad9361_set_tx_sampling_freq
def ad9361_get_tx_sampling_freq(phy):
return _ad9361_swig.ad9361_get_tx_sampling_freq(phy)
ad9361_get_tx_sampling_freq = _ad9361_swig.ad9361_get_tx_sampling_freq
def ad9361_set_tx_lo_freq(phy, lo_freq_hz):
return _ad9361_swig.ad9361_set_tx_lo_freq(phy, lo_freq_hz)
ad9361_set_tx_lo_freq = _ad9361_swig.ad9361_set_tx_lo_freq
def ad9361_get_tx_lo_freq(phy):
return _ad9361_swig.ad9361_get_tx_lo_freq(phy)
ad9361_get_tx_lo_freq = _ad9361_swig.ad9361_get_tx_lo_freq
def ad9361_set_tx_lo_int_ext(phy, int_ext):
return _ad9361_swig.ad9361_set_tx_lo_int_ext(phy, int_ext)
ad9361_set_tx_lo_int_ext = _ad9361_swig.ad9361_set_tx_lo_int_ext
def ad9361_set_tx_fir_config(phy, fir_cfg):
return _ad9361_swig.ad9361_set_tx_fir_config(phy, fir_cfg)
ad9361_set_tx_fir_config = _ad9361_swig.ad9361_set_tx_fir_config
def ad9361_get_tx_fir_config(phy, tx_ch, fir_cfg):
return _ad9361_swig.ad9361_get_tx_fir_config(phy, tx_ch, fir_cfg)
ad9361_get_tx_fir_config = _ad9361_swig.ad9361_get_tx_fir_config
def ad9361_set_tx_fir_en_dis(phy, en_dis):
return _ad9361_swig.ad9361_set_tx_fir_en_dis(phy, en_dis)
ad9361_set_tx_fir_en_dis = _ad9361_swig.ad9361_set_tx_fir_en_dis
def ad9361_get_tx_fir_en_dis(phy):
return _ad9361_swig.ad9361_get_tx_fir_en_dis(phy)
ad9361_get_tx_fir_en_dis = _ad9361_swig.ad9361_get_tx_fir_en_dis
def ad9361_get_tx_rssi(phy, ch):
return _ad9361_swig.ad9361_get_tx_rssi(phy, ch)
ad9361_get_tx_rssi = _ad9361_swig.ad9361_get_tx_rssi
def ad9361_set_tx_rf_port_output(phy, mode):
return _ad9361_swig.ad9361_set_tx_rf_port_output(phy, mode)
ad9361_set_tx_rf_port_output = _ad9361_swig.ad9361_set_tx_rf_port_output
def ad9361_get_tx_rf_port_output(phy):
return _ad9361_swig.ad9361_get_tx_rf_port_output(phy)
ad9361_get_tx_rf_port_output = _ad9361_swig.ad9361_get_tx_rf_port_output
def ad9361_set_tx_auto_cal_en_dis(phy, en_dis):
return _ad9361_swig.ad9361_set_tx_auto_cal_en_dis(phy, en_dis)
ad9361_set_tx_auto_cal_en_dis = _ad9361_swig.ad9361_set_tx_auto_cal_en_dis
def ad9361_get_tx_auto_cal_en_dis(phy):
return _ad9361_swig.ad9361_get_tx_auto_cal_en_dis(phy)
ad9361_get_tx_auto_cal_en_dis = _ad9361_swig.ad9361_get_tx_auto_cal_en_dis
def ad9361_tx_fastlock_store(phy, profile):
return _ad9361_swig.ad9361_tx_fastlock_store(phy, profile)
ad9361_tx_fastlock_store = _ad9361_swig.ad9361_tx_fastlock_store
def ad9361_tx_fastlock_recall(phy, profile):
return _ad9361_swig.ad9361_tx_fastlock_recall(phy, profile)
ad9361_tx_fastlock_recall = _ad9361_swig.ad9361_tx_fastlock_recall
def ad9361_tx_fastlock_load(phy, profile, values):
return _ad9361_swig.ad9361_tx_fastlock_load(phy, profile, values)
ad9361_tx_fastlock_load = _ad9361_swig.ad9361_tx_fastlock_load
def ad9361_tx_fastlock_save(phy, profile, values):
return _ad9361_swig.ad9361_tx_fastlock_save(phy, profile, values)
ad9361_tx_fastlock_save = _ad9361_swig.ad9361_tx_fastlock_save
def ad9361_set_trx_path_clks(phy, rx_path_clks):
return _ad9361_swig.ad9361_set_trx_path_clks(phy, rx_path_clks)
ad9361_set_trx_path_clks = _ad9361_swig.ad9361_set_trx_path_clks
def ad9361_get_trx_path_clks(phy, rx_path_clks):
return _ad9361_swig.ad9361_get_trx_path_clks(phy, rx_path_clks)
ad9361_get_trx_path_clks = _ad9361_swig.ad9361_get_trx_path_clks
def ad9361_set_no_ch_mode(phy, no_ch_mode):
return _ad9361_swig.ad9361_set_no_ch_mode(phy, no_ch_mode)
ad9361_set_no_ch_mode = _ad9361_swig.ad9361_set_no_ch_mode
def ad9361_do_mcs(phy_master, phy_slave):
return _ad9361_swig.ad9361_do_mcs(phy_master, phy_slave)
ad9361_do_mcs = _ad9361_swig.ad9361_do_mcs
def ad9361_set_trx_fir_en_dis(phy, en_dis):
return _ad9361_swig.ad9361_set_trx_fir_en_dis(phy, en_dis)
ad9361_set_trx_fir_en_dis = _ad9361_swig.ad9361_set_trx_fir_en_dis
def ad9361_set_trx_rate_gov(phy, rate_gov):
return _ad9361_swig.ad9361_set_trx_rate_gov(phy, rate_gov)
ad9361_set_trx_rate_gov = _ad9361_swig.ad9361_set_trx_rate_gov
def ad9361_get_trx_rate_gov(phy):
return _ad9361_swig.ad9361_get_trx_rate_gov(phy)
ad9361_get_trx_rate_gov = _ad9361_swig.ad9361_get_trx_rate_gov
def ad9361_do_calib(phy, cal, arg):
return _ad9361_swig.ad9361_do_calib(phy, cal, arg)
ad9361_do_calib = _ad9361_swig.ad9361_do_calib
def ad9361_trx_load_enable_fir(phy, rx_fir_cfg, tx_fir_cfg):
return _ad9361_swig.ad9361_trx_load_enable_fir(phy, rx_fir_cfg, tx_fir_cfg)
ad9361_trx_load_enable_fir = _ad9361_swig.ad9361_trx_load_enable_fir
def init(spidev_name, default_init_param, tx_fir_config, rx_fir_config):
return _ad9361_swig.init(spidev_name, default_init_param, tx_fir_config, rx_fir_config)
init = _ad9361_swig.init
def get_init_param():
return _ad9361_swig.get_init_param()
get_init_param = _ad9361_swig.get_init_param
def get_tx_fir_config():
return _ad9361_swig.get_tx_fir_config()
get_tx_fir_config = _ad9361_swig.get_tx_fir_config
def get_rx_fir_config():
return _ad9361_swig.get_rx_fir_config()
get_rx_fir_config = _ad9361_swig.get_rx_fir_config
def spi_read(reg):
return _ad9361_swig.spi_read(reg)
spi_read = _ad9361_swig.spi_read
def spi_write(reg, val):
return _ad9361_swig.spi_write(reg, val)
spi_write = _ad9361_swig.spi_write
def set_rx_fir_config(fir_cfg):
return _ad9361_swig.set_rx_fir_config(fir_cfg)
set_rx_fir_config = _ad9361_swig.set_rx_fir_config
def set_tx_fir_config(fir_cfg):
return _ad9361_swig.set_tx_fir_config(fir_cfg)
set_tx_fir_config = _ad9361_swig.set_tx_fir_config
[docs]class bist_tone(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, bist_tone, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, bist_tone, name)
__repr__ = _swig_repr
__swig_setmethods__["mode"] = _ad9361_swig.bist_tone_mode_set
__swig_getmethods__["mode"] = _ad9361_swig.bist_tone_mode_get
if _newclass:
mode = _swig_property(_ad9361_swig.bist_tone_mode_get, _ad9361_swig.bist_tone_mode_set)
__swig_setmethods__["freq_Hz"] = _ad9361_swig.bist_tone_freq_Hz_set
__swig_getmethods__["freq_Hz"] = _ad9361_swig.bist_tone_freq_Hz_get
if _newclass:
freq_Hz = _swig_property(_ad9361_swig.bist_tone_freq_Hz_get, _ad9361_swig.bist_tone_freq_Hz_set)
__swig_setmethods__["level_dB"] = _ad9361_swig.bist_tone_level_dB_set
__swig_getmethods__["level_dB"] = _ad9361_swig.bist_tone_level_dB_get
if _newclass:
level_dB = _swig_property(_ad9361_swig.bist_tone_level_dB_get, _ad9361_swig.bist_tone_level_dB_set)
__swig_setmethods__["mask"] = _ad9361_swig.bist_tone_mask_set
__swig_getmethods__["mask"] = _ad9361_swig.bist_tone_mask_get
if _newclass:
mask = _swig_property(_ad9361_swig.bist_tone_mask_get, _ad9361_swig.bist_tone_mask_set)
def __init__(self):
this = _ad9361_swig.new_bist_tone()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_bist_tone
__del__ = lambda self: None
bist_tone_swigregister = _ad9361_swig.bist_tone_swigregister
bist_tone_swigregister(bist_tone)
def bist_loopback(mode):
return _ad9361_swig.bist_loopback(mode)
bist_loopback = _ad9361_swig.bist_loopback
def get_bist_loopback():
return _ad9361_swig.get_bist_loopback()
get_bist_loopback = _ad9361_swig.get_bist_loopback
def bist_prbs(mode):
return _ad9361_swig.bist_prbs(mode)
bist_prbs = _ad9361_swig.bist_prbs
def get_bist_prbs():
return _ad9361_swig.get_bist_prbs()
get_bist_prbs = _ad9361_swig.get_bist_prbs
def set_bist_tone(mode, freq_Hz, level_dB, mask):
return _ad9361_swig.set_bist_tone(mode, freq_Hz, level_dB, mask)
set_bist_tone = _ad9361_swig.set_bist_tone
def get_bist_tone():
return _ad9361_swig.get_bist_tone()
get_bist_tone = _ad9361_swig.get_bist_tone
def set_tx_attenuation(ch, attenuation_mdb):
return _ad9361_swig.set_tx_attenuation(ch, attenuation_mdb)
set_tx_attenuation = _ad9361_swig.set_tx_attenuation
def get_tx_attenuation(ch):
return _ad9361_swig.get_tx_attenuation(ch)
get_tx_attenuation = _ad9361_swig.get_tx_attenuation
def get_ad9361_phy():
return _ad9361_swig.get_ad9361_phy()
get_ad9361_phy = _ad9361_swig.get_ad9361_phy
_ad9361_swig.REG_SPI_CONF_swigconstant(_ad9361_swig)
REG_SPI_CONF = _ad9361_swig.REG_SPI_CONF
_ad9361_swig.REG_MULTICHIP_SYNC_AND_TX_MON_CTRL_swigconstant(_ad9361_swig)
REG_MULTICHIP_SYNC_AND_TX_MON_CTRL = _ad9361_swig.REG_MULTICHIP_SYNC_AND_TX_MON_CTRL
_ad9361_swig.REG_TX_ENABLE_FILTER_CTRL_swigconstant(_ad9361_swig)
REG_TX_ENABLE_FILTER_CTRL = _ad9361_swig.REG_TX_ENABLE_FILTER_CTRL
_ad9361_swig.REG_RX_ENABLE_FILTER_CTRL_swigconstant(_ad9361_swig)
REG_RX_ENABLE_FILTER_CTRL = _ad9361_swig.REG_RX_ENABLE_FILTER_CTRL
_ad9361_swig.REG_INPUT_SELECT_swigconstant(_ad9361_swig)
REG_INPUT_SELECT = _ad9361_swig.REG_INPUT_SELECT
_ad9361_swig.REG_RFPLL_DIVIDERS_swigconstant(_ad9361_swig)
REG_RFPLL_DIVIDERS = _ad9361_swig.REG_RFPLL_DIVIDERS
_ad9361_swig.REG_RX_CLOCK_DATA_DELAY_swigconstant(_ad9361_swig)
REG_RX_CLOCK_DATA_DELAY = _ad9361_swig.REG_RX_CLOCK_DATA_DELAY
_ad9361_swig.REG_TX_CLOCK_DATA_DELAY_swigconstant(_ad9361_swig)
REG_TX_CLOCK_DATA_DELAY = _ad9361_swig.REG_TX_CLOCK_DATA_DELAY
_ad9361_swig.REG_CLOCK_ENABLE_swigconstant(_ad9361_swig)
REG_CLOCK_ENABLE = _ad9361_swig.REG_CLOCK_ENABLE
_ad9361_swig.REG_BBPLL_swigconstant(_ad9361_swig)
REG_BBPLL = _ad9361_swig.REG_BBPLL
_ad9361_swig.REG_TEMP_OFFSET_swigconstant(_ad9361_swig)
REG_TEMP_OFFSET = _ad9361_swig.REG_TEMP_OFFSET
_ad9361_swig.REG_START_TEMP_READING_swigconstant(_ad9361_swig)
REG_START_TEMP_READING = _ad9361_swig.REG_START_TEMP_READING
_ad9361_swig.REG_TEMP_SENSE2_swigconstant(_ad9361_swig)
REG_TEMP_SENSE2 = _ad9361_swig.REG_TEMP_SENSE2
_ad9361_swig.REG_TEMPERATURE_swigconstant(_ad9361_swig)
REG_TEMPERATURE = _ad9361_swig.REG_TEMPERATURE
_ad9361_swig.REG_TEMP_SENSOR_CONFIG_swigconstant(_ad9361_swig)
REG_TEMP_SENSOR_CONFIG = _ad9361_swig.REG_TEMP_SENSOR_CONFIG
_ad9361_swig.REG_PARALLEL_PORT_CONF_1_swigconstant(_ad9361_swig)
REG_PARALLEL_PORT_CONF_1 = _ad9361_swig.REG_PARALLEL_PORT_CONF_1
_ad9361_swig.REG_PARALLEL_PORT_CONF_2_swigconstant(_ad9361_swig)
REG_PARALLEL_PORT_CONF_2 = _ad9361_swig.REG_PARALLEL_PORT_CONF_2
_ad9361_swig.REG_PARALLEL_PORT_CONF_3_swigconstant(_ad9361_swig)
REG_PARALLEL_PORT_CONF_3 = _ad9361_swig.REG_PARALLEL_PORT_CONF_3
_ad9361_swig.REG_ENSM_MODE_swigconstant(_ad9361_swig)
REG_ENSM_MODE = _ad9361_swig.REG_ENSM_MODE
_ad9361_swig.REG_ENSM_CONFIG_1_swigconstant(_ad9361_swig)
REG_ENSM_CONFIG_1 = _ad9361_swig.REG_ENSM_CONFIG_1
_ad9361_swig.REG_ENSM_CONFIG_2_swigconstant(_ad9361_swig)
REG_ENSM_CONFIG_2 = _ad9361_swig.REG_ENSM_CONFIG_2
_ad9361_swig.REG_CALIBRATION_CTRL_swigconstant(_ad9361_swig)
REG_CALIBRATION_CTRL = _ad9361_swig.REG_CALIBRATION_CTRL
_ad9361_swig.REG_STATE_swigconstant(_ad9361_swig)
REG_STATE = _ad9361_swig.REG_STATE
_ad9361_swig.REG_AUXDAC_1_WORD_swigconstant(_ad9361_swig)
REG_AUXDAC_1_WORD = _ad9361_swig.REG_AUXDAC_1_WORD
_ad9361_swig.REG_AUXDAC_2_WORD_swigconstant(_ad9361_swig)
REG_AUXDAC_2_WORD = _ad9361_swig.REG_AUXDAC_2_WORD
_ad9361_swig.REG_AUXDAC_1_CONFIG_swigconstant(_ad9361_swig)
REG_AUXDAC_1_CONFIG = _ad9361_swig.REG_AUXDAC_1_CONFIG
_ad9361_swig.REG_AUXDAC_2_CONFIG_swigconstant(_ad9361_swig)
REG_AUXDAC_2_CONFIG = _ad9361_swig.REG_AUXDAC_2_CONFIG
_ad9361_swig.REG_AUXADC_CLOCK_DIVIDER_swigconstant(_ad9361_swig)
REG_AUXADC_CLOCK_DIVIDER = _ad9361_swig.REG_AUXADC_CLOCK_DIVIDER
_ad9361_swig.REG_AUXADC_CONFIG_swigconstant(_ad9361_swig)
REG_AUXADC_CONFIG = _ad9361_swig.REG_AUXADC_CONFIG
_ad9361_swig.REG_AUXADC_WORD_MSB_swigconstant(_ad9361_swig)
REG_AUXADC_WORD_MSB = _ad9361_swig.REG_AUXADC_WORD_MSB
_ad9361_swig.REG_AUXADC_LSB_swigconstant(_ad9361_swig)
REG_AUXADC_LSB = _ad9361_swig.REG_AUXADC_LSB
_ad9361_swig.REG_AUTO_GPO_swigconstant(_ad9361_swig)
REG_AUTO_GPO = _ad9361_swig.REG_AUTO_GPO
_ad9361_swig.REG_AGC_GAIN_LOCK_DELAY_swigconstant(_ad9361_swig)
REG_AGC_GAIN_LOCK_DELAY = _ad9361_swig.REG_AGC_GAIN_LOCK_DELAY
_ad9361_swig.REG_AGC_ATTACK_DELAY_swigconstant(_ad9361_swig)
REG_AGC_ATTACK_DELAY = _ad9361_swig.REG_AGC_ATTACK_DELAY
_ad9361_swig.REG_AUXDAC_ENABLE_CTRL_swigconstant(_ad9361_swig)
REG_AUXDAC_ENABLE_CTRL = _ad9361_swig.REG_AUXDAC_ENABLE_CTRL
_ad9361_swig.REG_RX_LOAD_SYNTH_DELAY_swigconstant(_ad9361_swig)
REG_RX_LOAD_SYNTH_DELAY = _ad9361_swig.REG_RX_LOAD_SYNTH_DELAY
_ad9361_swig.REG_TX_LOAD_SYNTH_DELAY_swigconstant(_ad9361_swig)
REG_TX_LOAD_SYNTH_DELAY = _ad9361_swig.REG_TX_LOAD_SYNTH_DELAY
_ad9361_swig.REG_EXTERNAL_LNA_CTRL_swigconstant(_ad9361_swig)
REG_EXTERNAL_LNA_CTRL = _ad9361_swig.REG_EXTERNAL_LNA_CTRL
_ad9361_swig.REG_GPO_FORCE_AND_INIT_swigconstant(_ad9361_swig)
REG_GPO_FORCE_AND_INIT = _ad9361_swig.REG_GPO_FORCE_AND_INIT
_ad9361_swig.REG_GPO0_RX_DELAY_swigconstant(_ad9361_swig)
REG_GPO0_RX_DELAY = _ad9361_swig.REG_GPO0_RX_DELAY
_ad9361_swig.REG_GPO1_RX_DELAY_swigconstant(_ad9361_swig)
REG_GPO1_RX_DELAY = _ad9361_swig.REG_GPO1_RX_DELAY
_ad9361_swig.REG_GPO2_RX_DELAY_swigconstant(_ad9361_swig)
REG_GPO2_RX_DELAY = _ad9361_swig.REG_GPO2_RX_DELAY
_ad9361_swig.REG_GPO3_RX_DELAY_swigconstant(_ad9361_swig)
REG_GPO3_RX_DELAY = _ad9361_swig.REG_GPO3_RX_DELAY
_ad9361_swig.REG_GPO0_TX_DELAY_swigconstant(_ad9361_swig)
REG_GPO0_TX_DELAY = _ad9361_swig.REG_GPO0_TX_DELAY
_ad9361_swig.REG_GPO1_TX_DELAY_swigconstant(_ad9361_swig)
REG_GPO1_TX_DELAY = _ad9361_swig.REG_GPO1_TX_DELAY
_ad9361_swig.REG_GPO2_TX_DELAY_swigconstant(_ad9361_swig)
REG_GPO2_TX_DELAY = _ad9361_swig.REG_GPO2_TX_DELAY
_ad9361_swig.REG_GPO3_TX_DELAY_swigconstant(_ad9361_swig)
REG_GPO3_TX_DELAY = _ad9361_swig.REG_GPO3_TX_DELAY
_ad9361_swig.REG_AUXDAC1_RX_DELAY_swigconstant(_ad9361_swig)
REG_AUXDAC1_RX_DELAY = _ad9361_swig.REG_AUXDAC1_RX_DELAY
_ad9361_swig.REG_AUXDAC1_TX_DELAY_swigconstant(_ad9361_swig)
REG_AUXDAC1_TX_DELAY = _ad9361_swig.REG_AUXDAC1_TX_DELAY
_ad9361_swig.REG_AUXDAC2_RX_DELAY_swigconstant(_ad9361_swig)
REG_AUXDAC2_RX_DELAY = _ad9361_swig.REG_AUXDAC2_RX_DELAY
_ad9361_swig.REG_AUXDAC2_TX_DELAY_swigconstant(_ad9361_swig)
REG_AUXDAC2_TX_DELAY = _ad9361_swig.REG_AUXDAC2_TX_DELAY
_ad9361_swig.REG_CTRL_OUTPUT_POINTER_swigconstant(_ad9361_swig)
REG_CTRL_OUTPUT_POINTER = _ad9361_swig.REG_CTRL_OUTPUT_POINTER
_ad9361_swig.REG_CTRL_OUTPUT_ENABLE_swigconstant(_ad9361_swig)
REG_CTRL_OUTPUT_ENABLE = _ad9361_swig.REG_CTRL_OUTPUT_ENABLE
_ad9361_swig.REG_PRODUCT_ID_swigconstant(_ad9361_swig)
REG_PRODUCT_ID = _ad9361_swig.REG_PRODUCT_ID
_ad9361_swig.REG_REFERENCE_CLOCK_CYCLES_swigconstant(_ad9361_swig)
REG_REFERENCE_CLOCK_CYCLES = _ad9361_swig.REG_REFERENCE_CLOCK_CYCLES
_ad9361_swig.REG_DIGITAL_IO_CTRL_swigconstant(_ad9361_swig)
REG_DIGITAL_IO_CTRL = _ad9361_swig.REG_DIGITAL_IO_CTRL
_ad9361_swig.REG_LVDS_BIAS_CTRL_swigconstant(_ad9361_swig)
REG_LVDS_BIAS_CTRL = _ad9361_swig.REG_LVDS_BIAS_CTRL
_ad9361_swig.REG_LVDS_INVERT_CTRL1_swigconstant(_ad9361_swig)
REG_LVDS_INVERT_CTRL1 = _ad9361_swig.REG_LVDS_INVERT_CTRL1
_ad9361_swig.REG_LVDS_INVERT_CTRL2_swigconstant(_ad9361_swig)
REG_LVDS_INVERT_CTRL2 = _ad9361_swig.REG_LVDS_INVERT_CTRL2
_ad9361_swig.REG_SDM_CTRL_1_swigconstant(_ad9361_swig)
REG_SDM_CTRL_1 = _ad9361_swig.REG_SDM_CTRL_1
_ad9361_swig.REG_FRACT_BB_FREQ_WORD_1_swigconstant(_ad9361_swig)
REG_FRACT_BB_FREQ_WORD_1 = _ad9361_swig.REG_FRACT_BB_FREQ_WORD_1
_ad9361_swig.REG_FRACT_BB_FREQ_WORD_2_swigconstant(_ad9361_swig)
REG_FRACT_BB_FREQ_WORD_2 = _ad9361_swig.REG_FRACT_BB_FREQ_WORD_2
_ad9361_swig.REG_FRACT_BB_FREQ_WORD_3_swigconstant(_ad9361_swig)
REG_FRACT_BB_FREQ_WORD_3 = _ad9361_swig.REG_FRACT_BB_FREQ_WORD_3
_ad9361_swig.REG_INTEGER_BB_FREQ_WORD_swigconstant(_ad9361_swig)
REG_INTEGER_BB_FREQ_WORD = _ad9361_swig.REG_INTEGER_BB_FREQ_WORD
_ad9361_swig.REG_CLOCK_CTRL_swigconstant(_ad9361_swig)
REG_CLOCK_CTRL = _ad9361_swig.REG_CLOCK_CTRL
_ad9361_swig.REG_CP_CURRENT_swigconstant(_ad9361_swig)
REG_CP_CURRENT = _ad9361_swig.REG_CP_CURRENT
_ad9361_swig.REG_CP_BLEED_CURRENT_swigconstant(_ad9361_swig)
REG_CP_BLEED_CURRENT = _ad9361_swig.REG_CP_BLEED_CURRENT
_ad9361_swig.REG_LOOP_FILTER_1_swigconstant(_ad9361_swig)
REG_LOOP_FILTER_1 = _ad9361_swig.REG_LOOP_FILTER_1
_ad9361_swig.REG_LOOP_FILTER_2_swigconstant(_ad9361_swig)
REG_LOOP_FILTER_2 = _ad9361_swig.REG_LOOP_FILTER_2
_ad9361_swig.REG_LOOP_FILTER_3_swigconstant(_ad9361_swig)
REG_LOOP_FILTER_3 = _ad9361_swig.REG_LOOP_FILTER_3
_ad9361_swig.REG_VCO_CTRL_swigconstant(_ad9361_swig)
REG_VCO_CTRL = _ad9361_swig.REG_VCO_CTRL
_ad9361_swig.REG_VCO_PROGRAM_1_swigconstant(_ad9361_swig)
REG_VCO_PROGRAM_1 = _ad9361_swig.REG_VCO_PROGRAM_1
_ad9361_swig.REG_VCO_PROGRAM_2_swigconstant(_ad9361_swig)
REG_VCO_PROGRAM_2 = _ad9361_swig.REG_VCO_PROGRAM_2
_ad9361_swig.REG_SDM_CTRL_swigconstant(_ad9361_swig)
REG_SDM_CTRL = _ad9361_swig.REG_SDM_CTRL
_ad9361_swig.REG_RX_SYNTH_POWER_DOWN_OVERRIDE_swigconstant(_ad9361_swig)
REG_RX_SYNTH_POWER_DOWN_OVERRIDE = _ad9361_swig.REG_RX_SYNTH_POWER_DOWN_OVERRIDE
_ad9361_swig.REG_TX_SYNTH_POWER_DOWN_OVERRIDE_swigconstant(_ad9361_swig)
REG_TX_SYNTH_POWER_DOWN_OVERRIDE = _ad9361_swig.REG_TX_SYNTH_POWER_DOWN_OVERRIDE
_ad9361_swig.REG_RX_ANALOG_POWER_DOWN_OVERRIDE_1_swigconstant(_ad9361_swig)
REG_RX_ANALOG_POWER_DOWN_OVERRIDE_1 = _ad9361_swig.REG_RX_ANALOG_POWER_DOWN_OVERRIDE_1
_ad9361_swig.REG_RX_ANALOG_POWER_DOWN_OVERRIDE_2_swigconstant(_ad9361_swig)
REG_RX_ANALOG_POWER_DOWN_OVERRIDE_2 = _ad9361_swig.REG_RX_ANALOG_POWER_DOWN_OVERRIDE_2
_ad9361_swig.REG_RX1_ADC_POWER_DOWN_OVERRIDE_swigconstant(_ad9361_swig)
REG_RX1_ADC_POWER_DOWN_OVERRIDE = _ad9361_swig.REG_RX1_ADC_POWER_DOWN_OVERRIDE
_ad9361_swig.REG_RX2_ADC_POWER_DOWN_OVERRIDE_swigconstant(_ad9361_swig)
REG_RX2_ADC_POWER_DOWN_OVERRIDE = _ad9361_swig.REG_RX2_ADC_POWER_DOWN_OVERRIDE
_ad9361_swig.REG_TX_ANALOG_POWER_DOWN_OVERRIDE_1_swigconstant(_ad9361_swig)
REG_TX_ANALOG_POWER_DOWN_OVERRIDE_1 = _ad9361_swig.REG_TX_ANALOG_POWER_DOWN_OVERRIDE_1
_ad9361_swig.REG_ANALOG_POWER_DOWN_OVERRIDE_swigconstant(_ad9361_swig)
REG_ANALOG_POWER_DOWN_OVERRIDE = _ad9361_swig.REG_ANALOG_POWER_DOWN_OVERRIDE
_ad9361_swig.REG_MISC_POWER_DOWN_OVERRIDE_swigconstant(_ad9361_swig)
REG_MISC_POWER_DOWN_OVERRIDE = _ad9361_swig.REG_MISC_POWER_DOWN_OVERRIDE
_ad9361_swig.REG_CH_1_OVERFLOW_swigconstant(_ad9361_swig)
REG_CH_1_OVERFLOW = _ad9361_swig.REG_CH_1_OVERFLOW
_ad9361_swig.REG_CH_2_OVERFLOW_swigconstant(_ad9361_swig)
REG_CH_2_OVERFLOW = _ad9361_swig.REG_CH_2_OVERFLOW
_ad9361_swig.REG_TX_FILTER_COEF_ADDR_swigconstant(_ad9361_swig)
REG_TX_FILTER_COEF_ADDR = _ad9361_swig.REG_TX_FILTER_COEF_ADDR
_ad9361_swig.REG_TX_FILTER_COEF_WRITE_DATA_1_swigconstant(_ad9361_swig)
REG_TX_FILTER_COEF_WRITE_DATA_1 = _ad9361_swig.REG_TX_FILTER_COEF_WRITE_DATA_1
_ad9361_swig.REG_TX_FILTER_COEF_WRITE_DATA_2_swigconstant(_ad9361_swig)
REG_TX_FILTER_COEF_WRITE_DATA_2 = _ad9361_swig.REG_TX_FILTER_COEF_WRITE_DATA_2
_ad9361_swig.REG_TX_FILTER_COEF_READ_DATA_1_swigconstant(_ad9361_swig)
REG_TX_FILTER_COEF_READ_DATA_1 = _ad9361_swig.REG_TX_FILTER_COEF_READ_DATA_1
_ad9361_swig.REG_TX_FILTER_COEF_READ_DATA_2_swigconstant(_ad9361_swig)
REG_TX_FILTER_COEF_READ_DATA_2 = _ad9361_swig.REG_TX_FILTER_COEF_READ_DATA_2
_ad9361_swig.REG_TX_FILTER_CONF_swigconstant(_ad9361_swig)
REG_TX_FILTER_CONF = _ad9361_swig.REG_TX_FILTER_CONF
_ad9361_swig.REG_TX_MON_LOW_GAIN_swigconstant(_ad9361_swig)
REG_TX_MON_LOW_GAIN = _ad9361_swig.REG_TX_MON_LOW_GAIN
_ad9361_swig.REG_TX_MON_HIGH_GAIN_swigconstant(_ad9361_swig)
REG_TX_MON_HIGH_GAIN = _ad9361_swig.REG_TX_MON_HIGH_GAIN
_ad9361_swig.REG_TX_MON_DELAY_swigconstant(_ad9361_swig)
REG_TX_MON_DELAY = _ad9361_swig.REG_TX_MON_DELAY
_ad9361_swig.REG_TX_LEVEL_THRESH_swigconstant(_ad9361_swig)
REG_TX_LEVEL_THRESH = _ad9361_swig.REG_TX_LEVEL_THRESH
_ad9361_swig.REG_TX_RSSI1_swigconstant(_ad9361_swig)
REG_TX_RSSI1 = _ad9361_swig.REG_TX_RSSI1
_ad9361_swig.REG_TX_RSSI2_swigconstant(_ad9361_swig)
REG_TX_RSSI2 = _ad9361_swig.REG_TX_RSSI2
_ad9361_swig.REG_TX_RSSI_LSB_swigconstant(_ad9361_swig)
REG_TX_RSSI_LSB = _ad9361_swig.REG_TX_RSSI_LSB
_ad9361_swig.REG_TPM_MODE_ENABLE_swigconstant(_ad9361_swig)
REG_TPM_MODE_ENABLE = _ad9361_swig.REG_TPM_MODE_ENABLE
_ad9361_swig.REG_TX_MON_TEMP_GAIN_COEF_swigconstant(_ad9361_swig)
REG_TX_MON_TEMP_GAIN_COEF = _ad9361_swig.REG_TX_MON_TEMP_GAIN_COEF
_ad9361_swig.REG_TX_MON_1_CONFIG_swigconstant(_ad9361_swig)
REG_TX_MON_1_CONFIG = _ad9361_swig.REG_TX_MON_1_CONFIG
_ad9361_swig.REG_TX_MON_2_CONFIG_swigconstant(_ad9361_swig)
REG_TX_MON_2_CONFIG = _ad9361_swig.REG_TX_MON_2_CONFIG
_ad9361_swig.REG_TX1_ATTEN_0_swigconstant(_ad9361_swig)
REG_TX1_ATTEN_0 = _ad9361_swig.REG_TX1_ATTEN_0
_ad9361_swig.REG_TX1_ATTEN_1_swigconstant(_ad9361_swig)
REG_TX1_ATTEN_1 = _ad9361_swig.REG_TX1_ATTEN_1
_ad9361_swig.REG_TX2_ATTEN_0_swigconstant(_ad9361_swig)
REG_TX2_ATTEN_0 = _ad9361_swig.REG_TX2_ATTEN_0
_ad9361_swig.REG_TX2_ATTEN_1_swigconstant(_ad9361_swig)
REG_TX2_ATTEN_1 = _ad9361_swig.REG_TX2_ATTEN_1
_ad9361_swig.REG_TX_ATTEN_OFFSET_swigconstant(_ad9361_swig)
REG_TX_ATTEN_OFFSET = _ad9361_swig.REG_TX_ATTEN_OFFSET
_ad9361_swig.REG_TX_ATTEN_THRESH_swigconstant(_ad9361_swig)
REG_TX_ATTEN_THRESH = _ad9361_swig.REG_TX_ATTEN_THRESH
_ad9361_swig.REG_TX1_DIG_ATTEN_swigconstant(_ad9361_swig)
REG_TX1_DIG_ATTEN = _ad9361_swig.REG_TX1_DIG_ATTEN
_ad9361_swig.REG_TX2_DIG_ATTEN_swigconstant(_ad9361_swig)
REG_TX2_DIG_ATTEN = _ad9361_swig.REG_TX2_DIG_ATTEN
_ad9361_swig.REG_TX1_SYMBOL_ATTEN_swigconstant(_ad9361_swig)
REG_TX1_SYMBOL_ATTEN = _ad9361_swig.REG_TX1_SYMBOL_ATTEN
_ad9361_swig.REG_TX2_SYMBOL_ATTEN_swigconstant(_ad9361_swig)
REG_TX2_SYMBOL_ATTEN = _ad9361_swig.REG_TX2_SYMBOL_ATTEN
_ad9361_swig.REG_TX_SYMBOL_ATTEN_CONFIG_swigconstant(_ad9361_swig)
REG_TX_SYMBOL_ATTEN_CONFIG = _ad9361_swig.REG_TX_SYMBOL_ATTEN_CONFIG
_ad9361_swig.REG_TX1_OUT_1_PHASE_CORR_swigconstant(_ad9361_swig)
REG_TX1_OUT_1_PHASE_CORR = _ad9361_swig.REG_TX1_OUT_1_PHASE_CORR
_ad9361_swig.REG_TX1_OUT_1_GAIN_CORR_swigconstant(_ad9361_swig)
REG_TX1_OUT_1_GAIN_CORR = _ad9361_swig.REG_TX1_OUT_1_GAIN_CORR
_ad9361_swig.REG_TX2_OUT_1_PHASE_CORR_swigconstant(_ad9361_swig)
REG_TX2_OUT_1_PHASE_CORR = _ad9361_swig.REG_TX2_OUT_1_PHASE_CORR
_ad9361_swig.REG_TX2_OUT_1_GAIN_CORR_swigconstant(_ad9361_swig)
REG_TX2_OUT_1_GAIN_CORR = _ad9361_swig.REG_TX2_OUT_1_GAIN_CORR
_ad9361_swig.REG_TX1_OUT_1_OFFSET_I_swigconstant(_ad9361_swig)
REG_TX1_OUT_1_OFFSET_I = _ad9361_swig.REG_TX1_OUT_1_OFFSET_I
_ad9361_swig.REG_TX1_OUT_1_OFFSET_Q_swigconstant(_ad9361_swig)
REG_TX1_OUT_1_OFFSET_Q = _ad9361_swig.REG_TX1_OUT_1_OFFSET_Q
_ad9361_swig.REG_TX2_OUT_1_OFFSET_I_swigconstant(_ad9361_swig)
REG_TX2_OUT_1_OFFSET_I = _ad9361_swig.REG_TX2_OUT_1_OFFSET_I
_ad9361_swig.REG_TX2_OUT_1_OFFSET_Q_swigconstant(_ad9361_swig)
REG_TX2_OUT_1_OFFSET_Q = _ad9361_swig.REG_TX2_OUT_1_OFFSET_Q
_ad9361_swig.REG_TX1_OUT_2_PHASE_CORR_swigconstant(_ad9361_swig)
REG_TX1_OUT_2_PHASE_CORR = _ad9361_swig.REG_TX1_OUT_2_PHASE_CORR
_ad9361_swig.REG_TX1_OUT_2_GAIN_CORR_swigconstant(_ad9361_swig)
REG_TX1_OUT_2_GAIN_CORR = _ad9361_swig.REG_TX1_OUT_2_GAIN_CORR
_ad9361_swig.REG_TX2_OUT_2_PHASE_CORR_swigconstant(_ad9361_swig)
REG_TX2_OUT_2_PHASE_CORR = _ad9361_swig.REG_TX2_OUT_2_PHASE_CORR
_ad9361_swig.REG_TX2_OUT_2_GAIN_CORR_swigconstant(_ad9361_swig)
REG_TX2_OUT_2_GAIN_CORR = _ad9361_swig.REG_TX2_OUT_2_GAIN_CORR
_ad9361_swig.REG_TX1_OUT_2_OFFSET_I_swigconstant(_ad9361_swig)
REG_TX1_OUT_2_OFFSET_I = _ad9361_swig.REG_TX1_OUT_2_OFFSET_I
_ad9361_swig.REG_TX1_OUT_2_OFFSET_Q_swigconstant(_ad9361_swig)
REG_TX1_OUT_2_OFFSET_Q = _ad9361_swig.REG_TX1_OUT_2_OFFSET_Q
_ad9361_swig.REG_TX2_OUT_2_OFFSET_I_swigconstant(_ad9361_swig)
REG_TX2_OUT_2_OFFSET_I = _ad9361_swig.REG_TX2_OUT_2_OFFSET_I
_ad9361_swig.REG_TX2_OUT_2_OFFSET_Q_swigconstant(_ad9361_swig)
REG_TX2_OUT_2_OFFSET_Q = _ad9361_swig.REG_TX2_OUT_2_OFFSET_Q
_ad9361_swig.REG_TX_FORCE_BITS_swigconstant(_ad9361_swig)
REG_TX_FORCE_BITS = _ad9361_swig.REG_TX_FORCE_BITS
_ad9361_swig.REG_QUAD_CAL_NCO_FREQ_PHASE_OFFSET_swigconstant(_ad9361_swig)
REG_QUAD_CAL_NCO_FREQ_PHASE_OFFSET = _ad9361_swig.REG_QUAD_CAL_NCO_FREQ_PHASE_OFFSET
_ad9361_swig.REG_QUAD_CAL_CTRL_swigconstant(_ad9361_swig)
REG_QUAD_CAL_CTRL = _ad9361_swig.REG_QUAD_CAL_CTRL
_ad9361_swig.REG_KEXP_1_swigconstant(_ad9361_swig)
REG_KEXP_1 = _ad9361_swig.REG_KEXP_1
_ad9361_swig.REG_KEXP_2_swigconstant(_ad9361_swig)
REG_KEXP_2 = _ad9361_swig.REG_KEXP_2
_ad9361_swig.REG_QUAD_SETTLE_COUNT_swigconstant(_ad9361_swig)
REG_QUAD_SETTLE_COUNT = _ad9361_swig.REG_QUAD_SETTLE_COUNT
_ad9361_swig.REG_MAG_FTEST_THRESH_swigconstant(_ad9361_swig)
REG_MAG_FTEST_THRESH = _ad9361_swig.REG_MAG_FTEST_THRESH
_ad9361_swig.REG_MAG_FTEST_THRESH_2_swigconstant(_ad9361_swig)
REG_MAG_FTEST_THRESH_2 = _ad9361_swig.REG_MAG_FTEST_THRESH_2
_ad9361_swig.REG_QUAD_CAL_STATUS_TX1_swigconstant(_ad9361_swig)
REG_QUAD_CAL_STATUS_TX1 = _ad9361_swig.REG_QUAD_CAL_STATUS_TX1
_ad9361_swig.REG_QUAD_CAL_STATUS_TX2_swigconstant(_ad9361_swig)
REG_QUAD_CAL_STATUS_TX2 = _ad9361_swig.REG_QUAD_CAL_STATUS_TX2
_ad9361_swig.REG_QUAD_CAL_COUNT_swigconstant(_ad9361_swig)
REG_QUAD_CAL_COUNT = _ad9361_swig.REG_QUAD_CAL_COUNT
_ad9361_swig.REG_TX_QUAD_FULL_LMT_GAIN_swigconstant(_ad9361_swig)
REG_TX_QUAD_FULL_LMT_GAIN = _ad9361_swig.REG_TX_QUAD_FULL_LMT_GAIN
_ad9361_swig.REG_SQUARER_CONFIG_swigconstant(_ad9361_swig)
REG_SQUARER_CONFIG = _ad9361_swig.REG_SQUARER_CONFIG
_ad9361_swig.REG_TX_QUAD_CAL_ATTEN_swigconstant(_ad9361_swig)
REG_TX_QUAD_CAL_ATTEN = _ad9361_swig.REG_TX_QUAD_CAL_ATTEN
_ad9361_swig.REG_THRESH_ACCUM_swigconstant(_ad9361_swig)
REG_THRESH_ACCUM = _ad9361_swig.REG_THRESH_ACCUM
_ad9361_swig.REG_TX_QUAD_LPF_GAIN_swigconstant(_ad9361_swig)
REG_TX_QUAD_LPF_GAIN = _ad9361_swig.REG_TX_QUAD_LPF_GAIN
_ad9361_swig.REG_TXDAC_VDS_I_swigconstant(_ad9361_swig)
REG_TXDAC_VDS_I = _ad9361_swig.REG_TXDAC_VDS_I
_ad9361_swig.REG_TXDAC_VDS_Q_swigconstant(_ad9361_swig)
REG_TXDAC_VDS_Q = _ad9361_swig.REG_TXDAC_VDS_Q
_ad9361_swig.REG_TXDAC_GN_I_swigconstant(_ad9361_swig)
REG_TXDAC_GN_I = _ad9361_swig.REG_TXDAC_GN_I
_ad9361_swig.REG_TXDAC_GN_Q_swigconstant(_ad9361_swig)
REG_TXDAC_GN_Q = _ad9361_swig.REG_TXDAC_GN_Q
_ad9361_swig.REG_TXBBF_OPAMP_A_swigconstant(_ad9361_swig)
REG_TXBBF_OPAMP_A = _ad9361_swig.REG_TXBBF_OPAMP_A
_ad9361_swig.REG_TXBBF_OPAMP_B_swigconstant(_ad9361_swig)
REG_TXBBF_OPAMP_B = _ad9361_swig.REG_TXBBF_OPAMP_B
_ad9361_swig.REG_TX_BBF_R1_swigconstant(_ad9361_swig)
REG_TX_BBF_R1 = _ad9361_swig.REG_TX_BBF_R1
_ad9361_swig.REG_TX_BBF_R2_swigconstant(_ad9361_swig)
REG_TX_BBF_R2 = _ad9361_swig.REG_TX_BBF_R2
_ad9361_swig.REG_TX_BBF_R3_swigconstant(_ad9361_swig)
REG_TX_BBF_R3 = _ad9361_swig.REG_TX_BBF_R3
_ad9361_swig.REG_TX_BBF_R4_swigconstant(_ad9361_swig)
REG_TX_BBF_R4 = _ad9361_swig.REG_TX_BBF_R4
_ad9361_swig.REG_TX_BBF_RP_swigconstant(_ad9361_swig)
REG_TX_BBF_RP = _ad9361_swig.REG_TX_BBF_RP
_ad9361_swig.REG_TX_BBF_C1_swigconstant(_ad9361_swig)
REG_TX_BBF_C1 = _ad9361_swig.REG_TX_BBF_C1
_ad9361_swig.REG_TX_BBF_C2_swigconstant(_ad9361_swig)
REG_TX_BBF_C2 = _ad9361_swig.REG_TX_BBF_C2
_ad9361_swig.REG_TX_BBF_CP_swigconstant(_ad9361_swig)
REG_TX_BBF_CP = _ad9361_swig.REG_TX_BBF_CP
_ad9361_swig.REG_TX_TUNE_CTRL_swigconstant(_ad9361_swig)
REG_TX_TUNE_CTRL = _ad9361_swig.REG_TX_TUNE_CTRL
_ad9361_swig.REG_TX_BBF_R2B_swigconstant(_ad9361_swig)
REG_TX_BBF_R2B = _ad9361_swig.REG_TX_BBF_R2B
_ad9361_swig.REG_TX_BBF_TUNE_swigconstant(_ad9361_swig)
REG_TX_BBF_TUNE = _ad9361_swig.REG_TX_BBF_TUNE
_ad9361_swig.REG_CONFIG0_swigconstant(_ad9361_swig)
REG_CONFIG0 = _ad9361_swig.REG_CONFIG0
_ad9361_swig.REG_RESISTOR_swigconstant(_ad9361_swig)
REG_RESISTOR = _ad9361_swig.REG_RESISTOR
_ad9361_swig.REG_CAPACITOR_swigconstant(_ad9361_swig)
REG_CAPACITOR = _ad9361_swig.REG_CAPACITOR
_ad9361_swig.REG_LO_CM_swigconstant(_ad9361_swig)
REG_LO_CM = _ad9361_swig.REG_LO_CM
_ad9361_swig.REG_TX_BBF_TUNE_DIVIDER_swigconstant(_ad9361_swig)
REG_TX_BBF_TUNE_DIVIDER = _ad9361_swig.REG_TX_BBF_TUNE_DIVIDER
_ad9361_swig.REG_TX_BBF_TUNE_MODE_swigconstant(_ad9361_swig)
REG_TX_BBF_TUNE_MODE = _ad9361_swig.REG_TX_BBF_TUNE_MODE
_ad9361_swig.REG_RX_FILTER_COEF_ADDR_swigconstant(_ad9361_swig)
REG_RX_FILTER_COEF_ADDR = _ad9361_swig.REG_RX_FILTER_COEF_ADDR
_ad9361_swig.REG_RX_FILTER_COEF_DATA_1_swigconstant(_ad9361_swig)
REG_RX_FILTER_COEF_DATA_1 = _ad9361_swig.REG_RX_FILTER_COEF_DATA_1
_ad9361_swig.REG_RX_FILTER_COEF_DATA_2_swigconstant(_ad9361_swig)
REG_RX_FILTER_COEF_DATA_2 = _ad9361_swig.REG_RX_FILTER_COEF_DATA_2
_ad9361_swig.REG_RX_FILTER_COEF_READ_DATA_1_swigconstant(_ad9361_swig)
REG_RX_FILTER_COEF_READ_DATA_1 = _ad9361_swig.REG_RX_FILTER_COEF_READ_DATA_1
_ad9361_swig.REG_RX_FILTER_COEF_READ_DATA_2_swigconstant(_ad9361_swig)
REG_RX_FILTER_COEF_READ_DATA_2 = _ad9361_swig.REG_RX_FILTER_COEF_READ_DATA_2
_ad9361_swig.REG_RX_FILTER_CONFIG_swigconstant(_ad9361_swig)
REG_RX_FILTER_CONFIG = _ad9361_swig.REG_RX_FILTER_CONFIG
_ad9361_swig.REG_RX_FILTER_GAIN_swigconstant(_ad9361_swig)
REG_RX_FILTER_GAIN = _ad9361_swig.REG_RX_FILTER_GAIN
_ad9361_swig.REG_AGC_CONFIG_1_swigconstant(_ad9361_swig)
REG_AGC_CONFIG_1 = _ad9361_swig.REG_AGC_CONFIG_1
_ad9361_swig.REG_AGC_CONFIG_2_swigconstant(_ad9361_swig)
REG_AGC_CONFIG_2 = _ad9361_swig.REG_AGC_CONFIG_2
_ad9361_swig.REG_AGC_CONFIG_3_swigconstant(_ad9361_swig)
REG_AGC_CONFIG_3 = _ad9361_swig.REG_AGC_CONFIG_3
_ad9361_swig.REG_MAX_LMT_FULL_GAIN_swigconstant(_ad9361_swig)
REG_MAX_LMT_FULL_GAIN = _ad9361_swig.REG_MAX_LMT_FULL_GAIN
_ad9361_swig.REG_PEAK_WAIT_TIME_swigconstant(_ad9361_swig)
REG_PEAK_WAIT_TIME = _ad9361_swig.REG_PEAK_WAIT_TIME
_ad9361_swig.REG_DIGITAL_GAIN_swigconstant(_ad9361_swig)
REG_DIGITAL_GAIN = _ad9361_swig.REG_DIGITAL_GAIN
_ad9361_swig.REG_AGC_LOCK_LEVEL_swigconstant(_ad9361_swig)
REG_AGC_LOCK_LEVEL = _ad9361_swig.REG_AGC_LOCK_LEVEL
_ad9361_swig.REG_ADC_NOISE_CORRECTION_FACTOR_swigconstant(_ad9361_swig)
REG_ADC_NOISE_CORRECTION_FACTOR = _ad9361_swig.REG_ADC_NOISE_CORRECTION_FACTOR
_ad9361_swig.REG_GAIN_STP_CONFIG1_swigconstant(_ad9361_swig)
REG_GAIN_STP_CONFIG1 = _ad9361_swig.REG_GAIN_STP_CONFIG1
_ad9361_swig.REG_ADC_SMALL_OVERLOAD_THRESH_swigconstant(_ad9361_swig)
REG_ADC_SMALL_OVERLOAD_THRESH = _ad9361_swig.REG_ADC_SMALL_OVERLOAD_THRESH
_ad9361_swig.REG_ADC_LARGE_OVERLOAD_THRESH_swigconstant(_ad9361_swig)
REG_ADC_LARGE_OVERLOAD_THRESH = _ad9361_swig.REG_ADC_LARGE_OVERLOAD_THRESH
_ad9361_swig.REG_GAIN_STP_CONFIG_2_swigconstant(_ad9361_swig)
REG_GAIN_STP_CONFIG_2 = _ad9361_swig.REG_GAIN_STP_CONFIG_2
_ad9361_swig.REG_SMALL_LMT_OVERLOAD_THRESH_swigconstant(_ad9361_swig)
REG_SMALL_LMT_OVERLOAD_THRESH = _ad9361_swig.REG_SMALL_LMT_OVERLOAD_THRESH
_ad9361_swig.REG_LARGE_LMT_OVERLOAD_THRESH_swigconstant(_ad9361_swig)
REG_LARGE_LMT_OVERLOAD_THRESH = _ad9361_swig.REG_LARGE_LMT_OVERLOAD_THRESH
_ad9361_swig.REG_RX1_MANUAL_LMT_FULL_GAIN_swigconstant(_ad9361_swig)
REG_RX1_MANUAL_LMT_FULL_GAIN = _ad9361_swig.REG_RX1_MANUAL_LMT_FULL_GAIN
_ad9361_swig.REG_RX1_MANUAL_LPF_GAIN_swigconstant(_ad9361_swig)
REG_RX1_MANUAL_LPF_GAIN = _ad9361_swig.REG_RX1_MANUAL_LPF_GAIN
_ad9361_swig.REG_RX1_MANUAL_DIGITALFORCED_GAIN_swigconstant(_ad9361_swig)
REG_RX1_MANUAL_DIGITALFORCED_GAIN = _ad9361_swig.REG_RX1_MANUAL_DIGITALFORCED_GAIN
_ad9361_swig.REG_RX2_MANUAL_LMT_FULL_GAIN_swigconstant(_ad9361_swig)
REG_RX2_MANUAL_LMT_FULL_GAIN = _ad9361_swig.REG_RX2_MANUAL_LMT_FULL_GAIN
_ad9361_swig.REG_RX2_MANUAL_LPF_GAIN_swigconstant(_ad9361_swig)
REG_RX2_MANUAL_LPF_GAIN = _ad9361_swig.REG_RX2_MANUAL_LPF_GAIN
_ad9361_swig.REG_RX2_MANUAL_DIGITALFORCED_GAIN_swigconstant(_ad9361_swig)
REG_RX2_MANUAL_DIGITALFORCED_GAIN = _ad9361_swig.REG_RX2_MANUAL_DIGITALFORCED_GAIN
_ad9361_swig.REG_FAST_CONFIG_1_swigconstant(_ad9361_swig)
REG_FAST_CONFIG_1 = _ad9361_swig.REG_FAST_CONFIG_1
_ad9361_swig.REG_FAST_CONFIG_2_SETTLING_DELAY_swigconstant(_ad9361_swig)
REG_FAST_CONFIG_2_SETTLING_DELAY = _ad9361_swig.REG_FAST_CONFIG_2_SETTLING_DELAY
_ad9361_swig.REG_FAST_ENERGY_LOST_THRESH_swigconstant(_ad9361_swig)
REG_FAST_ENERGY_LOST_THRESH = _ad9361_swig.REG_FAST_ENERGY_LOST_THRESH
_ad9361_swig.REG_FAST_STRONGER_SIGNAL_THRESH_swigconstant(_ad9361_swig)
REG_FAST_STRONGER_SIGNAL_THRESH = _ad9361_swig.REG_FAST_STRONGER_SIGNAL_THRESH
_ad9361_swig.REG_FAST_LOW_POWER_THRESH_swigconstant(_ad9361_swig)
REG_FAST_LOW_POWER_THRESH = _ad9361_swig.REG_FAST_LOW_POWER_THRESH
_ad9361_swig.REG_FAST_STRONG_SIGNAL_FREEZE_swigconstant(_ad9361_swig)
REG_FAST_STRONG_SIGNAL_FREEZE = _ad9361_swig.REG_FAST_STRONG_SIGNAL_FREEZE
_ad9361_swig.REG_FAST_FINAL_OVER_RANGE_AND_OPT_GAIN_swigconstant(_ad9361_swig)
REG_FAST_FINAL_OVER_RANGE_AND_OPT_GAIN = _ad9361_swig.REG_FAST_FINAL_OVER_RANGE_AND_OPT_GAIN
_ad9361_swig.REG_FAST_ENERGY_DETECT_COUNT_swigconstant(_ad9361_swig)
REG_FAST_ENERGY_DETECT_COUNT = _ad9361_swig.REG_FAST_ENERGY_DETECT_COUNT
_ad9361_swig.REG_FAST_AGCLL_UPPER_LIMIT_swigconstant(_ad9361_swig)
REG_FAST_AGCLL_UPPER_LIMIT = _ad9361_swig.REG_FAST_AGCLL_UPPER_LIMIT
_ad9361_swig.REG_FAST_GAIN_LOCK_EXIT_COUNT_swigconstant(_ad9361_swig)
REG_FAST_GAIN_LOCK_EXIT_COUNT = _ad9361_swig.REG_FAST_GAIN_LOCK_EXIT_COUNT
_ad9361_swig.REG_FAST_INITIAL_LMT_GAIN_LIMIT_swigconstant(_ad9361_swig)
REG_FAST_INITIAL_LMT_GAIN_LIMIT = _ad9361_swig.REG_FAST_INITIAL_LMT_GAIN_LIMIT
_ad9361_swig.REG_FAST_INCREMENT_TIME_swigconstant(_ad9361_swig)
REG_FAST_INCREMENT_TIME = _ad9361_swig.REG_FAST_INCREMENT_TIME
_ad9361_swig.REG_AGC_INNER_LOW_THRESH_swigconstant(_ad9361_swig)
REG_AGC_INNER_LOW_THRESH = _ad9361_swig.REG_AGC_INNER_LOW_THRESH
_ad9361_swig.REG_LMT_OVERLOAD_COUNTERS_swigconstant(_ad9361_swig)
REG_LMT_OVERLOAD_COUNTERS = _ad9361_swig.REG_LMT_OVERLOAD_COUNTERS
_ad9361_swig.REG_ADC_OVERLOAD_COUNTERS_swigconstant(_ad9361_swig)
REG_ADC_OVERLOAD_COUNTERS = _ad9361_swig.REG_ADC_OVERLOAD_COUNTERS
_ad9361_swig.REG_GAIN_STP1_swigconstant(_ad9361_swig)
REG_GAIN_STP1 = _ad9361_swig.REG_GAIN_STP1
_ad9361_swig.REG_GAIN_UPDATE_COUNTER1_swigconstant(_ad9361_swig)
REG_GAIN_UPDATE_COUNTER1 = _ad9361_swig.REG_GAIN_UPDATE_COUNTER1
_ad9361_swig.REG_GAIN_UPDATE_COUNTER2_swigconstant(_ad9361_swig)
REG_GAIN_UPDATE_COUNTER2 = _ad9361_swig.REG_GAIN_UPDATE_COUNTER2
_ad9361_swig.REG_DIGITAL_SAT_COUNTER_swigconstant(_ad9361_swig)
REG_DIGITAL_SAT_COUNTER = _ad9361_swig.REG_DIGITAL_SAT_COUNTER
_ad9361_swig.REG_OUTER_POWER_THRESHS_swigconstant(_ad9361_swig)
REG_OUTER_POWER_THRESHS = _ad9361_swig.REG_OUTER_POWER_THRESHS
_ad9361_swig.REG_GAIN_STP_2_swigconstant(_ad9361_swig)
REG_GAIN_STP_2 = _ad9361_swig.REG_GAIN_STP_2
_ad9361_swig.REG_EXT_LNA_HIGH_GAIN_swigconstant(_ad9361_swig)
REG_EXT_LNA_HIGH_GAIN = _ad9361_swig.REG_EXT_LNA_HIGH_GAIN
_ad9361_swig.REG_EXT_LNA_LOW_GAIN_swigconstant(_ad9361_swig)
REG_EXT_LNA_LOW_GAIN = _ad9361_swig.REG_EXT_LNA_LOW_GAIN
_ad9361_swig.REG_GAIN_TABLE_ADDRESS_swigconstant(_ad9361_swig)
REG_GAIN_TABLE_ADDRESS = _ad9361_swig.REG_GAIN_TABLE_ADDRESS
_ad9361_swig.REG_GAIN_TABLE_WRITE_DATA1_swigconstant(_ad9361_swig)
REG_GAIN_TABLE_WRITE_DATA1 = _ad9361_swig.REG_GAIN_TABLE_WRITE_DATA1
_ad9361_swig.REG_GAIN_TABLE_WRITE_DATA2_swigconstant(_ad9361_swig)
REG_GAIN_TABLE_WRITE_DATA2 = _ad9361_swig.REG_GAIN_TABLE_WRITE_DATA2
_ad9361_swig.REG_GAIN_TABLE_WRITE_DATA3_swigconstant(_ad9361_swig)
REG_GAIN_TABLE_WRITE_DATA3 = _ad9361_swig.REG_GAIN_TABLE_WRITE_DATA3
_ad9361_swig.REG_GAIN_TABLE_READ_DATA1_swigconstant(_ad9361_swig)
REG_GAIN_TABLE_READ_DATA1 = _ad9361_swig.REG_GAIN_TABLE_READ_DATA1
_ad9361_swig.REG_GAIN_TABLE_READ_DATA2_swigconstant(_ad9361_swig)
REG_GAIN_TABLE_READ_DATA2 = _ad9361_swig.REG_GAIN_TABLE_READ_DATA2
_ad9361_swig.REG_GAIN_TABLE_READ_DATA3_swigconstant(_ad9361_swig)
REG_GAIN_TABLE_READ_DATA3 = _ad9361_swig.REG_GAIN_TABLE_READ_DATA3
_ad9361_swig.REG_GAIN_TABLE_CONFIG_swigconstant(_ad9361_swig)
REG_GAIN_TABLE_CONFIG = _ad9361_swig.REG_GAIN_TABLE_CONFIG
_ad9361_swig.REG_GM_SUB_TABLE_ADDRESS_swigconstant(_ad9361_swig)
REG_GM_SUB_TABLE_ADDRESS = _ad9361_swig.REG_GM_SUB_TABLE_ADDRESS
_ad9361_swig.REG_GM_SUB_TABLE_GAIN_WRITE_swigconstant(_ad9361_swig)
REG_GM_SUB_TABLE_GAIN_WRITE = _ad9361_swig.REG_GM_SUB_TABLE_GAIN_WRITE
_ad9361_swig.REG_GM_SUB_TABLE_BIAS_WRITE_swigconstant(_ad9361_swig)
REG_GM_SUB_TABLE_BIAS_WRITE = _ad9361_swig.REG_GM_SUB_TABLE_BIAS_WRITE
_ad9361_swig.REG_GM_SUB_TABLE_CTRL_WRITE_swigconstant(_ad9361_swig)
REG_GM_SUB_TABLE_CTRL_WRITE = _ad9361_swig.REG_GM_SUB_TABLE_CTRL_WRITE
_ad9361_swig.REG_GM_SUB_TABLE_GAIN_READ_swigconstant(_ad9361_swig)
REG_GM_SUB_TABLE_GAIN_READ = _ad9361_swig.REG_GM_SUB_TABLE_GAIN_READ
_ad9361_swig.REG_GM_SUB_TABLE_BIAS_READ_swigconstant(_ad9361_swig)
REG_GM_SUB_TABLE_BIAS_READ = _ad9361_swig.REG_GM_SUB_TABLE_BIAS_READ
_ad9361_swig.REG_GM_SUB_TABLE_CTRL_READ_swigconstant(_ad9361_swig)
REG_GM_SUB_TABLE_CTRL_READ = _ad9361_swig.REG_GM_SUB_TABLE_CTRL_READ
_ad9361_swig.REG_GM_SUB_TABLE_CONFIG_swigconstant(_ad9361_swig)
REG_GM_SUB_TABLE_CONFIG = _ad9361_swig.REG_GM_SUB_TABLE_CONFIG
_ad9361_swig.REG_WORD_ADDRESS_swigconstant(_ad9361_swig)
REG_WORD_ADDRESS = _ad9361_swig.REG_WORD_ADDRESS
_ad9361_swig.REG_GAIN_DIFF_WORDERROR_WRITE_swigconstant(_ad9361_swig)
REG_GAIN_DIFF_WORDERROR_WRITE = _ad9361_swig.REG_GAIN_DIFF_WORDERROR_WRITE
_ad9361_swig.REG_GAIN_ERROR_READ_swigconstant(_ad9361_swig)
REG_GAIN_ERROR_READ = _ad9361_swig.REG_GAIN_ERROR_READ
_ad9361_swig.REG_CONFIG_swigconstant(_ad9361_swig)
REG_CONFIG = _ad9361_swig.REG_CONFIG
_ad9361_swig.REG_LNA_GAIN_DIFF_READ_BACK_swigconstant(_ad9361_swig)
REG_LNA_GAIN_DIFF_READ_BACK = _ad9361_swig.REG_LNA_GAIN_DIFF_READ_BACK
_ad9361_swig.REG_MAX_MIXER_CALIBRATION_GAIN_INDEX_swigconstant(_ad9361_swig)
REG_MAX_MIXER_CALIBRATION_GAIN_INDEX = _ad9361_swig.REG_MAX_MIXER_CALIBRATION_GAIN_INDEX
_ad9361_swig.REG_TEMP_GAIN_COEF_swigconstant(_ad9361_swig)
REG_TEMP_GAIN_COEF = _ad9361_swig.REG_TEMP_GAIN_COEF
_ad9361_swig.REG_SETTLE_TIME_swigconstant(_ad9361_swig)
REG_SETTLE_TIME = _ad9361_swig.REG_SETTLE_TIME
_ad9361_swig.REG_MEASURE_DURATION_swigconstant(_ad9361_swig)
REG_MEASURE_DURATION = _ad9361_swig.REG_MEASURE_DURATION
_ad9361_swig.REG_CAL_TEMP_SENSOR_WORD_swigconstant(_ad9361_swig)
REG_CAL_TEMP_SENSOR_WORD = _ad9361_swig.REG_CAL_TEMP_SENSOR_WORD
_ad9361_swig.REG_MEASURE_DURATION_01_swigconstant(_ad9361_swig)
REG_MEASURE_DURATION_01 = _ad9361_swig.REG_MEASURE_DURATION_01
_ad9361_swig.REG_MEASURE_DURATION_23_swigconstant(_ad9361_swig)
REG_MEASURE_DURATION_23 = _ad9361_swig.REG_MEASURE_DURATION_23
_ad9361_swig.REG_RSSI_WEIGHT_0_swigconstant(_ad9361_swig)
REG_RSSI_WEIGHT_0 = _ad9361_swig.REG_RSSI_WEIGHT_0
_ad9361_swig.REG_RSSI_WEIGHT_1_swigconstant(_ad9361_swig)
REG_RSSI_WEIGHT_1 = _ad9361_swig.REG_RSSI_WEIGHT_1
_ad9361_swig.REG_RSSI_WEIGHT_2_swigconstant(_ad9361_swig)
REG_RSSI_WEIGHT_2 = _ad9361_swig.REG_RSSI_WEIGHT_2
_ad9361_swig.REG_RSSI_WEIGHT_3_swigconstant(_ad9361_swig)
REG_RSSI_WEIGHT_3 = _ad9361_swig.REG_RSSI_WEIGHT_3
_ad9361_swig.REG_RSSI_DELAY_swigconstant(_ad9361_swig)
REG_RSSI_DELAY = _ad9361_swig.REG_RSSI_DELAY
_ad9361_swig.REG_RSSI_WAIT_TIME_swigconstant(_ad9361_swig)
REG_RSSI_WAIT_TIME = _ad9361_swig.REG_RSSI_WAIT_TIME
_ad9361_swig.REG_RSSI_CONFIG_swigconstant(_ad9361_swig)
REG_RSSI_CONFIG = _ad9361_swig.REG_RSSI_CONFIG
_ad9361_swig.REG_ADC_MEASURE_DURATION_01_swigconstant(_ad9361_swig)
REG_ADC_MEASURE_DURATION_01 = _ad9361_swig.REG_ADC_MEASURE_DURATION_01
_ad9361_swig.REG_ADC_WEIGHT_0_swigconstant(_ad9361_swig)
REG_ADC_WEIGHT_0 = _ad9361_swig.REG_ADC_WEIGHT_0
_ad9361_swig.REG_ADC_WEIGHT_1_swigconstant(_ad9361_swig)
REG_ADC_WEIGHT_1 = _ad9361_swig.REG_ADC_WEIGHT_1
_ad9361_swig.REG_DEC_POWER_MEASURE_DURATION_0_swigconstant(_ad9361_swig)
REG_DEC_POWER_MEASURE_DURATION_0 = _ad9361_swig.REG_DEC_POWER_MEASURE_DURATION_0
_ad9361_swig.REG_LNA_GAIN_swigconstant(_ad9361_swig)
REG_LNA_GAIN = _ad9361_swig.REG_LNA_GAIN
_ad9361_swig.REG_CH1_ADC_POWER_swigconstant(_ad9361_swig)
REG_CH1_ADC_POWER = _ad9361_swig.REG_CH1_ADC_POWER
_ad9361_swig.REG_CH1_RX_FILTER_POWER_swigconstant(_ad9361_swig)
REG_CH1_RX_FILTER_POWER = _ad9361_swig.REG_CH1_RX_FILTER_POWER
_ad9361_swig.REG_CH2_ADC_POWER_swigconstant(_ad9361_swig)
REG_CH2_ADC_POWER = _ad9361_swig.REG_CH2_ADC_POWER
_ad9361_swig.REG_CH2_RX_FILTER_POWER_swigconstant(_ad9361_swig)
REG_CH2_RX_FILTER_POWER = _ad9361_swig.REG_CH2_RX_FILTER_POWER
_ad9361_swig.REG_RX_QUAD_CAL_LEVEL_swigconstant(_ad9361_swig)
REG_RX_QUAD_CAL_LEVEL = _ad9361_swig.REG_RX_QUAD_CAL_LEVEL
_ad9361_swig.REG_CALIBRATION_CONFIG_1_swigconstant(_ad9361_swig)
REG_CALIBRATION_CONFIG_1 = _ad9361_swig.REG_CALIBRATION_CONFIG_1
_ad9361_swig.REG_CALIBRATION_CONFIG_2_swigconstant(_ad9361_swig)
REG_CALIBRATION_CONFIG_2 = _ad9361_swig.REG_CALIBRATION_CONFIG_2
_ad9361_swig.REG_CALIBRATION_CONFIG_3_swigconstant(_ad9361_swig)
REG_CALIBRATION_CONFIG_3 = _ad9361_swig.REG_CALIBRATION_CONFIG_3
_ad9361_swig.REG_CALIB_COUNT_swigconstant(_ad9361_swig)
REG_CALIB_COUNT = _ad9361_swig.REG_CALIB_COUNT
_ad9361_swig.REG_SETTLE_COUNT_swigconstant(_ad9361_swig)
REG_SETTLE_COUNT = _ad9361_swig.REG_SETTLE_COUNT
_ad9361_swig.REG_RX_QUAD_GAIN1_swigconstant(_ad9361_swig)
REG_RX_QUAD_GAIN1 = _ad9361_swig.REG_RX_QUAD_GAIN1
_ad9361_swig.REG_RX_QUAD_GAIN2_swigconstant(_ad9361_swig)
REG_RX_QUAD_GAIN2 = _ad9361_swig.REG_RX_QUAD_GAIN2
_ad9361_swig.REG_RX1_INPUT_A_PHASE_CORR_swigconstant(_ad9361_swig)
REG_RX1_INPUT_A_PHASE_CORR = _ad9361_swig.REG_RX1_INPUT_A_PHASE_CORR
_ad9361_swig.REG_RX1_INPUT_A_GAIN_CORR_swigconstant(_ad9361_swig)
REG_RX1_INPUT_A_GAIN_CORR = _ad9361_swig.REG_RX1_INPUT_A_GAIN_CORR
_ad9361_swig.REG_RX2_INPUT_A_PHASE_CORR_swigconstant(_ad9361_swig)
REG_RX2_INPUT_A_PHASE_CORR = _ad9361_swig.REG_RX2_INPUT_A_PHASE_CORR
_ad9361_swig.REG_RX2_INPUT_A_GAIN_CORR_swigconstant(_ad9361_swig)
REG_RX2_INPUT_A_GAIN_CORR = _ad9361_swig.REG_RX2_INPUT_A_GAIN_CORR
_ad9361_swig.REG_RX1_INPUT_A_Q_OFFSET_swigconstant(_ad9361_swig)
REG_RX1_INPUT_A_Q_OFFSET = _ad9361_swig.REG_RX1_INPUT_A_Q_OFFSET
_ad9361_swig.REG_RX1_INPUT_A_OFFSETS_swigconstant(_ad9361_swig)
REG_RX1_INPUT_A_OFFSETS = _ad9361_swig.REG_RX1_INPUT_A_OFFSETS
_ad9361_swig.REG_INPUT_A_OFFSETS_1_swigconstant(_ad9361_swig)
REG_INPUT_A_OFFSETS_1 = _ad9361_swig.REG_INPUT_A_OFFSETS_1
_ad9361_swig.REG_RX2_INPUT_A_OFFSETS_swigconstant(_ad9361_swig)
REG_RX2_INPUT_A_OFFSETS = _ad9361_swig.REG_RX2_INPUT_A_OFFSETS
_ad9361_swig.REG_RX2_INPUT_A_I_OFFSET_swigconstant(_ad9361_swig)
REG_RX2_INPUT_A_I_OFFSET = _ad9361_swig.REG_RX2_INPUT_A_I_OFFSET
_ad9361_swig.REG_RX1_INPUT_BC_PHASE_CORR_swigconstant(_ad9361_swig)
REG_RX1_INPUT_BC_PHASE_CORR = _ad9361_swig.REG_RX1_INPUT_BC_PHASE_CORR
_ad9361_swig.REG_RX1_INPUT_BC_GAIN_CORR_swigconstant(_ad9361_swig)
REG_RX1_INPUT_BC_GAIN_CORR = _ad9361_swig.REG_RX1_INPUT_BC_GAIN_CORR
_ad9361_swig.REG_RX2_INPUT_BC_PHASE_CORR_swigconstant(_ad9361_swig)
REG_RX2_INPUT_BC_PHASE_CORR = _ad9361_swig.REG_RX2_INPUT_BC_PHASE_CORR
_ad9361_swig.REG_RX2_INPUT_BC_GAIN_CORR_swigconstant(_ad9361_swig)
REG_RX2_INPUT_BC_GAIN_CORR = _ad9361_swig.REG_RX2_INPUT_BC_GAIN_CORR
_ad9361_swig.REG_RX1_INPUT_BC_Q_OFFSET_swigconstant(_ad9361_swig)
REG_RX1_INPUT_BC_Q_OFFSET = _ad9361_swig.REG_RX1_INPUT_BC_Q_OFFSET
_ad9361_swig.REG_RX1_INPUT_BC_OFFSETS_swigconstant(_ad9361_swig)
REG_RX1_INPUT_BC_OFFSETS = _ad9361_swig.REG_RX1_INPUT_BC_OFFSETS
_ad9361_swig.REG_INPUT_BC_OFFSETS_1_swigconstant(_ad9361_swig)
REG_INPUT_BC_OFFSETS_1 = _ad9361_swig.REG_INPUT_BC_OFFSETS_1
_ad9361_swig.REG_RX2_INPUT_BC_OFFSETS_swigconstant(_ad9361_swig)
REG_RX2_INPUT_BC_OFFSETS = _ad9361_swig.REG_RX2_INPUT_BC_OFFSETS
_ad9361_swig.REG_RX2_INPUT_BC_I_OFFSET_swigconstant(_ad9361_swig)
REG_RX2_INPUT_BC_I_OFFSET = _ad9361_swig.REG_RX2_INPUT_BC_I_OFFSET
_ad9361_swig.REG_FORCE_BITS_swigconstant(_ad9361_swig)
REG_FORCE_BITS = _ad9361_swig.REG_FORCE_BITS
_ad9361_swig.REG_WAIT_COUNT_swigconstant(_ad9361_swig)
REG_WAIT_COUNT = _ad9361_swig.REG_WAIT_COUNT
_ad9361_swig.REG_RF_DC_OFFSET_COUNT_swigconstant(_ad9361_swig)
REG_RF_DC_OFFSET_COUNT = _ad9361_swig.REG_RF_DC_OFFSET_COUNT
_ad9361_swig.REG_RF_DC_OFFSET_CONFIG_1_swigconstant(_ad9361_swig)
REG_RF_DC_OFFSET_CONFIG_1 = _ad9361_swig.REG_RF_DC_OFFSET_CONFIG_1
_ad9361_swig.REG_RF_DC_OFFSET_ATTEN_swigconstant(_ad9361_swig)
REG_RF_DC_OFFSET_ATTEN = _ad9361_swig.REG_RF_DC_OFFSET_ATTEN
_ad9361_swig.REG_INVERT_BITS_swigconstant(_ad9361_swig)
REG_INVERT_BITS = _ad9361_swig.REG_INVERT_BITS
_ad9361_swig.REG_DC_OFFSET_CONFIG2_swigconstant(_ad9361_swig)
REG_DC_OFFSET_CONFIG2 = _ad9361_swig.REG_DC_OFFSET_CONFIG2
_ad9361_swig.REG_RF_CAL_GAIN_INDEX_swigconstant(_ad9361_swig)
REG_RF_CAL_GAIN_INDEX = _ad9361_swig.REG_RF_CAL_GAIN_INDEX
_ad9361_swig.REG_SOI_THRESH_swigconstant(_ad9361_swig)
REG_SOI_THRESH = _ad9361_swig.REG_SOI_THRESH
_ad9361_swig.REG_BB_DC_OFFSET_SHIFT_swigconstant(_ad9361_swig)
REG_BB_DC_OFFSET_SHIFT = _ad9361_swig.REG_BB_DC_OFFSET_SHIFT
_ad9361_swig.REG_BB_DC_OFFSET_FAST_SETTLE_SHIFT_swigconstant(_ad9361_swig)
REG_BB_DC_OFFSET_FAST_SETTLE_SHIFT = _ad9361_swig.REG_BB_DC_OFFSET_FAST_SETTLE_SHIFT
_ad9361_swig.REG_BB_FAST_SETTLE_DUR_swigconstant(_ad9361_swig)
REG_BB_FAST_SETTLE_DUR = _ad9361_swig.REG_BB_FAST_SETTLE_DUR
_ad9361_swig.REG_BB_DC_OFFSET_COUNT_swigconstant(_ad9361_swig)
REG_BB_DC_OFFSET_COUNT = _ad9361_swig.REG_BB_DC_OFFSET_COUNT
_ad9361_swig.REG_BB_DC_OFFSET_ATTEN_swigconstant(_ad9361_swig)
REG_BB_DC_OFFSET_ATTEN = _ad9361_swig.REG_BB_DC_OFFSET_ATTEN
_ad9361_swig.REG_RX1_BB_DC_WORD_I_MSB_swigconstant(_ad9361_swig)
REG_RX1_BB_DC_WORD_I_MSB = _ad9361_swig.REG_RX1_BB_DC_WORD_I_MSB
_ad9361_swig.REG_RX1_BB_DC_WORD_I_LSB_swigconstant(_ad9361_swig)
REG_RX1_BB_DC_WORD_I_LSB = _ad9361_swig.REG_RX1_BB_DC_WORD_I_LSB
_ad9361_swig.REG_RX1_BB_DC_WORD_Q_MSB_swigconstant(_ad9361_swig)
REG_RX1_BB_DC_WORD_Q_MSB = _ad9361_swig.REG_RX1_BB_DC_WORD_Q_MSB
_ad9361_swig.REG_RX1_BB_DC_WORD_Q_LSB_swigconstant(_ad9361_swig)
REG_RX1_BB_DC_WORD_Q_LSB = _ad9361_swig.REG_RX1_BB_DC_WORD_Q_LSB
_ad9361_swig.REG_RX2_BB_DC_WORD_I_MSB_swigconstant(_ad9361_swig)
REG_RX2_BB_DC_WORD_I_MSB = _ad9361_swig.REG_RX2_BB_DC_WORD_I_MSB
_ad9361_swig.REG_RX2_BB_DC_WORD_I_LSB_swigconstant(_ad9361_swig)
REG_RX2_BB_DC_WORD_I_LSB = _ad9361_swig.REG_RX2_BB_DC_WORD_I_LSB
_ad9361_swig.REG_RX2_BB_DC_WORD_Q_MSB_swigconstant(_ad9361_swig)
REG_RX2_BB_DC_WORD_Q_MSB = _ad9361_swig.REG_RX2_BB_DC_WORD_Q_MSB
_ad9361_swig.REG_RX2_BB_DC_WORD_Q_LSB_swigconstant(_ad9361_swig)
REG_RX2_BB_DC_WORD_Q_LSB = _ad9361_swig.REG_RX2_BB_DC_WORD_Q_LSB
_ad9361_swig.REG_BB_TRACK_CORR_WORD_I_MSB_swigconstant(_ad9361_swig)
REG_BB_TRACK_CORR_WORD_I_MSB = _ad9361_swig.REG_BB_TRACK_CORR_WORD_I_MSB
_ad9361_swig.REG_BB_TRACK_CORR_WORD_I_LSB_swigconstant(_ad9361_swig)
REG_BB_TRACK_CORR_WORD_I_LSB = _ad9361_swig.REG_BB_TRACK_CORR_WORD_I_LSB
_ad9361_swig.REG_BB_TRACK_CORR_WORD_Q_MSB_swigconstant(_ad9361_swig)
REG_BB_TRACK_CORR_WORD_Q_MSB = _ad9361_swig.REG_BB_TRACK_CORR_WORD_Q_MSB
_ad9361_swig.REG_BB_TRACK_CORR_WORD_Q_LSB_swigconstant(_ad9361_swig)
REG_BB_TRACK_CORR_WORD_Q_LSB = _ad9361_swig.REG_BB_TRACK_CORR_WORD_Q_LSB
_ad9361_swig.REG_RX1_RSSI_SYMBOL_swigconstant(_ad9361_swig)
REG_RX1_RSSI_SYMBOL = _ad9361_swig.REG_RX1_RSSI_SYMBOL
_ad9361_swig.REG_RX1_RSSI_PREAMBLE_swigconstant(_ad9361_swig)
REG_RX1_RSSI_PREAMBLE = _ad9361_swig.REG_RX1_RSSI_PREAMBLE
_ad9361_swig.REG_RX2_RSSI_SYMBOL_swigconstant(_ad9361_swig)
REG_RX2_RSSI_SYMBOL = _ad9361_swig.REG_RX2_RSSI_SYMBOL
_ad9361_swig.REG_RX2_RSSI_PREAMBLE_swigconstant(_ad9361_swig)
REG_RX2_RSSI_PREAMBLE = _ad9361_swig.REG_RX2_RSSI_PREAMBLE
_ad9361_swig.REG_SYMBOL_LSB_swigconstant(_ad9361_swig)
REG_SYMBOL_LSB = _ad9361_swig.REG_SYMBOL_LSB
_ad9361_swig.REG_PREAMBLE_LSB_swigconstant(_ad9361_swig)
REG_PREAMBLE_LSB = _ad9361_swig.REG_PREAMBLE_LSB
_ad9361_swig.REG_RX_PATH_GAIN_MSB_swigconstant(_ad9361_swig)
REG_RX_PATH_GAIN_MSB = _ad9361_swig.REG_RX_PATH_GAIN_MSB
_ad9361_swig.REG_RX_PATH_GAIN_LSB_swigconstant(_ad9361_swig)
REG_RX_PATH_GAIN_LSB = _ad9361_swig.REG_RX_PATH_GAIN_LSB
_ad9361_swig.REG_RX_DIFF_LNA_FORCE_swigconstant(_ad9361_swig)
REG_RX_DIFF_LNA_FORCE = _ad9361_swig.REG_RX_DIFF_LNA_FORCE
_ad9361_swig.REG_RX_LNA_BIAS_COARSE_swigconstant(_ad9361_swig)
REG_RX_LNA_BIAS_COARSE = _ad9361_swig.REG_RX_LNA_BIAS_COARSE
_ad9361_swig.REG_RX_LNA_BIAS_FINE_0_swigconstant(_ad9361_swig)
REG_RX_LNA_BIAS_FINE_0 = _ad9361_swig.REG_RX_LNA_BIAS_FINE_0
_ad9361_swig.REG_RX_LNA_BIAS_FINE_1_swigconstant(_ad9361_swig)
REG_RX_LNA_BIAS_FINE_1 = _ad9361_swig.REG_RX_LNA_BIAS_FINE_1
_ad9361_swig.REG_RX_MIX_GM_CONFIG_swigconstant(_ad9361_swig)
REG_RX_MIX_GM_CONFIG = _ad9361_swig.REG_RX_MIX_GM_CONFIG
_ad9361_swig.REG_RX1_MIX_GM_FORCE_swigconstant(_ad9361_swig)
REG_RX1_MIX_GM_FORCE = _ad9361_swig.REG_RX1_MIX_GM_FORCE
_ad9361_swig.REG_RX1_MIX_GM_BIAS_FORCE_swigconstant(_ad9361_swig)
REG_RX1_MIX_GM_BIAS_FORCE = _ad9361_swig.REG_RX1_MIX_GM_BIAS_FORCE
_ad9361_swig.REG_RX2_MIX_GM_FORCE_swigconstant(_ad9361_swig)
REG_RX2_MIX_GM_FORCE = _ad9361_swig.REG_RX2_MIX_GM_FORCE
_ad9361_swig.REG_RX2_MIX_GM_BIAS_FORCE_swigconstant(_ad9361_swig)
REG_RX2_MIX_GM_BIAS_FORCE = _ad9361_swig.REG_RX2_MIX_GM_BIAS_FORCE
_ad9361_swig.REG_INPUT_A_MSBS_swigconstant(_ad9361_swig)
REG_INPUT_A_MSBS = _ad9361_swig.REG_INPUT_A_MSBS
_ad9361_swig.REG_INPUT_A_RX1_I_swigconstant(_ad9361_swig)
REG_INPUT_A_RX1_I = _ad9361_swig.REG_INPUT_A_RX1_I
_ad9361_swig.REG_INPUT_A_RX1_Q_swigconstant(_ad9361_swig)
REG_INPUT_A_RX1_Q = _ad9361_swig.REG_INPUT_A_RX1_Q
_ad9361_swig.REG_INPUT_A_RX2_I_swigconstant(_ad9361_swig)
REG_INPUT_A_RX2_I = _ad9361_swig.REG_INPUT_A_RX2_I
_ad9361_swig.REG_INPUT_A_RX2_Q_swigconstant(_ad9361_swig)
REG_INPUT_A_RX2_Q = _ad9361_swig.REG_INPUT_A_RX2_Q
_ad9361_swig.REG_INPUTS_BC_RX1_I_swigconstant(_ad9361_swig)
REG_INPUTS_BC_RX1_I = _ad9361_swig.REG_INPUTS_BC_RX1_I
_ad9361_swig.REG_BAND1_RX1_Q_swigconstant(_ad9361_swig)
REG_BAND1_RX1_Q = _ad9361_swig.REG_BAND1_RX1_Q
_ad9361_swig.REG_INPUTS_BC_RX2_I_swigconstant(_ad9361_swig)
REG_INPUTS_BC_RX2_I = _ad9361_swig.REG_INPUTS_BC_RX2_I
_ad9361_swig.REG_INPUTS_BC_RX2_Q_swigconstant(_ad9361_swig)
REG_INPUTS_BC_RX2_Q = _ad9361_swig.REG_INPUTS_BC_RX2_Q
_ad9361_swig.REG_INPUTS_BC_MSBS_swigconstant(_ad9361_swig)
REG_INPUTS_BC_MSBS = _ad9361_swig.REG_INPUTS_BC_MSBS
_ad9361_swig.REG_FORCE_OS_DAC_swigconstant(_ad9361_swig)
REG_FORCE_OS_DAC = _ad9361_swig.REG_FORCE_OS_DAC
_ad9361_swig.REG_RX_MIX_LO_CM_swigconstant(_ad9361_swig)
REG_RX_MIX_LO_CM = _ad9361_swig.REG_RX_MIX_LO_CM
_ad9361_swig.REG_RX_CGB_SEG_ENABLE_swigconstant(_ad9361_swig)
REG_RX_CGB_SEG_ENABLE = _ad9361_swig.REG_RX_CGB_SEG_ENABLE
_ad9361_swig.REG_RX_MIX_INPUTBIAS_swigconstant(_ad9361_swig)
REG_RX_MIX_INPUTBIAS = _ad9361_swig.REG_RX_MIX_INPUTBIAS
_ad9361_swig.REG_RX_TIA_CONFIG_swigconstant(_ad9361_swig)
REG_RX_TIA_CONFIG = _ad9361_swig.REG_RX_TIA_CONFIG
_ad9361_swig.REG_TIA1_C_LSB_swigconstant(_ad9361_swig)
REG_TIA1_C_LSB = _ad9361_swig.REG_TIA1_C_LSB
_ad9361_swig.REG_TIA1_C_MSB_swigconstant(_ad9361_swig)
REG_TIA1_C_MSB = _ad9361_swig.REG_TIA1_C_MSB
_ad9361_swig.REG_TIA2_C_LSB_swigconstant(_ad9361_swig)
REG_TIA2_C_LSB = _ad9361_swig.REG_TIA2_C_LSB
_ad9361_swig.REG_TIA2_C_MSB_swigconstant(_ad9361_swig)
REG_TIA2_C_MSB = _ad9361_swig.REG_TIA2_C_MSB
_ad9361_swig.REG_RX1_BBF_R1A_swigconstant(_ad9361_swig)
REG_RX1_BBF_R1A = _ad9361_swig.REG_RX1_BBF_R1A
_ad9361_swig.REG_RX2_BBF_R1A_swigconstant(_ad9361_swig)
REG_RX2_BBF_R1A = _ad9361_swig.REG_RX2_BBF_R1A
_ad9361_swig.REG_RX1_TUNE_CTRL_swigconstant(_ad9361_swig)
REG_RX1_TUNE_CTRL = _ad9361_swig.REG_RX1_TUNE_CTRL
_ad9361_swig.REG_RX2_TUNE_CTRL_swigconstant(_ad9361_swig)
REG_RX2_TUNE_CTRL = _ad9361_swig.REG_RX2_TUNE_CTRL
_ad9361_swig.REG_RX1_BBF_R5_swigconstant(_ad9361_swig)
REG_RX1_BBF_R5 = _ad9361_swig.REG_RX1_BBF_R5
_ad9361_swig.REG_RX2_BBF_R5_swigconstant(_ad9361_swig)
REG_RX2_BBF_R5 = _ad9361_swig.REG_RX2_BBF_R5
_ad9361_swig.REG_RX_BBF_R2346_swigconstant(_ad9361_swig)
REG_RX_BBF_R2346 = _ad9361_swig.REG_RX_BBF_R2346
_ad9361_swig.REG_RX_BBF_C1_MSB_swigconstant(_ad9361_swig)
REG_RX_BBF_C1_MSB = _ad9361_swig.REG_RX_BBF_C1_MSB
_ad9361_swig.REG_RX_BBF_C1_LSB_swigconstant(_ad9361_swig)
REG_RX_BBF_C1_LSB = _ad9361_swig.REG_RX_BBF_C1_LSB
_ad9361_swig.REG_RX_BBF_C2_MSB_swigconstant(_ad9361_swig)
REG_RX_BBF_C2_MSB = _ad9361_swig.REG_RX_BBF_C2_MSB
_ad9361_swig.REG_RX_BBF_C2_LSB_swigconstant(_ad9361_swig)
REG_RX_BBF_C2_LSB = _ad9361_swig.REG_RX_BBF_C2_LSB
_ad9361_swig.REG_RX_BBF_C3_MSB_swigconstant(_ad9361_swig)
REG_RX_BBF_C3_MSB = _ad9361_swig.REG_RX_BBF_C3_MSB
_ad9361_swig.REG_RX_BBF_C3_LSB_swigconstant(_ad9361_swig)
REG_RX_BBF_C3_LSB = _ad9361_swig.REG_RX_BBF_C3_LSB
_ad9361_swig.REG_RX_BBF_CC1_CTR_swigconstant(_ad9361_swig)
REG_RX_BBF_CC1_CTR = _ad9361_swig.REG_RX_BBF_CC1_CTR
_ad9361_swig.REG_RX_BBF_POW_RZ_BYTE0_swigconstant(_ad9361_swig)
REG_RX_BBF_POW_RZ_BYTE0 = _ad9361_swig.REG_RX_BBF_POW_RZ_BYTE0
_ad9361_swig.REG_RX_BBF_CC2_CTR_swigconstant(_ad9361_swig)
REG_RX_BBF_CC2_CTR = _ad9361_swig.REG_RX_BBF_CC2_CTR
_ad9361_swig.REG_RX_BBF_POW_RZ_BYTE1_swigconstant(_ad9361_swig)
REG_RX_BBF_POW_RZ_BYTE1 = _ad9361_swig.REG_RX_BBF_POW_RZ_BYTE1
_ad9361_swig.REG_RX_BBF_CC3_CTR_swigconstant(_ad9361_swig)
REG_RX_BBF_CC3_CTR = _ad9361_swig.REG_RX_BBF_CC3_CTR
_ad9361_swig.REG_RX_BBF_R5_TUNE_swigconstant(_ad9361_swig)
REG_RX_BBF_R5_TUNE = _ad9361_swig.REG_RX_BBF_R5_TUNE
_ad9361_swig.REG_RX_BBF_TUNE_swigconstant(_ad9361_swig)
REG_RX_BBF_TUNE = _ad9361_swig.REG_RX_BBF_TUNE
_ad9361_swig.REG_RX1_BBF_MAN_GAIN_swigconstant(_ad9361_swig)
REG_RX1_BBF_MAN_GAIN = _ad9361_swig.REG_RX1_BBF_MAN_GAIN
_ad9361_swig.REG_RX2_BBF_MAN_GAIN_swigconstant(_ad9361_swig)
REG_RX2_BBF_MAN_GAIN = _ad9361_swig.REG_RX2_BBF_MAN_GAIN
_ad9361_swig.REG_RX_BBF_TUNE_DIVIDE_swigconstant(_ad9361_swig)
REG_RX_BBF_TUNE_DIVIDE = _ad9361_swig.REG_RX_BBF_TUNE_DIVIDE
_ad9361_swig.REG_RX_BBF_TUNE_CONFIG_swigconstant(_ad9361_swig)
REG_RX_BBF_TUNE_CONFIG = _ad9361_swig.REG_RX_BBF_TUNE_CONFIG
_ad9361_swig.REG_POLE_GAIN_swigconstant(_ad9361_swig)
REG_POLE_GAIN = _ad9361_swig.REG_POLE_GAIN
_ad9361_swig.REG_RX_BBBW_MHZ_swigconstant(_ad9361_swig)
REG_RX_BBBW_MHZ = _ad9361_swig.REG_RX_BBBW_MHZ
_ad9361_swig.REG_RX_BBBW_KHZ_swigconstant(_ad9361_swig)
REG_RX_BBBW_KHZ = _ad9361_swig.REG_RX_BBBW_KHZ
_ad9361_swig.REG_FB_DAC_CLK_DELAY1_swigconstant(_ad9361_swig)
REG_FB_DAC_CLK_DELAY1 = _ad9361_swig.REG_FB_DAC_CLK_DELAY1
_ad9361_swig.REG_FB_DAC_CLK_DELAY2_swigconstant(_ad9361_swig)
REG_FB_DAC_CLK_DELAY2 = _ad9361_swig.REG_FB_DAC_CLK_DELAY2
_ad9361_swig.REG_FLASH_SAMPLE_CLK_DELAY_3P_swigconstant(_ad9361_swig)
REG_FLASH_SAMPLE_CLK_DELAY_3P = _ad9361_swig.REG_FLASH_SAMPLE_CLK_DELAY_3P
_ad9361_swig.REG_FLASH_SAMPLE_CLK_DELAY_3N_swigconstant(_ad9361_swig)
REG_FLASH_SAMPLE_CLK_DELAY_3N = _ad9361_swig.REG_FLASH_SAMPLE_CLK_DELAY_3N
_ad9361_swig.REG_TEST_MUX_2I_swigconstant(_ad9361_swig)
REG_TEST_MUX_2I = _ad9361_swig.REG_TEST_MUX_2I
_ad9361_swig.REG_TEST_MUX_2Q_swigconstant(_ad9361_swig)
REG_TEST_MUX_2Q = _ad9361_swig.REG_TEST_MUX_2Q
_ad9361_swig.REG_INTEGRATOR_1_RESISTANCE_swigconstant(_ad9361_swig)
REG_INTEGRATOR_1_RESISTANCE = _ad9361_swig.REG_INTEGRATOR_1_RESISTANCE
_ad9361_swig.REG_INTEGRATOR_1_CAPACITANCE_swigconstant(_ad9361_swig)
REG_INTEGRATOR_1_CAPACITANCE = _ad9361_swig.REG_INTEGRATOR_1_CAPACITANCE
_ad9361_swig.REG_INTEGRATOR_23_RESISTANCE_swigconstant(_ad9361_swig)
REG_INTEGRATOR_23_RESISTANCE = _ad9361_swig.REG_INTEGRATOR_23_RESISTANCE
_ad9361_swig.REG_INTEGRATOR_2_RESISTANCE_swigconstant(_ad9361_swig)
REG_INTEGRATOR_2_RESISTANCE = _ad9361_swig.REG_INTEGRATOR_2_RESISTANCE
_ad9361_swig.REG_INTEGRATOR_2_CAPACITANCE_swigconstant(_ad9361_swig)
REG_INTEGRATOR_2_CAPACITANCE = _ad9361_swig.REG_INTEGRATOR_2_CAPACITANCE
_ad9361_swig.REG_INTEGRATOR_3_RESISTANCE_swigconstant(_ad9361_swig)
REG_INTEGRATOR_3_RESISTANCE = _ad9361_swig.REG_INTEGRATOR_3_RESISTANCE
_ad9361_swig.REG_INTEGRATOR_3_CAPACITANCE_swigconstant(_ad9361_swig)
REG_INTEGRATOR_3_CAPACITANCE = _ad9361_swig.REG_INTEGRATOR_3_CAPACITANCE
_ad9361_swig.REG_INTEGRATOR_AMP_CC_swigconstant(_ad9361_swig)
REG_INTEGRATOR_AMP_CC = _ad9361_swig.REG_INTEGRATOR_AMP_CC
_ad9361_swig.REG_INT_1_FB_DAC_NMOS_CURRENT_SOURCE_swigconstant(_ad9361_swig)
REG_INT_1_FB_DAC_NMOS_CURRENT_SOURCE = _ad9361_swig.REG_INT_1_FB_DAC_NMOS_CURRENT_SOURCE
_ad9361_swig.REG_INT_1_FB_DAC_NMOS_CASOADE_BIAS_CURRENT_swigconstant(_ad9361_swig)
REG_INT_1_FB_DAC_NMOS_CASOADE_BIAS_CURRENT = _ad9361_swig.REG_INT_1_FB_DAC_NMOS_CASOADE_BIAS_CURRENT
_ad9361_swig.REG_INT_1_FB_DAC_PMOS_CURRENT_SOURCE_swigconstant(_ad9361_swig)
REG_INT_1_FB_DAC_PMOS_CURRENT_SOURCE = _ad9361_swig.REG_INT_1_FB_DAC_PMOS_CURRENT_SOURCE
_ad9361_swig.REG_INT_2_FB_DAC_NMOS_CURRENT_SOURCE_swigconstant(_ad9361_swig)
REG_INT_2_FB_DAC_NMOS_CURRENT_SOURCE = _ad9361_swig.REG_INT_2_FB_DAC_NMOS_CURRENT_SOURCE
_ad9361_swig.REG_INT_2_FB_DAC_NMOS_CASCODE_BIAS_CURRENT_swigconstant(_ad9361_swig)
REG_INT_2_FB_DAC_NMOS_CASCODE_BIAS_CURRENT = _ad9361_swig.REG_INT_2_FB_DAC_NMOS_CASCODE_BIAS_CURRENT
_ad9361_swig.REG_INT_2_FB_DAC_PMOS_CURRENT_SOURCE_swigconstant(_ad9361_swig)
REG_INT_2_FB_DAC_PMOS_CURRENT_SOURCE = _ad9361_swig.REG_INT_2_FB_DAC_PMOS_CURRENT_SOURCE
_ad9361_swig.REG_INT_3_FB_DAC_NMOS_CURRENT_SOURCE_swigconstant(_ad9361_swig)
REG_INT_3_FB_DAC_NMOS_CURRENT_SOURCE = _ad9361_swig.REG_INT_3_FB_DAC_NMOS_CURRENT_SOURCE
_ad9361_swig.REG_INT_3_FB_DAC_NMOS_CASCODE_BIAS_CURRENT_swigconstant(_ad9361_swig)
REG_INT_3_FB_DAC_NMOS_CASCODE_BIAS_CURRENT = _ad9361_swig.REG_INT_3_FB_DAC_NMOS_CASCODE_BIAS_CURRENT
_ad9361_swig.REG_INT_3_FB_DAC_PMOS_CURRENT_SOURCE_swigconstant(_ad9361_swig)
REG_INT_3_FB_DAC_PMOS_CURRENT_SOURCE = _ad9361_swig.REG_INT_3_FB_DAC_PMOS_CURRENT_SOURCE
_ad9361_swig.REG_FB_DAC_BIAS_CURRENT_swigconstant(_ad9361_swig)
REG_FB_DAC_BIAS_CURRENT = _ad9361_swig.REG_FB_DAC_BIAS_CURRENT
_ad9361_swig.REG_INT_1_1ST_STAGE_CURRENT_swigconstant(_ad9361_swig)
REG_INT_1_1ST_STAGE_CURRENT = _ad9361_swig.REG_INT_1_1ST_STAGE_CURRENT
_ad9361_swig.REG_INT_1_1ST_STAGE_CASCODE_CURRENT_swigconstant(_ad9361_swig)
REG_INT_1_1ST_STAGE_CASCODE_CURRENT = _ad9361_swig.REG_INT_1_1ST_STAGE_CASCODE_CURRENT
_ad9361_swig.REG_INT_1_2ND_STAGE_CURRENT_swigconstant(_ad9361_swig)
REG_INT_1_2ND_STAGE_CURRENT = _ad9361_swig.REG_INT_1_2ND_STAGE_CURRENT
_ad9361_swig.REG_INTEGRATOR_2_1ST_STAGE_CURRENT_swigconstant(_ad9361_swig)
REG_INTEGRATOR_2_1ST_STAGE_CURRENT = _ad9361_swig.REG_INTEGRATOR_2_1ST_STAGE_CURRENT
_ad9361_swig.REG_INT_2_1ST_STAGE_CASCODE_CURRENT_swigconstant(_ad9361_swig)
REG_INT_2_1ST_STAGE_CASCODE_CURRENT = _ad9361_swig.REG_INT_2_1ST_STAGE_CASCODE_CURRENT
_ad9361_swig.REG_INT_2_2ND_STAGE_CURRENT_swigconstant(_ad9361_swig)
REG_INT_2_2ND_STAGE_CURRENT = _ad9361_swig.REG_INT_2_2ND_STAGE_CURRENT
_ad9361_swig.REG_INT_3_1ST_STAGE_CURRENT_swigconstant(_ad9361_swig)
REG_INT_3_1ST_STAGE_CURRENT = _ad9361_swig.REG_INT_3_1ST_STAGE_CURRENT
_ad9361_swig.REG_INT_3_1ST_STAGE_CASCODE_CURRENT_swigconstant(_ad9361_swig)
REG_INT_3_1ST_STAGE_CASCODE_CURRENT = _ad9361_swig.REG_INT_3_1ST_STAGE_CASCODE_CURRENT
_ad9361_swig.REG_INT_3_2ND_STAGE_CURRENT_swigconstant(_ad9361_swig)
REG_INT_3_2ND_STAGE_CURRENT = _ad9361_swig.REG_INT_3_2ND_STAGE_CURRENT
_ad9361_swig.REG_FLASH_BIAS_CURRENT_swigconstant(_ad9361_swig)
REG_FLASH_BIAS_CURRENT = _ad9361_swig.REG_FLASH_BIAS_CURRENT
_ad9361_swig.REG_FLASH_LADDER_BIAS_swigconstant(_ad9361_swig)
REG_FLASH_LADDER_BIAS = _ad9361_swig.REG_FLASH_LADDER_BIAS
_ad9361_swig.REG_FLASH_LADDER_CASCODE_CURRENT_swigconstant(_ad9361_swig)
REG_FLASH_LADDER_CASCODE_CURRENT = _ad9361_swig.REG_FLASH_LADDER_CASCODE_CURRENT
_ad9361_swig.REG_FLASH_LADDER_BIAS2_swigconstant(_ad9361_swig)
REG_FLASH_LADDER_BIAS2 = _ad9361_swig.REG_FLASH_LADDER_BIAS2
_ad9361_swig.REG_RESET_swigconstant(_ad9361_swig)
REG_RESET = _ad9361_swig.REG_RESET
_ad9361_swig.REG_RX_PFD_CONFIG_swigconstant(_ad9361_swig)
REG_RX_PFD_CONFIG = _ad9361_swig.REG_RX_PFD_CONFIG
_ad9361_swig.REG_RX_INTEGER_BYTE_0_swigconstant(_ad9361_swig)
REG_RX_INTEGER_BYTE_0 = _ad9361_swig.REG_RX_INTEGER_BYTE_0
_ad9361_swig.REG_RX_INTEGER_BYTE_1_swigconstant(_ad9361_swig)
REG_RX_INTEGER_BYTE_1 = _ad9361_swig.REG_RX_INTEGER_BYTE_1
_ad9361_swig.REG_RX_FRACT_BYTE_0_swigconstant(_ad9361_swig)
REG_RX_FRACT_BYTE_0 = _ad9361_swig.REG_RX_FRACT_BYTE_0
_ad9361_swig.REG_RX_FRACT_BYTE_1_swigconstant(_ad9361_swig)
REG_RX_FRACT_BYTE_1 = _ad9361_swig.REG_RX_FRACT_BYTE_1
_ad9361_swig.REG_RX_FRACT_BYTE_2_swigconstant(_ad9361_swig)
REG_RX_FRACT_BYTE_2 = _ad9361_swig.REG_RX_FRACT_BYTE_2
_ad9361_swig.REG_RX_FORCE_ALC_swigconstant(_ad9361_swig)
REG_RX_FORCE_ALC = _ad9361_swig.REG_RX_FORCE_ALC
_ad9361_swig.REG_RX_FORCE_VCO_TUNE_0_swigconstant(_ad9361_swig)
REG_RX_FORCE_VCO_TUNE_0 = _ad9361_swig.REG_RX_FORCE_VCO_TUNE_0
_ad9361_swig.REG_RX_FORCE_VCO_TUNE_1_swigconstant(_ad9361_swig)
REG_RX_FORCE_VCO_TUNE_1 = _ad9361_swig.REG_RX_FORCE_VCO_TUNE_1
_ad9361_swig.REG_RX_ALC_VARACTOR_swigconstant(_ad9361_swig)
REG_RX_ALC_VARACTOR = _ad9361_swig.REG_RX_ALC_VARACTOR
_ad9361_swig.REG_RX_VCO_OUTPUT_swigconstant(_ad9361_swig)
REG_RX_VCO_OUTPUT = _ad9361_swig.REG_RX_VCO_OUTPUT
_ad9361_swig.REG_RX_CP_CURRENT_swigconstant(_ad9361_swig)
REG_RX_CP_CURRENT = _ad9361_swig.REG_RX_CP_CURRENT
_ad9361_swig.REG_RX_CP_OFFSET_swigconstant(_ad9361_swig)
REG_RX_CP_OFFSET = _ad9361_swig.REG_RX_CP_OFFSET
_ad9361_swig.REG_RX_CP_CONFIG_swigconstant(_ad9361_swig)
REG_RX_CP_CONFIG = _ad9361_swig.REG_RX_CP_CONFIG
_ad9361_swig.REG_RX_LOOP_FILTER_1_swigconstant(_ad9361_swig)
REG_RX_LOOP_FILTER_1 = _ad9361_swig.REG_RX_LOOP_FILTER_1
_ad9361_swig.REG_RX_LOOP_FILTER_2_swigconstant(_ad9361_swig)
REG_RX_LOOP_FILTER_2 = _ad9361_swig.REG_RX_LOOP_FILTER_2
_ad9361_swig.REG_RX_LOOP_FILTER_3_swigconstant(_ad9361_swig)
REG_RX_LOOP_FILTER_3 = _ad9361_swig.REG_RX_LOOP_FILTER_3
_ad9361_swig.REG_RX_DITHERCP_CAL_swigconstant(_ad9361_swig)
REG_RX_DITHERCP_CAL = _ad9361_swig.REG_RX_DITHERCP_CAL
_ad9361_swig.REG_RX_VCO_BIAS_1_swigconstant(_ad9361_swig)
REG_RX_VCO_BIAS_1 = _ad9361_swig.REG_RX_VCO_BIAS_1
_ad9361_swig.REG_RX_CAL_STATUS_swigconstant(_ad9361_swig)
REG_RX_CAL_STATUS = _ad9361_swig.REG_RX_CAL_STATUS
_ad9361_swig.REG_RX_VCO_CAL_REF_swigconstant(_ad9361_swig)
REG_RX_VCO_CAL_REF = _ad9361_swig.REG_RX_VCO_CAL_REF
_ad9361_swig.REG_RX_VCO_PD_OVERRIDES_swigconstant(_ad9361_swig)
REG_RX_VCO_PD_OVERRIDES = _ad9361_swig.REG_RX_VCO_PD_OVERRIDES
_ad9361_swig.REG_RX_CP_OVERRANGE_VCO_LOCK_swigconstant(_ad9361_swig)
REG_RX_CP_OVERRANGE_VCO_LOCK = _ad9361_swig.REG_RX_CP_OVERRANGE_VCO_LOCK
_ad9361_swig.REG_RX_VCO_LDO_swigconstant(_ad9361_swig)
REG_RX_VCO_LDO = _ad9361_swig.REG_RX_VCO_LDO
_ad9361_swig.REG_RX_VCO_CAL_swigconstant(_ad9361_swig)
REG_RX_VCO_CAL = _ad9361_swig.REG_RX_VCO_CAL
_ad9361_swig.REG_RX_LOCK_DETECT_CONFIG_swigconstant(_ad9361_swig)
REG_RX_LOCK_DETECT_CONFIG = _ad9361_swig.REG_RX_LOCK_DETECT_CONFIG
_ad9361_swig.REG_RX_CP_LEVEL_DETECT_swigconstant(_ad9361_swig)
REG_RX_CP_LEVEL_DETECT = _ad9361_swig.REG_RX_CP_LEVEL_DETECT
_ad9361_swig.REG_RX_DSM_SETUP_0_swigconstant(_ad9361_swig)
REG_RX_DSM_SETUP_0 = _ad9361_swig.REG_RX_DSM_SETUP_0
_ad9361_swig.REG_RX_DSM_SETUP_1_swigconstant(_ad9361_swig)
REG_RX_DSM_SETUP_1 = _ad9361_swig.REG_RX_DSM_SETUP_1
_ad9361_swig.REG_RX_CORRECTION_WORD0_swigconstant(_ad9361_swig)
REG_RX_CORRECTION_WORD0 = _ad9361_swig.REG_RX_CORRECTION_WORD0
_ad9361_swig.REG_RX_CORRECTION_WORD1_swigconstant(_ad9361_swig)
REG_RX_CORRECTION_WORD1 = _ad9361_swig.REG_RX_CORRECTION_WORD1
_ad9361_swig.REG_RX_VCO_VARACTOR_CTRL_0_swigconstant(_ad9361_swig)
REG_RX_VCO_VARACTOR_CTRL_0 = _ad9361_swig.REG_RX_VCO_VARACTOR_CTRL_0
_ad9361_swig.REG_RX_VCO_VARACTOR_CTRL_1_swigconstant(_ad9361_swig)
REG_RX_VCO_VARACTOR_CTRL_1 = _ad9361_swig.REG_RX_VCO_VARACTOR_CTRL_1
_ad9361_swig.REG_RX_FAST_LOCK_SETUP_swigconstant(_ad9361_swig)
REG_RX_FAST_LOCK_SETUP = _ad9361_swig.REG_RX_FAST_LOCK_SETUP
_ad9361_swig.REG_RX_FAST_LOCK_SETUP_INIT_DELAY_swigconstant(_ad9361_swig)
REG_RX_FAST_LOCK_SETUP_INIT_DELAY = _ad9361_swig.REG_RX_FAST_LOCK_SETUP_INIT_DELAY
_ad9361_swig.REG_RX_FAST_LOCK_PROGRAM_ADDR_swigconstant(_ad9361_swig)
REG_RX_FAST_LOCK_PROGRAM_ADDR = _ad9361_swig.REG_RX_FAST_LOCK_PROGRAM_ADDR
_ad9361_swig.REG_RX_FAST_LOCK_PROGRAM_DATA_swigconstant(_ad9361_swig)
REG_RX_FAST_LOCK_PROGRAM_DATA = _ad9361_swig.REG_RX_FAST_LOCK_PROGRAM_DATA
_ad9361_swig.REG_RX_FAST_LOCK_PROGRAM_READ_swigconstant(_ad9361_swig)
REG_RX_FAST_LOCK_PROGRAM_READ = _ad9361_swig.REG_RX_FAST_LOCK_PROGRAM_READ
_ad9361_swig.REG_RX_FAST_LOCK_PROGRAM_CTRL_swigconstant(_ad9361_swig)
REG_RX_FAST_LOCK_PROGRAM_CTRL = _ad9361_swig.REG_RX_FAST_LOCK_PROGRAM_CTRL
_ad9361_swig.REG_RX_LO_GEN_POWER_MODE_swigconstant(_ad9361_swig)
REG_RX_LO_GEN_POWER_MODE = _ad9361_swig.REG_RX_LO_GEN_POWER_MODE
_ad9361_swig.REG_TX_PFD_CONFIG_swigconstant(_ad9361_swig)
REG_TX_PFD_CONFIG = _ad9361_swig.REG_TX_PFD_CONFIG
_ad9361_swig.REG_TX_INTEGER_BYTE_0_swigconstant(_ad9361_swig)
REG_TX_INTEGER_BYTE_0 = _ad9361_swig.REG_TX_INTEGER_BYTE_0
_ad9361_swig.REG_TX_INTEGER_BYTE_1_swigconstant(_ad9361_swig)
REG_TX_INTEGER_BYTE_1 = _ad9361_swig.REG_TX_INTEGER_BYTE_1
_ad9361_swig.REG_TX_FRACT_BYTE_0_swigconstant(_ad9361_swig)
REG_TX_FRACT_BYTE_0 = _ad9361_swig.REG_TX_FRACT_BYTE_0
_ad9361_swig.REG_TX_FRACT_BYTE_1_swigconstant(_ad9361_swig)
REG_TX_FRACT_BYTE_1 = _ad9361_swig.REG_TX_FRACT_BYTE_1
_ad9361_swig.REG_TX_FRACT_BYTE_2_swigconstant(_ad9361_swig)
REG_TX_FRACT_BYTE_2 = _ad9361_swig.REG_TX_FRACT_BYTE_2
_ad9361_swig.REG_TX_FORCE_ALC_swigconstant(_ad9361_swig)
REG_TX_FORCE_ALC = _ad9361_swig.REG_TX_FORCE_ALC
_ad9361_swig.REG_TX_FORCE_VCO_TUNE_0_swigconstant(_ad9361_swig)
REG_TX_FORCE_VCO_TUNE_0 = _ad9361_swig.REG_TX_FORCE_VCO_TUNE_0
_ad9361_swig.REG_TX_FORCE_VCO_TUNE_1_swigconstant(_ad9361_swig)
REG_TX_FORCE_VCO_TUNE_1 = _ad9361_swig.REG_TX_FORCE_VCO_TUNE_1
_ad9361_swig.REG_TX_ALCVARACT_OR_swigconstant(_ad9361_swig)
REG_TX_ALCVARACT_OR = _ad9361_swig.REG_TX_ALCVARACT_OR
_ad9361_swig.REG_TX_VCO_OUTPUT_swigconstant(_ad9361_swig)
REG_TX_VCO_OUTPUT = _ad9361_swig.REG_TX_VCO_OUTPUT
_ad9361_swig.REG_TX_CP_CURRENT_swigconstant(_ad9361_swig)
REG_TX_CP_CURRENT = _ad9361_swig.REG_TX_CP_CURRENT
_ad9361_swig.REG_TX_CP_OFFSET_swigconstant(_ad9361_swig)
REG_TX_CP_OFFSET = _ad9361_swig.REG_TX_CP_OFFSET
_ad9361_swig.REG_TX_CP_CONFIG_swigconstant(_ad9361_swig)
REG_TX_CP_CONFIG = _ad9361_swig.REG_TX_CP_CONFIG
_ad9361_swig.REG_TX_LOOP_FILTER_1_swigconstant(_ad9361_swig)
REG_TX_LOOP_FILTER_1 = _ad9361_swig.REG_TX_LOOP_FILTER_1
_ad9361_swig.REG_TX_LOOP_FILTER_2_swigconstant(_ad9361_swig)
REG_TX_LOOP_FILTER_2 = _ad9361_swig.REG_TX_LOOP_FILTER_2
_ad9361_swig.REG_TX_LOOP_FILTER_3_swigconstant(_ad9361_swig)
REG_TX_LOOP_FILTER_3 = _ad9361_swig.REG_TX_LOOP_FILTER_3
_ad9361_swig.REG_TX_DITHERCP_CAL_swigconstant(_ad9361_swig)
REG_TX_DITHERCP_CAL = _ad9361_swig.REG_TX_DITHERCP_CAL
_ad9361_swig.REG_TX_VCO_BIAS_1_swigconstant(_ad9361_swig)
REG_TX_VCO_BIAS_1 = _ad9361_swig.REG_TX_VCO_BIAS_1
_ad9361_swig.REG_TX_VCO_BIAS_2_swigconstant(_ad9361_swig)
REG_TX_VCO_BIAS_2 = _ad9361_swig.REG_TX_VCO_BIAS_2
_ad9361_swig.REG_TX_CAL_STATUS_swigconstant(_ad9361_swig)
REG_TX_CAL_STATUS = _ad9361_swig.REG_TX_CAL_STATUS
_ad9361_swig.REG_TX_VCO_CAL_REF_swigconstant(_ad9361_swig)
REG_TX_VCO_CAL_REF = _ad9361_swig.REG_TX_VCO_CAL_REF
_ad9361_swig.REG_TX_VCO_PD_OVERRIDES_swigconstant(_ad9361_swig)
REG_TX_VCO_PD_OVERRIDES = _ad9361_swig.REG_TX_VCO_PD_OVERRIDES
_ad9361_swig.REG_TX_CP_OVERRANGE_VCO_LOCK_swigconstant(_ad9361_swig)
REG_TX_CP_OVERRANGE_VCO_LOCK = _ad9361_swig.REG_TX_CP_OVERRANGE_VCO_LOCK
_ad9361_swig.REG_TX_VCO_LDO_swigconstant(_ad9361_swig)
REG_TX_VCO_LDO = _ad9361_swig.REG_TX_VCO_LDO
_ad9361_swig.REG_TX_VCO_CAL_swigconstant(_ad9361_swig)
REG_TX_VCO_CAL = _ad9361_swig.REG_TX_VCO_CAL
_ad9361_swig.REG_TX_LOCK_DETECT_CONFIG_swigconstant(_ad9361_swig)
REG_TX_LOCK_DETECT_CONFIG = _ad9361_swig.REG_TX_LOCK_DETECT_CONFIG
_ad9361_swig.REG_TX_CP_LEVEL_DETECT_swigconstant(_ad9361_swig)
REG_TX_CP_LEVEL_DETECT = _ad9361_swig.REG_TX_CP_LEVEL_DETECT
_ad9361_swig.REG_TX_DSM_SETUP_0_swigconstant(_ad9361_swig)
REG_TX_DSM_SETUP_0 = _ad9361_swig.REG_TX_DSM_SETUP_0
_ad9361_swig.REG_TX_DSM_SETUP_1_swigconstant(_ad9361_swig)
REG_TX_DSM_SETUP_1 = _ad9361_swig.REG_TX_DSM_SETUP_1
_ad9361_swig.REG_TX_CORRECTION_WORD0_swigconstant(_ad9361_swig)
REG_TX_CORRECTION_WORD0 = _ad9361_swig.REG_TX_CORRECTION_WORD0
_ad9361_swig.REG_TX_CORRECTION_WORD1_swigconstant(_ad9361_swig)
REG_TX_CORRECTION_WORD1 = _ad9361_swig.REG_TX_CORRECTION_WORD1
_ad9361_swig.REG_TX_VCO_VARACTOR_CTRL_0_swigconstant(_ad9361_swig)
REG_TX_VCO_VARACTOR_CTRL_0 = _ad9361_swig.REG_TX_VCO_VARACTOR_CTRL_0
_ad9361_swig.REG_TX_VCO_VARACTOR_CTRL_1_swigconstant(_ad9361_swig)
REG_TX_VCO_VARACTOR_CTRL_1 = _ad9361_swig.REG_TX_VCO_VARACTOR_CTRL_1
_ad9361_swig.REG_DCXO_COARSE_TUNE_swigconstant(_ad9361_swig)
REG_DCXO_COARSE_TUNE = _ad9361_swig.REG_DCXO_COARSE_TUNE
_ad9361_swig.REG_DCXO_FINE_TUNE_HIGH_swigconstant(_ad9361_swig)
REG_DCXO_FINE_TUNE_HIGH = _ad9361_swig.REG_DCXO_FINE_TUNE_HIGH
_ad9361_swig.REG_DCXO_FINE_TUNE_LOW_swigconstant(_ad9361_swig)
REG_DCXO_FINE_TUNE_LOW = _ad9361_swig.REG_DCXO_FINE_TUNE_LOW
_ad9361_swig.REG_DCXO_CONFIG_swigconstant(_ad9361_swig)
REG_DCXO_CONFIG = _ad9361_swig.REG_DCXO_CONFIG
_ad9361_swig.REG_DCXO_TEMPCO_WRITE_swigconstant(_ad9361_swig)
REG_DCXO_TEMPCO_WRITE = _ad9361_swig.REG_DCXO_TEMPCO_WRITE
_ad9361_swig.REG_DCXO_TEMPCO_READ_swigconstant(_ad9361_swig)
REG_DCXO_TEMPCO_READ = _ad9361_swig.REG_DCXO_TEMPCO_READ
_ad9361_swig.REG_DCXO_TEMPCO_ADDR_swigconstant(_ad9361_swig)
REG_DCXO_TEMPCO_ADDR = _ad9361_swig.REG_DCXO_TEMPCO_ADDR
_ad9361_swig.REG_DELTA_T_READ_swigconstant(_ad9361_swig)
REG_DELTA_T_READ = _ad9361_swig.REG_DELTA_T_READ
_ad9361_swig.REG_TX_FAST_LOCK_SETUP_swigconstant(_ad9361_swig)
REG_TX_FAST_LOCK_SETUP = _ad9361_swig.REG_TX_FAST_LOCK_SETUP
_ad9361_swig.REG_TX_FAST_LOCK_SETUP_INIT_DELAY_swigconstant(_ad9361_swig)
REG_TX_FAST_LOCK_SETUP_INIT_DELAY = _ad9361_swig.REG_TX_FAST_LOCK_SETUP_INIT_DELAY
_ad9361_swig.REG_TX_FAST_LOCK_PROGRAM_ADDR_swigconstant(_ad9361_swig)
REG_TX_FAST_LOCK_PROGRAM_ADDR = _ad9361_swig.REG_TX_FAST_LOCK_PROGRAM_ADDR
_ad9361_swig.REG_TX_FAST_LOCK_PROGRAM_DATA_swigconstant(_ad9361_swig)
REG_TX_FAST_LOCK_PROGRAM_DATA = _ad9361_swig.REG_TX_FAST_LOCK_PROGRAM_DATA
_ad9361_swig.REG_TX_FAST_LOCK_PROGRAM_READ_swigconstant(_ad9361_swig)
REG_TX_FAST_LOCK_PROGRAM_READ = _ad9361_swig.REG_TX_FAST_LOCK_PROGRAM_READ
_ad9361_swig.REG_TX_FAST_LOCK_PROGRAM_CTRL_swigconstant(_ad9361_swig)
REG_TX_FAST_LOCK_PROGRAM_CTRL = _ad9361_swig.REG_TX_FAST_LOCK_PROGRAM_CTRL
_ad9361_swig.REG_TX_LO_GEN_POWER_MODE_swigconstant(_ad9361_swig)
REG_TX_LO_GEN_POWER_MODE = _ad9361_swig.REG_TX_LO_GEN_POWER_MODE
_ad9361_swig.REG_BANDGAP_CONFIG0_swigconstant(_ad9361_swig)
REG_BANDGAP_CONFIG0 = _ad9361_swig.REG_BANDGAP_CONFIG0
_ad9361_swig.REG_BANDGAP_CONFIG1_swigconstant(_ad9361_swig)
REG_BANDGAP_CONFIG1 = _ad9361_swig.REG_BANDGAP_CONFIG1
_ad9361_swig.REG_REF_DIVIDE_CONFIG_1_swigconstant(_ad9361_swig)
REG_REF_DIVIDE_CONFIG_1 = _ad9361_swig.REG_REF_DIVIDE_CONFIG_1
_ad9361_swig.REG_REF_DIVIDE_CONFIG_2_swigconstant(_ad9361_swig)
REG_REF_DIVIDE_CONFIG_2 = _ad9361_swig.REG_REF_DIVIDE_CONFIG_2
_ad9361_swig.REG_GAIN_RX1_swigconstant(_ad9361_swig)
REG_GAIN_RX1 = _ad9361_swig.REG_GAIN_RX1
_ad9361_swig.REG_LPF_GAIN_RX1_swigconstant(_ad9361_swig)
REG_LPF_GAIN_RX1 = _ad9361_swig.REG_LPF_GAIN_RX1
_ad9361_swig.REG_DIG_GAIN_RX1_swigconstant(_ad9361_swig)
REG_DIG_GAIN_RX1 = _ad9361_swig.REG_DIG_GAIN_RX1
_ad9361_swig.REG_FAST_ATTACK_STATE_swigconstant(_ad9361_swig)
REG_FAST_ATTACK_STATE = _ad9361_swig.REG_FAST_ATTACK_STATE
_ad9361_swig.REG_SLOW_LOOP_STATE_swigconstant(_ad9361_swig)
REG_SLOW_LOOP_STATE = _ad9361_swig.REG_SLOW_LOOP_STATE
_ad9361_swig.REG_GAIN_RX2_swigconstant(_ad9361_swig)
REG_GAIN_RX2 = _ad9361_swig.REG_GAIN_RX2
_ad9361_swig.REG_LPF_GAIN_RX2_swigconstant(_ad9361_swig)
REG_LPF_GAIN_RX2 = _ad9361_swig.REG_LPF_GAIN_RX2
_ad9361_swig.REG_DIG_GAIN_RX2_swigconstant(_ad9361_swig)
REG_DIG_GAIN_RX2 = _ad9361_swig.REG_DIG_GAIN_RX2
_ad9361_swig.REG_OVRG_SIGS_RX1_swigconstant(_ad9361_swig)
REG_OVRG_SIGS_RX1 = _ad9361_swig.REG_OVRG_SIGS_RX1
_ad9361_swig.REG_OVRG_SIGS_RX2_swigconstant(_ad9361_swig)
REG_OVRG_SIGS_RX2 = _ad9361_swig.REG_OVRG_SIGS_RX2
_ad9361_swig.REG_CTRL_swigconstant(_ad9361_swig)
REG_CTRL = _ad9361_swig.REG_CTRL
_ad9361_swig.REG_BIST_CONFIG_swigconstant(_ad9361_swig)
REG_BIST_CONFIG = _ad9361_swig.REG_BIST_CONFIG
_ad9361_swig.REG_OBSERVE_CONFIG_swigconstant(_ad9361_swig)
REG_OBSERVE_CONFIG = _ad9361_swig.REG_OBSERVE_CONFIG
_ad9361_swig.REG_BIST_AND_DATA_PORT_TEST_CONFIG_swigconstant(_ad9361_swig)
REG_BIST_AND_DATA_PORT_TEST_CONFIG = _ad9361_swig.REG_BIST_AND_DATA_PORT_TEST_CONFIG
_ad9361_swig.REG_DAC_TEST_0_swigconstant(_ad9361_swig)
REG_DAC_TEST_0 = _ad9361_swig.REG_DAC_TEST_0
_ad9361_swig.REG_DAC_TEST_1_swigconstant(_ad9361_swig)
REG_DAC_TEST_1 = _ad9361_swig.REG_DAC_TEST_1
_ad9361_swig.REG_DAC_TEST_2_swigconstant(_ad9361_swig)
REG_DAC_TEST_2 = _ad9361_swig.REG_DAC_TEST_2
_ad9361_swig.SOFT_RESET_swigconstant(_ad9361_swig)
SOFT_RESET = _ad9361_swig.SOFT_RESET
_ad9361_swig.WIRE3_SPI_swigconstant(_ad9361_swig)
WIRE3_SPI = _ad9361_swig.WIRE3_SPI
_ad9361_swig.LSB_FIRST_swigconstant(_ad9361_swig)
LSB_FIRST = _ad9361_swig.LSB_FIRST
_ad9361_swig._LSB_FIRST_swigconstant(_ad9361_swig)
_LSB_FIRST = _ad9361_swig._LSB_FIRST
_ad9361_swig._WIRE3_SPI_swigconstant(_ad9361_swig)
_WIRE3_SPI = _ad9361_swig._WIRE3_SPI
_ad9361_swig._SOFT_RESET_swigconstant(_ad9361_swig)
_SOFT_RESET = _ad9361_swig._SOFT_RESET
_ad9361_swig.TX2_MONITOR_ENABLE_swigconstant(_ad9361_swig)
TX2_MONITOR_ENABLE = _ad9361_swig.TX2_MONITOR_ENABLE
_ad9361_swig.TX1_MONITOR_ENABLE_swigconstant(_ad9361_swig)
TX1_MONITOR_ENABLE = _ad9361_swig.TX1_MONITOR_ENABLE
_ad9361_swig.MCS_RF_ENABLE_swigconstant(_ad9361_swig)
MCS_RF_ENABLE = _ad9361_swig.MCS_RF_ENABLE
_ad9361_swig.MCS_BBPLL_ENABLE_swigconstant(_ad9361_swig)
MCS_BBPLL_ENABLE = _ad9361_swig.MCS_BBPLL_ENABLE
_ad9361_swig.MCS_DIGITAL_CLK_ENABLE_swigconstant(_ad9361_swig)
MCS_DIGITAL_CLK_ENABLE = _ad9361_swig.MCS_DIGITAL_CLK_ENABLE
_ad9361_swig.MCS_BB_ENABLE_swigconstant(_ad9361_swig)
MCS_BB_ENABLE = _ad9361_swig.MCS_BB_ENABLE
_ad9361_swig.THB2_EN_swigconstant(_ad9361_swig)
THB2_EN = _ad9361_swig.THB2_EN
_ad9361_swig.THB1_EN_swigconstant(_ad9361_swig)
THB1_EN = _ad9361_swig.THB1_EN
_ad9361_swig.TX_1_swigconstant(_ad9361_swig)
TX_1 = _ad9361_swig.TX_1
_ad9361_swig.TX_2_swigconstant(_ad9361_swig)
TX_2 = _ad9361_swig.TX_2
_ad9361_swig.TX_ENABLE_swigconstant(_ad9361_swig)
TX_ENABLE = _ad9361_swig.TX_ENABLE
_ad9361_swig.TX_DISABLE_swigconstant(_ad9361_swig)
TX_DISABLE = _ad9361_swig.TX_DISABLE
_ad9361_swig.RHB2_EN_swigconstant(_ad9361_swig)
RHB2_EN = _ad9361_swig.RHB2_EN
_ad9361_swig.RHB1_EN_swigconstant(_ad9361_swig)
RHB1_EN = _ad9361_swig.RHB1_EN
_ad9361_swig.RX_1_swigconstant(_ad9361_swig)
RX_1 = _ad9361_swig.RX_1
_ad9361_swig.RX_2_swigconstant(_ad9361_swig)
RX_2 = _ad9361_swig.RX_2
_ad9361_swig.RX_ENABLE_swigconstant(_ad9361_swig)
RX_ENABLE = _ad9361_swig.RX_ENABLE
_ad9361_swig.RX_DISABLE_swigconstant(_ad9361_swig)
RX_DISABLE = _ad9361_swig.RX_DISABLE
_ad9361_swig.TX_OUTPUT_swigconstant(_ad9361_swig)
TX_OUTPUT = _ad9361_swig.TX_OUTPUT
_ad9361_swig.XO_BYPASS_swigconstant(_ad9361_swig)
XO_BYPASS = _ad9361_swig.XO_BYPASS
_ad9361_swig.DIGITAL_POWER_UP_swigconstant(_ad9361_swig)
DIGITAL_POWER_UP = _ad9361_swig.DIGITAL_POWER_UP
_ad9361_swig.CLOCK_ENABLE_DFLT_swigconstant(_ad9361_swig)
CLOCK_ENABLE_DFLT = _ad9361_swig.CLOCK_ENABLE_DFLT
_ad9361_swig.BBPLL_ENABLE_swigconstant(_ad9361_swig)
BBPLL_ENABLE = _ad9361_swig.BBPLL_ENABLE
_ad9361_swig.CLKOUT_ENABLE_swigconstant(_ad9361_swig)
CLKOUT_ENABLE = _ad9361_swig.CLKOUT_ENABLE
_ad9361_swig.DAC_CLK_DIV2_swigconstant(_ad9361_swig)
DAC_CLK_DIV2 = _ad9361_swig.DAC_CLK_DIV2
_ad9361_swig.START_TEMP_READING_swigconstant(_ad9361_swig)
START_TEMP_READING = _ad9361_swig.START_TEMP_READING
_ad9361_swig.TEMP_SENSE_PERIODIC_ENABLE_swigconstant(_ad9361_swig)
TEMP_SENSE_PERIODIC_ENABLE = _ad9361_swig.TEMP_SENSE_PERIODIC_ENABLE
_ad9361_swig.PP_TX_SWAP_IQ_swigconstant(_ad9361_swig)
PP_TX_SWAP_IQ = _ad9361_swig.PP_TX_SWAP_IQ
_ad9361_swig.PP_RX_SWAP_IQ_swigconstant(_ad9361_swig)
PP_RX_SWAP_IQ = _ad9361_swig.PP_RX_SWAP_IQ
_ad9361_swig.TX_CHANNEL_SWAP_swigconstant(_ad9361_swig)
TX_CHANNEL_SWAP = _ad9361_swig.TX_CHANNEL_SWAP
_ad9361_swig.RX_CHANNEL_SWAP_swigconstant(_ad9361_swig)
RX_CHANNEL_SWAP = _ad9361_swig.RX_CHANNEL_SWAP
_ad9361_swig.RX_FRAME_PULSE_MODE_swigconstant(_ad9361_swig)
RX_FRAME_PULSE_MODE = _ad9361_swig.RX_FRAME_PULSE_MODE
_ad9361_swig.R2T2_TIMING_swigconstant(_ad9361_swig)
R2T2_TIMING = _ad9361_swig.R2T2_TIMING
_ad9361_swig.INVERT_DATA_BUS_swigconstant(_ad9361_swig)
INVERT_DATA_BUS = _ad9361_swig.INVERT_DATA_BUS
_ad9361_swig.INVERT_DATA_CLK_swigconstant(_ad9361_swig)
INVERT_DATA_CLK = _ad9361_swig.INVERT_DATA_CLK
_ad9361_swig.FDD_ALT_WORD_ORDER_swigconstant(_ad9361_swig)
FDD_ALT_WORD_ORDER = _ad9361_swig.FDD_ALT_WORD_ORDER
_ad9361_swig.INVERT_RX1_swigconstant(_ad9361_swig)
INVERT_RX1 = _ad9361_swig.INVERT_RX1
_ad9361_swig.INVERT_RX2_swigconstant(_ad9361_swig)
INVERT_RX2 = _ad9361_swig.INVERT_RX2
_ad9361_swig.INVERT_TX1_swigconstant(_ad9361_swig)
INVERT_TX1 = _ad9361_swig.INVERT_TX1
_ad9361_swig.INVERT_TX2_swigconstant(_ad9361_swig)
INVERT_TX2 = _ad9361_swig.INVERT_TX2
_ad9361_swig.INVERT_RX_FRAME_swigconstant(_ad9361_swig)
INVERT_RX_FRAME = _ad9361_swig.INVERT_RX_FRAME
_ad9361_swig.FDD_RX_RATE_2TX_RATE_swigconstant(_ad9361_swig)
FDD_RX_RATE_2TX_RATE = _ad9361_swig.FDD_RX_RATE_2TX_RATE
_ad9361_swig.SWAP_PORTS_swigconstant(_ad9361_swig)
SWAP_PORTS = _ad9361_swig.SWAP_PORTS
_ad9361_swig.SINGLE_DATA_RATE_swigconstant(_ad9361_swig)
SINGLE_DATA_RATE = _ad9361_swig.SINGLE_DATA_RATE
_ad9361_swig.LVDS_MODE_swigconstant(_ad9361_swig)
LVDS_MODE = _ad9361_swig.LVDS_MODE
_ad9361_swig.HALF_DUPLEX_MODE_swigconstant(_ad9361_swig)
HALF_DUPLEX_MODE = _ad9361_swig.HALF_DUPLEX_MODE
_ad9361_swig.SINGLE_PORT_MODE_swigconstant(_ad9361_swig)
SINGLE_PORT_MODE = _ad9361_swig.SINGLE_PORT_MODE
_ad9361_swig.FULL_PORT_swigconstant(_ad9361_swig)
FULL_PORT = _ad9361_swig.FULL_PORT
_ad9361_swig.FULL_DUPLEX_SWAP_BITS_swigconstant(_ad9361_swig)
FULL_DUPLEX_SWAP_BITS = _ad9361_swig.FULL_DUPLEX_SWAP_BITS
_ad9361_swig.FDD_MODE_swigconstant(_ad9361_swig)
FDD_MODE = _ad9361_swig.FDD_MODE
_ad9361_swig.ENABLE_RX_DATA_PORT_FOR_CAL_swigconstant(_ad9361_swig)
ENABLE_RX_DATA_PORT_FOR_CAL = _ad9361_swig.ENABLE_RX_DATA_PORT_FOR_CAL
_ad9361_swig.FORCE_RX_ON_swigconstant(_ad9361_swig)
FORCE_RX_ON = _ad9361_swig.FORCE_RX_ON
_ad9361_swig.FORCE_TX_ON_swigconstant(_ad9361_swig)
FORCE_TX_ON = _ad9361_swig.FORCE_TX_ON
_ad9361_swig.ENABLE_ENSM_PIN_CTRL_swigconstant(_ad9361_swig)
ENABLE_ENSM_PIN_CTRL = _ad9361_swig.ENABLE_ENSM_PIN_CTRL
_ad9361_swig.LEVEL_MODE_swigconstant(_ad9361_swig)
LEVEL_MODE = _ad9361_swig.LEVEL_MODE
_ad9361_swig.FORCE_ALERT_STATE_swigconstant(_ad9361_swig)
FORCE_ALERT_STATE = _ad9361_swig.FORCE_ALERT_STATE
_ad9361_swig.AUTO_GAIN_LOCK_swigconstant(_ad9361_swig)
AUTO_GAIN_LOCK = _ad9361_swig.AUTO_GAIN_LOCK
_ad9361_swig.TO_ALERT_swigconstant(_ad9361_swig)
TO_ALERT = _ad9361_swig.TO_ALERT
_ad9361_swig.FDD_EXTERNAL_CTRL_ENABLE_swigconstant(_ad9361_swig)
FDD_EXTERNAL_CTRL_ENABLE = _ad9361_swig.FDD_EXTERNAL_CTRL_ENABLE
_ad9361_swig.POWER_DOWN_RX_SYNTH_swigconstant(_ad9361_swig)
POWER_DOWN_RX_SYNTH = _ad9361_swig.POWER_DOWN_RX_SYNTH
_ad9361_swig.POWER_DOWN_TX_SYNTH_swigconstant(_ad9361_swig)
POWER_DOWN_TX_SYNTH = _ad9361_swig.POWER_DOWN_TX_SYNTH
_ad9361_swig.TXNRX_SPI_CTRL_swigconstant(_ad9361_swig)
TXNRX_SPI_CTRL = _ad9361_swig.TXNRX_SPI_CTRL
_ad9361_swig.SYNTH_ENABLE_PIN_CTRL_MODE_swigconstant(_ad9361_swig)
SYNTH_ENABLE_PIN_CTRL_MODE = _ad9361_swig.SYNTH_ENABLE_PIN_CTRL_MODE
_ad9361_swig.DUAL_SYNTH_MODE_swigconstant(_ad9361_swig)
DUAL_SYNTH_MODE = _ad9361_swig.DUAL_SYNTH_MODE
_ad9361_swig.RX_SYNTH_READY_MASK_swigconstant(_ad9361_swig)
RX_SYNTH_READY_MASK = _ad9361_swig.RX_SYNTH_READY_MASK
_ad9361_swig.TX_SYNTH_READY_MASK_swigconstant(_ad9361_swig)
TX_SYNTH_READY_MASK = _ad9361_swig.TX_SYNTH_READY_MASK
_ad9361_swig.RX_BB_TUNE_CAL_swigconstant(_ad9361_swig)
RX_BB_TUNE_CAL = _ad9361_swig.RX_BB_TUNE_CAL
_ad9361_swig.TX_BB_TUNE_CAL_swigconstant(_ad9361_swig)
TX_BB_TUNE_CAL = _ad9361_swig.TX_BB_TUNE_CAL
_ad9361_swig.RX_QUAD_CAL_swigconstant(_ad9361_swig)
RX_QUAD_CAL = _ad9361_swig.RX_QUAD_CAL
_ad9361_swig.TX_QUAD_CAL_swigconstant(_ad9361_swig)
TX_QUAD_CAL = _ad9361_swig.TX_QUAD_CAL
_ad9361_swig.RX_GAIN_STEP_CAL_swigconstant(_ad9361_swig)
RX_GAIN_STEP_CAL = _ad9361_swig.RX_GAIN_STEP_CAL
_ad9361_swig.TXMON_CAL_swigconstant(_ad9361_swig)
TXMON_CAL = _ad9361_swig.TXMON_CAL
_ad9361_swig.RFDC_CAL_swigconstant(_ad9361_swig)
RFDC_CAL = _ad9361_swig.RFDC_CAL
_ad9361_swig.BBDC_CAL_swigconstant(_ad9361_swig)
BBDC_CAL = _ad9361_swig.BBDC_CAL
_ad9361_swig.ENSM_STATE_SLEEP_WAIT_swigconstant(_ad9361_swig)
ENSM_STATE_SLEEP_WAIT = _ad9361_swig.ENSM_STATE_SLEEP_WAIT
_ad9361_swig.ENSM_STATE_ALERT_swigconstant(_ad9361_swig)
ENSM_STATE_ALERT = _ad9361_swig.ENSM_STATE_ALERT
_ad9361_swig.ENSM_STATE_TX_swigconstant(_ad9361_swig)
ENSM_STATE_TX = _ad9361_swig.ENSM_STATE_TX
_ad9361_swig.ENSM_STATE_TX_FLUSH_swigconstant(_ad9361_swig)
ENSM_STATE_TX_FLUSH = _ad9361_swig.ENSM_STATE_TX_FLUSH
_ad9361_swig.ENSM_STATE_RX_swigconstant(_ad9361_swig)
ENSM_STATE_RX = _ad9361_swig.ENSM_STATE_RX
_ad9361_swig.ENSM_STATE_RX_FLUSH_swigconstant(_ad9361_swig)
ENSM_STATE_RX_FLUSH = _ad9361_swig.ENSM_STATE_RX_FLUSH
_ad9361_swig.ENSM_STATE_FDD_swigconstant(_ad9361_swig)
ENSM_STATE_FDD = _ad9361_swig.ENSM_STATE_FDD
_ad9361_swig.ENSM_STATE_FDD_FLUSH_swigconstant(_ad9361_swig)
ENSM_STATE_FDD_FLUSH = _ad9361_swig.ENSM_STATE_FDD_FLUSH
_ad9361_swig.ENSM_STATE_INVALID_swigconstant(_ad9361_swig)
ENSM_STATE_INVALID = _ad9361_swig.ENSM_STATE_INVALID
_ad9361_swig.ENSM_STATE_SLEEP_swigconstant(_ad9361_swig)
ENSM_STATE_SLEEP = _ad9361_swig.ENSM_STATE_SLEEP
_ad9361_swig.COMP_CTRL_1_swigconstant(_ad9361_swig)
COMP_CTRL_1 = _ad9361_swig.COMP_CTRL_1
_ad9361_swig.AUXDAC1_STP_FACTOR_swigconstant(_ad9361_swig)
AUXDAC1_STP_FACTOR = _ad9361_swig.AUXDAC1_STP_FACTOR
_ad9361_swig.COMP_CTRL_2_swigconstant(_ad9361_swig)
COMP_CTRL_2 = _ad9361_swig.COMP_CTRL_2
_ad9361_swig.AUXDAC2_STP_FACTOR_swigconstant(_ad9361_swig)
AUXDAC2_STP_FACTOR = _ad9361_swig.AUXDAC2_STP_FACTOR
_ad9361_swig.AUXADC_POWER_DOWN_swigconstant(_ad9361_swig)
AUXADC_POWER_DOWN = _ad9361_swig.AUXADC_POWER_DOWN
_ad9361_swig.INVERT_BYPASSED_LNA_POLARITY_swigconstant(_ad9361_swig)
INVERT_BYPASSED_LNA_POLARITY = _ad9361_swig.INVERT_BYPASSED_LNA_POLARITY
_ad9361_swig.AUXDAC_MANUAL_SELECT_swigconstant(_ad9361_swig)
AUXDAC_MANUAL_SELECT = _ad9361_swig.AUXDAC_MANUAL_SELECT
_ad9361_swig.EXTERNAL_LNA2_CTRL_swigconstant(_ad9361_swig)
EXTERNAL_LNA2_CTRL = _ad9361_swig.EXTERNAL_LNA2_CTRL
_ad9361_swig.EXTERNAL_LNA1_CTRL_swigconstant(_ad9361_swig)
EXTERNAL_LNA1_CTRL = _ad9361_swig.EXTERNAL_LNA1_CTRL
_ad9361_swig.GPO_MANUAL_SELECT_swigconstant(_ad9361_swig)
GPO_MANUAL_SELECT = _ad9361_swig.GPO_MANUAL_SELECT
_ad9361_swig.EN_CTRL7_swigconstant(_ad9361_swig)
EN_CTRL7 = _ad9361_swig.EN_CTRL7
_ad9361_swig.EN_CTRL6_swigconstant(_ad9361_swig)
EN_CTRL6 = _ad9361_swig.EN_CTRL6
_ad9361_swig.EN_CTRL5_swigconstant(_ad9361_swig)
EN_CTRL5 = _ad9361_swig.EN_CTRL5
_ad9361_swig.EN_CTRL4_swigconstant(_ad9361_swig)
EN_CTRL4 = _ad9361_swig.EN_CTRL4
_ad9361_swig.EN_CTRL3_swigconstant(_ad9361_swig)
EN_CTRL3 = _ad9361_swig.EN_CTRL3
_ad9361_swig.EN_CTRL2_swigconstant(_ad9361_swig)
EN_CTRL2 = _ad9361_swig.EN_CTRL2
_ad9361_swig.EN_CTRL1_swigconstant(_ad9361_swig)
EN_CTRL1 = _ad9361_swig.EN_CTRL1
_ad9361_swig.EN_CTRL0_swigconstant(_ad9361_swig)
EN_CTRL0 = _ad9361_swig.EN_CTRL0
_ad9361_swig.PRODUCT_ID_MASK_swigconstant(_ad9361_swig)
PRODUCT_ID_MASK = _ad9361_swig.PRODUCT_ID_MASK
_ad9361_swig.PRODUCT_ID_9361_swigconstant(_ad9361_swig)
PRODUCT_ID_9361 = _ad9361_swig.PRODUCT_ID_9361
_ad9361_swig.REV_MASK_swigconstant(_ad9361_swig)
REV_MASK = _ad9361_swig.REV_MASK
_ad9361_swig.CLK_OUT_DRIVE_swigconstant(_ad9361_swig)
CLK_OUT_DRIVE = _ad9361_swig.CLK_OUT_DRIVE
_ad9361_swig.DATACLK_DRIVE_swigconstant(_ad9361_swig)
DATACLK_DRIVE = _ad9361_swig.DATACLK_DRIVE
_ad9361_swig.DATA_PORT_DRIVE_swigconstant(_ad9361_swig)
DATA_PORT_DRIVE = _ad9361_swig.DATA_PORT_DRIVE
_ad9361_swig.RX_ON_CHIP_TERM_swigconstant(_ad9361_swig)
RX_ON_CHIP_TERM = _ad9361_swig.RX_ON_CHIP_TERM
_ad9361_swig.LVDS_BYPASS_BIAS_R_swigconstant(_ad9361_swig)
LVDS_BYPASS_BIAS_R = _ad9361_swig.LVDS_BYPASS_BIAS_R
_ad9361_swig.LVDS_TX_LO_VCM_swigconstant(_ad9361_swig)
LVDS_TX_LO_VCM = _ad9361_swig.LVDS_TX_LO_VCM
_ad9361_swig.INIT_BB_FO_CAL_swigconstant(_ad9361_swig)
INIT_BB_FO_CAL = _ad9361_swig.INIT_BB_FO_CAL
_ad9361_swig.BBPLL_RESET_BAR_swigconstant(_ad9361_swig)
BBPLL_RESET_BAR = _ad9361_swig.BBPLL_RESET_BAR
_ad9361_swig.MCS_REFCLK_SCALE_EN_swigconstant(_ad9361_swig)
MCS_REFCLK_SCALE_EN = _ad9361_swig.MCS_REFCLK_SCALE_EN
_ad9361_swig.R2_WORD_swigconstant(_ad9361_swig)
R2_WORD = _ad9361_swig.R2_WORD
_ad9361_swig.BYPASS_C3_swigconstant(_ad9361_swig)
BYPASS_C3 = _ad9361_swig.BYPASS_C3
_ad9361_swig.BYPASS_R2_swigconstant(_ad9361_swig)
BYPASS_R2 = _ad9361_swig.BYPASS_R2
_ad9361_swig.FREQ_CAL_ENABLE_swigconstant(_ad9361_swig)
FREQ_CAL_ENABLE = _ad9361_swig.FREQ_CAL_ENABLE
_ad9361_swig.FREQ_CAL_RESET_swigconstant(_ad9361_swig)
FREQ_CAL_RESET = _ad9361_swig.FREQ_CAL_RESET
_ad9361_swig.CAL_CLOCK_DIV_4_swigconstant(_ad9361_swig)
CAL_CLOCK_DIV_4 = _ad9361_swig.CAL_CLOCK_DIV_4
_ad9361_swig.RX_LO_POWER_DOWN_swigconstant(_ad9361_swig)
RX_LO_POWER_DOWN = _ad9361_swig.RX_LO_POWER_DOWN
_ad9361_swig.RX_SYNTH_VCO_ALC_POWER_DOWN_swigconstant(_ad9361_swig)
RX_SYNTH_VCO_ALC_POWER_DOWN = _ad9361_swig.RX_SYNTH_VCO_ALC_POWER_DOWN
_ad9361_swig.RX_SYNTH_PTAT_POWER_DOWN_swigconstant(_ad9361_swig)
RX_SYNTH_PTAT_POWER_DOWN = _ad9361_swig.RX_SYNTH_PTAT_POWER_DOWN
_ad9361_swig.RX_SYNTH_VCO_POWER_DOWN_swigconstant(_ad9361_swig)
RX_SYNTH_VCO_POWER_DOWN = _ad9361_swig.RX_SYNTH_VCO_POWER_DOWN
_ad9361_swig.RX_SYNTH_VCO_LDO_POWER_DOWN_swigconstant(_ad9361_swig)
RX_SYNTH_VCO_LDO_POWER_DOWN = _ad9361_swig.RX_SYNTH_VCO_LDO_POWER_DOWN
_ad9361_swig.TX_LO_POWER_DOWN_swigconstant(_ad9361_swig)
TX_LO_POWER_DOWN = _ad9361_swig.TX_LO_POWER_DOWN
_ad9361_swig.TX_SYNTH_VCO_ALC_POWER_DOWN_swigconstant(_ad9361_swig)
TX_SYNTH_VCO_ALC_POWER_DOWN = _ad9361_swig.TX_SYNTH_VCO_ALC_POWER_DOWN
_ad9361_swig.TX_SYNTH_PTAT_POWER_DOWN_swigconstant(_ad9361_swig)
TX_SYNTH_PTAT_POWER_DOWN = _ad9361_swig.TX_SYNTH_PTAT_POWER_DOWN
_ad9361_swig.TX_SYNTH_VCO_POWER_DOWN_swigconstant(_ad9361_swig)
TX_SYNTH_VCO_POWER_DOWN = _ad9361_swig.TX_SYNTH_VCO_POWER_DOWN
_ad9361_swig.TX_SYNTH_VCO_LDO_POWER_DOWN_swigconstant(_ad9361_swig)
TX_SYNTH_VCO_LDO_POWER_DOWN = _ad9361_swig.TX_SYNTH_VCO_LDO_POWER_DOWN
_ad9361_swig.RX_EXT_VCO_BUFFER_POWER_DOWN_swigconstant(_ad9361_swig)
RX_EXT_VCO_BUFFER_POWER_DOWN = _ad9361_swig.RX_EXT_VCO_BUFFER_POWER_DOWN
_ad9361_swig.TX_EXT_VCO_BUFFER_POWER_DOWN_swigconstant(_ad9361_swig)
TX_EXT_VCO_BUFFER_POWER_DOWN = _ad9361_swig.TX_EXT_VCO_BUFFER_POWER_DOWN
_ad9361_swig.RX_LNA_POWER_DOWN_swigconstant(_ad9361_swig)
RX_LNA_POWER_DOWN = _ad9361_swig.RX_LNA_POWER_DOWN
_ad9361_swig.DCXO_POWER_DOWN_swigconstant(_ad9361_swig)
DCXO_POWER_DOWN = _ad9361_swig.DCXO_POWER_DOWN
_ad9361_swig.MASTER_BIAS_POWER_DOWN_swigconstant(_ad9361_swig)
MASTER_BIAS_POWER_DOWN = _ad9361_swig.MASTER_BIAS_POWER_DOWN
_ad9361_swig.BBPLL_LOCK_swigconstant(_ad9361_swig)
BBPLL_LOCK = _ad9361_swig.BBPLL_LOCK
_ad9361_swig.CH_1_INT3_swigconstant(_ad9361_swig)
CH_1_INT3 = _ad9361_swig.CH_1_INT3
_ad9361_swig.CH1_HB3_swigconstant(_ad9361_swig)
CH1_HB3 = _ad9361_swig.CH1_HB3
_ad9361_swig.CH1_HB2_swigconstant(_ad9361_swig)
CH1_HB2 = _ad9361_swig.CH1_HB2
_ad9361_swig.CH1_QEC_swigconstant(_ad9361_swig)
CH1_QEC = _ad9361_swig.CH1_QEC
_ad9361_swig.CH1_HB1_swigconstant(_ad9361_swig)
CH1_HB1 = _ad9361_swig.CH1_HB1
_ad9361_swig.CH1_TFIR_swigconstant(_ad9361_swig)
CH1_TFIR = _ad9361_swig.CH1_TFIR
_ad9361_swig.CH1_RFIR_swigconstant(_ad9361_swig)
CH1_RFIR = _ad9361_swig.CH1_RFIR
_ad9361_swig.CH2_INT3_swigconstant(_ad9361_swig)
CH2_INT3 = _ad9361_swig.CH2_INT3
_ad9361_swig.CH2_HB3_swigconstant(_ad9361_swig)
CH2_HB3 = _ad9361_swig.CH2_HB3
_ad9361_swig.CH2_HB2_swigconstant(_ad9361_swig)
CH2_HB2 = _ad9361_swig.CH2_HB2
_ad9361_swig.CH2_QEC_swigconstant(_ad9361_swig)
CH2_QEC = _ad9361_swig.CH2_QEC
_ad9361_swig.CH2_HB1_swigconstant(_ad9361_swig)
CH2_HB1 = _ad9361_swig.CH2_HB1
_ad9361_swig.CH2_TFIR_swigconstant(_ad9361_swig)
CH2_TFIR = _ad9361_swig.CH2_TFIR
_ad9361_swig.CH2_RFIR_swigconstant(_ad9361_swig)
CH2_RFIR = _ad9361_swig.CH2_RFIR
_ad9361_swig.TX_FIR_GAIN_6DB_swigconstant(_ad9361_swig)
TX_FIR_GAIN_6DB = _ad9361_swig.TX_FIR_GAIN_6DB
_ad9361_swig.FIR_START_CLK_swigconstant(_ad9361_swig)
FIR_START_CLK = _ad9361_swig.FIR_START_CLK
_ad9361_swig.FIR_WRITE_swigconstant(_ad9361_swig)
FIR_WRITE = _ad9361_swig.FIR_WRITE
_ad9361_swig.TX_MON_TRACK_swigconstant(_ad9361_swig)
TX_MON_TRACK = _ad9361_swig.TX_MON_TRACK
_ad9361_swig.TX_RSSI_2_swigconstant(_ad9361_swig)
TX_RSSI_2 = _ad9361_swig.TX_RSSI_2
_ad9361_swig.TX_RSSI_1_swigconstant(_ad9361_swig)
TX_RSSI_1 = _ad9361_swig.TX_RSSI_1
_ad9361_swig.TX2_MON_ENABLE_swigconstant(_ad9361_swig)
TX2_MON_ENABLE = _ad9361_swig.TX2_MON_ENABLE
_ad9361_swig.TX1_MON_ENABLE_swigconstant(_ad9361_swig)
TX1_MON_ENABLE = _ad9361_swig.TX1_MON_ENABLE
_ad9361_swig.ONE_SHOT_MODE_swigconstant(_ad9361_swig)
ONE_SHOT_MODE = _ad9361_swig.ONE_SHOT_MODE
_ad9361_swig.TX_1_ATTEN_swigconstant(_ad9361_swig)
TX_1_ATTEN = _ad9361_swig.TX_1_ATTEN
_ad9361_swig.TX_2_ATTEN_swigconstant(_ad9361_swig)
TX_2_ATTEN = _ad9361_swig.TX_2_ATTEN
_ad9361_swig.MASK_CLR_ATTEN_UPDATE_swigconstant(_ad9361_swig)
MASK_CLR_ATTEN_UPDATE = _ad9361_swig.MASK_CLR_ATTEN_UPDATE
_ad9361_swig.SEL_TX1_TX2_swigconstant(_ad9361_swig)
SEL_TX1_TX2 = _ad9361_swig.SEL_TX1_TX2
_ad9361_swig.IMMEDIATELY_UPDATE_TPC_ATTEN_swigconstant(_ad9361_swig)
IMMEDIATELY_UPDATE_TPC_ATTEN = _ad9361_swig.IMMEDIATELY_UPDATE_TPC_ATTEN
_ad9361_swig.USE_TX1_PIN_SYMBOL_ATTEN_swigconstant(_ad9361_swig)
USE_TX1_PIN_SYMBOL_ATTEN = _ad9361_swig.USE_TX1_PIN_SYMBOL_ATTEN
_ad9361_swig.USE_CTRL_IN_FOR_SYMBOL_ATTEN_swigconstant(_ad9361_swig)
USE_CTRL_IN_FOR_SYMBOL_ATTEN = _ad9361_swig.USE_CTRL_IN_FOR_SYMBOL_ATTEN
_ad9361_swig.ENABLE_SYMBOL_ATTEN_swigconstant(_ad9361_swig)
ENABLE_SYMBOL_ATTEN = _ad9361_swig.ENABLE_SYMBOL_ATTEN
_ad9361_swig.FORCE_OUT_2_TX2_OFFSET_swigconstant(_ad9361_swig)
FORCE_OUT_2_TX2_OFFSET = _ad9361_swig.FORCE_OUT_2_TX2_OFFSET
_ad9361_swig.FORCE_OUT_2_TX1_OFFSET_swigconstant(_ad9361_swig)
FORCE_OUT_2_TX1_OFFSET = _ad9361_swig.FORCE_OUT_2_TX1_OFFSET
_ad9361_swig.FORCE_OUT_2_TX2_PHASE_GAIN_swigconstant(_ad9361_swig)
FORCE_OUT_2_TX2_PHASE_GAIN = _ad9361_swig.FORCE_OUT_2_TX2_PHASE_GAIN
_ad9361_swig.FORCE_OUT_2_TX1_PHASE_GAIN_swigconstant(_ad9361_swig)
FORCE_OUT_2_TX1_PHASE_GAIN = _ad9361_swig.FORCE_OUT_2_TX1_PHASE_GAIN
_ad9361_swig.FORCE_OUT_1_TX2_OFFSET_swigconstant(_ad9361_swig)
FORCE_OUT_1_TX2_OFFSET = _ad9361_swig.FORCE_OUT_1_TX2_OFFSET
_ad9361_swig.FORCE_OUT_1_TX1_OFFSET_swigconstant(_ad9361_swig)
FORCE_OUT_1_TX1_OFFSET = _ad9361_swig.FORCE_OUT_1_TX1_OFFSET
_ad9361_swig.FORCE_OUT_1_TX2_PHASE_GAIN_swigconstant(_ad9361_swig)
FORCE_OUT_1_TX2_PHASE_GAIN = _ad9361_swig.FORCE_OUT_1_TX2_PHASE_GAIN
_ad9361_swig.FORCE_OUT_1_TX1_PHASE_GAIN_swigconstant(_ad9361_swig)
FORCE_OUT_1_TX1_PHASE_GAIN = _ad9361_swig.FORCE_OUT_1_TX1_PHASE_GAIN
_ad9361_swig.FREE_RUN_ENABLE_swigconstant(_ad9361_swig)
FREE_RUN_ENABLE = _ad9361_swig.FREE_RUN_ENABLE
_ad9361_swig.SETTLE_MAIN_ENABLE_swigconstant(_ad9361_swig)
SETTLE_MAIN_ENABLE = _ad9361_swig.SETTLE_MAIN_ENABLE
_ad9361_swig.DC_OFFSET_ENABLE_swigconstant(_ad9361_swig)
DC_OFFSET_ENABLE = _ad9361_swig.DC_OFFSET_ENABLE
_ad9361_swig.GAIN_ENABLE_swigconstant(_ad9361_swig)
GAIN_ENABLE = _ad9361_swig.GAIN_ENABLE
_ad9361_swig.PHASE_ENABLE_swigconstant(_ad9361_swig)
PHASE_ENABLE = _ad9361_swig.PHASE_ENABLE
_ad9361_swig.QUAD_CAL_SOFT_RESET_swigconstant(_ad9361_swig)
QUAD_CAL_SOFT_RESET = _ad9361_swig.QUAD_CAL_SOFT_RESET
_ad9361_swig.INVERT_I_DATA_swigconstant(_ad9361_swig)
INVERT_I_DATA = _ad9361_swig.INVERT_I_DATA
_ad9361_swig.INVERT_Q_DATA_swigconstant(_ad9361_swig)
INVERT_Q_DATA = _ad9361_swig.INVERT_Q_DATA
_ad9361_swig.TX1_LO_CONV_swigconstant(_ad9361_swig)
TX1_LO_CONV = _ad9361_swig.TX1_LO_CONV
_ad9361_swig.TX1_SSB_CONV_swigconstant(_ad9361_swig)
TX1_SSB_CONV = _ad9361_swig.TX1_SSB_CONV
_ad9361_swig.TX2_LO_CONV_swigconstant(_ad9361_swig)
TX2_LO_CONV = _ad9361_swig.TX2_LO_CONV
_ad9361_swig.TX2_SSB_CONV_swigconstant(_ad9361_swig)
TX2_SSB_CONV = _ad9361_swig.TX2_SSB_CONV
_ad9361_swig.GM_STAGE_TIME_CON_OVERRIDE_swigconstant(_ad9361_swig)
GM_STAGE_TIME_CON_OVERRIDE = _ad9361_swig.GM_STAGE_TIME_CON_OVERRIDE
_ad9361_swig.GM_STAGE_MV_HP_POLE_swigconstant(_ad9361_swig)
GM_STAGE_MV_HP_POLE = _ad9361_swig.GM_STAGE_MV_HP_POLE
_ad9361_swig.GM_STAGE_LOWER_CM_swigconstant(_ad9361_swig)
GM_STAGE_LOWER_CM = _ad9361_swig.GM_STAGE_LOWER_CM
_ad9361_swig.BYPASS_BIAS_R_swigconstant(_ad9361_swig)
BYPASS_BIAS_R = _ad9361_swig.BYPASS_BIAS_R
_ad9361_swig.OVERRIDE_ENABLE_swigconstant(_ad9361_swig)
OVERRIDE_ENABLE = _ad9361_swig.OVERRIDE_ENABLE
_ad9361_swig.PD_TUNE_swigconstant(_ad9361_swig)
PD_TUNE = _ad9361_swig.PD_TUNE
_ad9361_swig.TUNER_RESAMPLE_swigconstant(_ad9361_swig)
TUNER_RESAMPLE = _ad9361_swig.TUNER_RESAMPLE
_ad9361_swig.TUNER_RESAMPLE_PHASE_swigconstant(_ad9361_swig)
TUNER_RESAMPLE_PHASE = _ad9361_swig.TUNER_RESAMPLE_PHASE
_ad9361_swig.TX_BBF_BYPASS_BIAS_R_swigconstant(_ad9361_swig)
TX_BBF_BYPASS_BIAS_R = _ad9361_swig.TX_BBF_BYPASS_BIAS_R
_ad9361_swig.R2B_OVR_swigconstant(_ad9361_swig)
R2B_OVR = _ad9361_swig.R2B_OVR
_ad9361_swig.BBF1_COMP_I_swigconstant(_ad9361_swig)
BBF1_COMP_I = _ad9361_swig.BBF1_COMP_I
_ad9361_swig.BBF1_COMP_Q_swigconstant(_ad9361_swig)
BBF1_COMP_Q = _ad9361_swig.BBF1_COMP_Q
_ad9361_swig.BBF2_COMP_I_swigconstant(_ad9361_swig)
BBF2_COMP_I = _ad9361_swig.BBF2_COMP_I
_ad9361_swig.BBF2_COMP_Q_swigconstant(_ad9361_swig)
BBF2_COMP_Q = _ad9361_swig.BBF2_COMP_Q
_ad9361_swig.EVALTIME_swigconstant(_ad9361_swig)
EVALTIME = _ad9361_swig.EVALTIME
_ad9361_swig.TX_BBF_TUNE_DIVIDER_swigconstant(_ad9361_swig)
TX_BBF_TUNE_DIVIDER = _ad9361_swig.TX_BBF_TUNE_DIVIDER
_ad9361_swig.WRITE_RX_swigconstant(_ad9361_swig)
WRITE_RX = _ad9361_swig.WRITE_RX
_ad9361_swig.START_RX_CLOCK_swigconstant(_ad9361_swig)
START_RX_CLOCK = _ad9361_swig.START_RX_CLOCK
_ad9361_swig.DEC_PWR_FOR_LOW_PWR_swigconstant(_ad9361_swig)
DEC_PWR_FOR_LOW_PWR = _ad9361_swig.DEC_PWR_FOR_LOW_PWR
_ad9361_swig.DEC_PWR_FOR_LOCK_LEVEL_swigconstant(_ad9361_swig)
DEC_PWR_FOR_LOCK_LEVEL = _ad9361_swig.DEC_PWR_FOR_LOCK_LEVEL
_ad9361_swig.DEC_PWR_FOR_GAIN_LOCK_EXIT_swigconstant(_ad9361_swig)
DEC_PWR_FOR_GAIN_LOCK_EXIT = _ad9361_swig.DEC_PWR_FOR_GAIN_LOCK_EXIT
_ad9361_swig.SLOW_ATTACK_HYBRID_MODE_swigconstant(_ad9361_swig)
SLOW_ATTACK_HYBRID_MODE = _ad9361_swig.SLOW_ATTACK_HYBRID_MODE
_ad9361_swig.RX_GAIN_CTL_MASK_swigconstant(_ad9361_swig)
RX_GAIN_CTL_MASK = _ad9361_swig.RX_GAIN_CTL_MASK
_ad9361_swig.RX2_GAIN_CTRL_SHIFT_swigconstant(_ad9361_swig)
RX2_GAIN_CTRL_SHIFT = _ad9361_swig.RX2_GAIN_CTRL_SHIFT
_ad9361_swig.RX1_GAIN_CTRL_SHIFT_swigconstant(_ad9361_swig)
RX1_GAIN_CTRL_SHIFT = _ad9361_swig.RX1_GAIN_CTRL_SHIFT
_ad9361_swig.RX_GAIN_CTL_MGC_swigconstant(_ad9361_swig)
RX_GAIN_CTL_MGC = _ad9361_swig.RX_GAIN_CTL_MGC
_ad9361_swig.RX_GAIN_CTL_AGC_FAST_ATK_swigconstant(_ad9361_swig)
RX_GAIN_CTL_AGC_FAST_ATK = _ad9361_swig.RX_GAIN_CTL_AGC_FAST_ATK
_ad9361_swig.RX_GAIN_CTL_AGC_SLOW_ATK_swigconstant(_ad9361_swig)
RX_GAIN_CTL_AGC_SLOW_ATK = _ad9361_swig.RX_GAIN_CTL_AGC_SLOW_ATK
_ad9361_swig.RX_GAIN_CTL_AGC_SLOW_ATK_HYBD_swigconstant(_ad9361_swig)
RX_GAIN_CTL_AGC_SLOW_ATK_HYBD = _ad9361_swig.RX_GAIN_CTL_AGC_SLOW_ATK_HYBD
_ad9361_swig.AGC_SOFT_RESET_swigconstant(_ad9361_swig)
AGC_SOFT_RESET = _ad9361_swig.AGC_SOFT_RESET
_ad9361_swig.AGC_GAIN_UNLOCK_CTRL_swigconstant(_ad9361_swig)
AGC_GAIN_UNLOCK_CTRL = _ad9361_swig.AGC_GAIN_UNLOCK_CTRL
_ad9361_swig.AGC_USE_FULL_GAIN_TABLE_swigconstant(_ad9361_swig)
AGC_USE_FULL_GAIN_TABLE = _ad9361_swig.AGC_USE_FULL_GAIN_TABLE
_ad9361_swig.DIG_GAIN_EN_swigconstant(_ad9361_swig)
DIG_GAIN_EN = _ad9361_swig.DIG_GAIN_EN
_ad9361_swig.MAN_GAIN_CTRL_RX2_swigconstant(_ad9361_swig)
MAN_GAIN_CTRL_RX2 = _ad9361_swig.MAN_GAIN_CTRL_RX2
_ad9361_swig.MAN_GAIN_CTRL_RX1_swigconstant(_ad9361_swig)
MAN_GAIN_CTRL_RX1 = _ad9361_swig.MAN_GAIN_CTRL_RX1
_ad9361_swig.INCDEC_LMT_GAIN_swigconstant(_ad9361_swig)
INCDEC_LMT_GAIN = _ad9361_swig.INCDEC_LMT_GAIN
_ad9361_swig.USE_AGC_FOR_LMTLPF_GAIN_swigconstant(_ad9361_swig)
USE_AGC_FOR_LMTLPF_GAIN = _ad9361_swig.USE_AGC_FOR_LMTLPF_GAIN
_ad9361_swig.ENABLE_DIG_SAT_OVRG_swigconstant(_ad9361_swig)
ENABLE_DIG_SAT_OVRG = _ad9361_swig.ENABLE_DIG_SAT_OVRG
_ad9361_swig.FORCE_PD_RESET_RX2_swigconstant(_ad9361_swig)
FORCE_PD_RESET_RX2 = _ad9361_swig.FORCE_PD_RESET_RX2
_ad9361_swig.FORCE_PD_RESET_RX1_swigconstant(_ad9361_swig)
FORCE_PD_RESET_RX1 = _ad9361_swig.FORCE_PD_RESET_RX1
_ad9361_swig.POWER_MEAS_IN_STATE_5_MSB_swigconstant(_ad9361_swig)
POWER_MEAS_IN_STATE_5_MSB = _ad9361_swig.POWER_MEAS_IN_STATE_5_MSB
_ad9361_swig.RX_FULL_TBL_IDX_MASK_swigconstant(_ad9361_swig)
RX_FULL_TBL_IDX_MASK = _ad9361_swig.RX_FULL_TBL_IDX_MASK
_ad9361_swig.RX_LPF_IDX_MASK_swigconstant(_ad9361_swig)
RX_LPF_IDX_MASK = _ad9361_swig.RX_LPF_IDX_MASK
_ad9361_swig.FORCE_RX1_DIGITAL_GAIN_swigconstant(_ad9361_swig)
FORCE_RX1_DIGITAL_GAIN = _ad9361_swig.FORCE_RX1_DIGITAL_GAIN
_ad9361_swig.RX_DIGITAL_IDX_MASK_swigconstant(_ad9361_swig)
RX_DIGITAL_IDX_MASK = _ad9361_swig.RX_DIGITAL_IDX_MASK
_ad9361_swig.FORCE_RX2_DIGITAL_GAIN_swigconstant(_ad9361_swig)
FORCE_RX2_DIGITAL_GAIN = _ad9361_swig.FORCE_RX2_DIGITAL_GAIN
_ad9361_swig.ENABLE_GAIN_INC_AFTER_GAIN_LOCK_swigconstant(_ad9361_swig)
ENABLE_GAIN_INC_AFTER_GAIN_LOCK = _ad9361_swig.ENABLE_GAIN_INC_AFTER_GAIN_LOCK
_ad9361_swig.GOTO_OPT_GAIN_IF_ENERGY_LOST_OR_EN_AGC_HIGH_swigconstant(_ad9361_swig)
GOTO_OPT_GAIN_IF_ENERGY_LOST_OR_EN_AGC_HIGH = _ad9361_swig.GOTO_OPT_GAIN_IF_ENERGY_LOST_OR_EN_AGC_HIGH
_ad9361_swig.GOTO_SET_GAIN_IF_EN_AGC_HIGH_swigconstant(_ad9361_swig)
GOTO_SET_GAIN_IF_EN_AGC_HIGH = _ad9361_swig.GOTO_SET_GAIN_IF_EN_AGC_HIGH
_ad9361_swig.GOTO_SET_GAIN_IF_EXIT_RX_STATE_swigconstant(_ad9361_swig)
GOTO_SET_GAIN_IF_EXIT_RX_STATE = _ad9361_swig.GOTO_SET_GAIN_IF_EXIT_RX_STATE
_ad9361_swig.DONT_UNLOCK_GAIN_IF_ENERGY_LOST_swigconstant(_ad9361_swig)
DONT_UNLOCK_GAIN_IF_ENERGY_LOST = _ad9361_swig.DONT_UNLOCK_GAIN_IF_ENERGY_LOST
_ad9361_swig.GOTO_OPTIMIZED_GAIN_IF_EXIT_RX_STATE_swigconstant(_ad9361_swig)
GOTO_OPTIMIZED_GAIN_IF_EXIT_RX_STATE = _ad9361_swig.GOTO_OPTIMIZED_GAIN_IF_EXIT_RX_STATE
_ad9361_swig.DONT_UNLOCK_GAIN_IF_LG_ADC_OR_LMT_OVRG_swigconstant(_ad9361_swig)
DONT_UNLOCK_GAIN_IF_LG_ADC_OR_LMT_OVRG = _ad9361_swig.DONT_UNLOCK_GAIN_IF_LG_ADC_OR_LMT_OVRG
_ad9361_swig.ENABLE_INCR_GAIN_swigconstant(_ad9361_swig)
ENABLE_INCR_GAIN = _ad9361_swig.ENABLE_INCR_GAIN
_ad9361_swig.USE_LAST_LOCK_LEVEL_FOR_SET_GAIN_swigconstant(_ad9361_swig)
USE_LAST_LOCK_LEVEL_FOR_SET_GAIN = _ad9361_swig.USE_LAST_LOCK_LEVEL_FOR_SET_GAIN
_ad9361_swig.ENABLE_LMT_GAIN_INC_FOR_LOCK_LEVEL_swigconstant(_ad9361_swig)
ENABLE_LMT_GAIN_INC_FOR_LOCK_LEVEL = _ad9361_swig.ENABLE_LMT_GAIN_INC_FOR_LOCK_LEVEL
_ad9361_swig.GOTO_MAX_GAIN_OR_OPT_GAIN_IF_EN_AGC_HIGH_swigconstant(_ad9361_swig)
GOTO_MAX_GAIN_OR_OPT_GAIN_IF_EN_AGC_HIGH = _ad9361_swig.GOTO_MAX_GAIN_OR_OPT_GAIN_IF_EN_AGC_HIGH
_ad9361_swig.DONT_UNLOCK_GAIN_IF_ADC_OVRG_swigconstant(_ad9361_swig)
DONT_UNLOCK_GAIN_IF_ADC_OVRG = _ad9361_swig.DONT_UNLOCK_GAIN_IF_ADC_OVRG
_ad9361_swig.DONT_UNLOCK_GAIN_IF_STRONGER_SIGNAL_swigconstant(_ad9361_swig)
DONT_UNLOCK_GAIN_IF_STRONGER_SIGNAL = _ad9361_swig.DONT_UNLOCK_GAIN_IF_STRONGER_SIGNAL
_ad9361_swig.PREVENT_GAIN_INC_swigconstant(_ad9361_swig)
PREVENT_GAIN_INC = _ad9361_swig.PREVENT_GAIN_INC
_ad9361_swig.IMMED_GAIN_CHANGE_IF_LG_LMT_OVERLOAD_swigconstant(_ad9361_swig)
IMMED_GAIN_CHANGE_IF_LG_LMT_OVERLOAD = _ad9361_swig.IMMED_GAIN_CHANGE_IF_LG_LMT_OVERLOAD
_ad9361_swig.IMMED_GAIN_CHANGE_IF_LG_ADC_OVERLOAD_swigconstant(_ad9361_swig)
IMMED_GAIN_CHANGE_IF_LG_ADC_OVERLOAD = _ad9361_swig.IMMED_GAIN_CHANGE_IF_LG_ADC_OVERLOAD
_ad9361_swig.DOUBLE_GAIN_COUNTER_swigconstant(_ad9361_swig)
DOUBLE_GAIN_COUNTER = _ad9361_swig.DOUBLE_GAIN_COUNTER
_ad9361_swig.ENABLE_SYNC_FOR_GAIN_COUNTER_swigconstant(_ad9361_swig)
ENABLE_SYNC_FOR_GAIN_COUNTER = _ad9361_swig.ENABLE_SYNC_FOR_GAIN_COUNTER
_ad9361_swig.EXT_LNA_CTRL_swigconstant(_ad9361_swig)
EXT_LNA_CTRL = _ad9361_swig.EXT_LNA_CTRL
_ad9361_swig.TIA_GAIN_swigconstant(_ad9361_swig)
TIA_GAIN = _ad9361_swig.TIA_GAIN
_ad9361_swig.RF_DC_CAL_swigconstant(_ad9361_swig)
RF_DC_CAL = _ad9361_swig.RF_DC_CAL
_ad9361_swig.WRITE_GAIN_TABLE_swigconstant(_ad9361_swig)
WRITE_GAIN_TABLE = _ad9361_swig.WRITE_GAIN_TABLE
_ad9361_swig.START_GAIN_TABLE_CLOCK_swigconstant(_ad9361_swig)
START_GAIN_TABLE_CLOCK = _ad9361_swig.START_GAIN_TABLE_CLOCK
_ad9361_swig.GT_RX1_swigconstant(_ad9361_swig)
GT_RX1 = _ad9361_swig.GT_RX1
_ad9361_swig.GT_RX2_swigconstant(_ad9361_swig)
GT_RX2 = _ad9361_swig.GT_RX2
_ad9361_swig.WRITE_GM_SUB_TABLE_swigconstant(_ad9361_swig)
WRITE_GM_SUB_TABLE = _ad9361_swig.WRITE_GM_SUB_TABLE
_ad9361_swig.START_GM_SUB_TABLE_CLOCK_swigconstant(_ad9361_swig)
START_GM_SUB_TABLE_CLOCK = _ad9361_swig.START_GM_SUB_TABLE_CLOCK
_ad9361_swig.READ_SELECT_swigconstant(_ad9361_swig)
READ_SELECT = _ad9361_swig.READ_SELECT
_ad9361_swig.WRITE_MIXER_ERROR_TABLE_swigconstant(_ad9361_swig)
WRITE_MIXER_ERROR_TABLE = _ad9361_swig.WRITE_MIXER_ERROR_TABLE
_ad9361_swig.WRITE_LNA_ERROR_TABLE_swigconstant(_ad9361_swig)
WRITE_LNA_ERROR_TABLE = _ad9361_swig.WRITE_LNA_ERROR_TABLE
_ad9361_swig.WRITE_LNA_GAIN_DIFF_swigconstant(_ad9361_swig)
WRITE_LNA_GAIN_DIFF = _ad9361_swig.WRITE_LNA_GAIN_DIFF
_ad9361_swig.START_CALIB_TABLE_CLOCK_swigconstant(_ad9361_swig)
START_CALIB_TABLE_CLOCK = _ad9361_swig.START_CALIB_TABLE_CLOCK
_ad9361_swig.ENABLE_DIG_GAIN_CORR_swigconstant(_ad9361_swig)
ENABLE_DIG_GAIN_CORR = _ad9361_swig.ENABLE_DIG_GAIN_CORR
_ad9361_swig.FORCE_TEMP_SENSOR_FOR_CAL_swigconstant(_ad9361_swig)
FORCE_TEMP_SENSOR_FOR_CAL = _ad9361_swig.FORCE_TEMP_SENSOR_FOR_CAL
_ad9361_swig.START_RSSI_MEAS_swigconstant(_ad9361_swig)
START_RSSI_MEAS = _ad9361_swig.START_RSSI_MEAS
_ad9361_swig.ENABLE_ADC_POWER_MEAS_swigconstant(_ad9361_swig)
ENABLE_ADC_POWER_MEAS = _ad9361_swig.ENABLE_ADC_POWER_MEAS
_ad9361_swig.DEFAULT_RSSI_MEAS_MODE_swigconstant(_ad9361_swig)
DEFAULT_RSSI_MEAS_MODE = _ad9361_swig.DEFAULT_RSSI_MEAS_MODE
_ad9361_swig.USE_HB3_OUT_FOR_ADC_PWR_MEAS_swigconstant(_ad9361_swig)
USE_HB3_OUT_FOR_ADC_PWR_MEAS = _ad9361_swig.USE_HB3_OUT_FOR_ADC_PWR_MEAS
_ad9361_swig.USE_HB1_OUT_FOR_DEC_PWR_MEAS_swigconstant(_ad9361_swig)
USE_HB1_OUT_FOR_DEC_PWR_MEAS = _ad9361_swig.USE_HB1_OUT_FOR_DEC_PWR_MEAS
_ad9361_swig.ENABLE_DEC_PWR_MEAS_swigconstant(_ad9361_swig)
ENABLE_DEC_PWR_MEAS = _ad9361_swig.ENABLE_DEC_PWR_MEAS
_ad9361_swig.DEFAULT_MODE_ADC_POWER_swigconstant(_ad9361_swig)
DEFAULT_MODE_ADC_POWER = _ad9361_swig.DEFAULT_MODE_ADC_POWER
_ad9361_swig.DB_GAIN_READBACK_CHANNEL_swigconstant(_ad9361_swig)
DB_GAIN_READBACK_CHANNEL = _ad9361_swig.DB_GAIN_READBACK_CHANNEL
_ad9361_swig.ENABLE_PHASE_CORR_swigconstant(_ad9361_swig)
ENABLE_PHASE_CORR = _ad9361_swig.ENABLE_PHASE_CORR
_ad9361_swig.ENABLE_GAIN_CORR_swigconstant(_ad9361_swig)
ENABLE_GAIN_CORR = _ad9361_swig.ENABLE_GAIN_CORR
_ad9361_swig.USE_SETTLE_COUNT_FOR_DC_CAL_WAIT_swigconstant(_ad9361_swig)
USE_SETTLE_COUNT_FOR_DC_CAL_WAIT = _ad9361_swig.USE_SETTLE_COUNT_FOR_DC_CAL_WAIT
_ad9361_swig.FIXED_DC_CAL_WAIT_TIME_swigconstant(_ad9361_swig)
FIXED_DC_CAL_WAIT_TIME = _ad9361_swig.FIXED_DC_CAL_WAIT_TIME
_ad9361_swig.FREE_RUN_MODE_swigconstant(_ad9361_swig)
FREE_RUN_MODE = _ad9361_swig.FREE_RUN_MODE
_ad9361_swig.ENABLE_CORR_WORD_DECIMATION_swigconstant(_ad9361_swig)
ENABLE_CORR_WORD_DECIMATION = _ad9361_swig.ENABLE_CORR_WORD_DECIMATION
_ad9361_swig.ENABLE_TRACKING_MODE_CH2_swigconstant(_ad9361_swig)
ENABLE_TRACKING_MODE_CH2 = _ad9361_swig.ENABLE_TRACKING_MODE_CH2
_ad9361_swig.ENABLE_TRACKING_MODE_CH1_swigconstant(_ad9361_swig)
ENABLE_TRACKING_MODE_CH1 = _ad9361_swig.ENABLE_TRACKING_MODE_CH1
_ad9361_swig.CALIBRATION_CONFIG2_DFLT_swigconstant(_ad9361_swig)
CALIBRATION_CONFIG2_DFLT = _ad9361_swig.CALIBRATION_CONFIG2_DFLT
_ad9361_swig.PREVENT_POS_LOOP_GAIN_swigconstant(_ad9361_swig)
PREVENT_POS_LOOP_GAIN = _ad9361_swig.PREVENT_POS_LOOP_GAIN
_ad9361_swig.RX2_INPUT_BC_FORCE_OFFSET_swigconstant(_ad9361_swig)
RX2_INPUT_BC_FORCE_OFFSET = _ad9361_swig.RX2_INPUT_BC_FORCE_OFFSET
_ad9361_swig.RX1_INPUT_BC_FORCE_OFFSET_swigconstant(_ad9361_swig)
RX1_INPUT_BC_FORCE_OFFSET = _ad9361_swig.RX1_INPUT_BC_FORCE_OFFSET
_ad9361_swig.RX2_INPUT_BC_FORCE_PHGAIN_swigconstant(_ad9361_swig)
RX2_INPUT_BC_FORCE_PHGAIN = _ad9361_swig.RX2_INPUT_BC_FORCE_PHGAIN
_ad9361_swig.RX1_INPUT_BC_FORCE_PHGAIN_swigconstant(_ad9361_swig)
RX1_INPUT_BC_FORCE_PHGAIN = _ad9361_swig.RX1_INPUT_BC_FORCE_PHGAIN
_ad9361_swig.RX2_INPUT_A_FORCE_OFFSET_swigconstant(_ad9361_swig)
RX2_INPUT_A_FORCE_OFFSET = _ad9361_swig.RX2_INPUT_A_FORCE_OFFSET
_ad9361_swig.RX1_INPUT_A_FORCE_OFFSET_swigconstant(_ad9361_swig)
RX1_INPUT_A_FORCE_OFFSET = _ad9361_swig.RX1_INPUT_A_FORCE_OFFSET
_ad9361_swig.RX2_INPUT_A_FORCE_PHGAIN_swigconstant(_ad9361_swig)
RX2_INPUT_A_FORCE_PHGAIN = _ad9361_swig.RX2_INPUT_A_FORCE_PHGAIN
_ad9361_swig.RX1_INPUT_A_FORCE_PHGAIN_swigconstant(_ad9361_swig)
RX1_INPUT_A_FORCE_PHGAIN = _ad9361_swig.RX1_INPUT_A_FORCE_PHGAIN
_ad9361_swig.INVERT_RX2_RF_DC_CGIN_WORD_swigconstant(_ad9361_swig)
INVERT_RX2_RF_DC_CGIN_WORD = _ad9361_swig.INVERT_RX2_RF_DC_CGIN_WORD
_ad9361_swig.INVERT_RX1_RF_DC_CGIN_WORD_swigconstant(_ad9361_swig)
INVERT_RX1_RF_DC_CGIN_WORD = _ad9361_swig.INVERT_RX1_RF_DC_CGIN_WORD
_ad9361_swig.INVERT_RX2_RF_DC_CGOUT_WORD_swigconstant(_ad9361_swig)
INVERT_RX2_RF_DC_CGOUT_WORD = _ad9361_swig.INVERT_RX2_RF_DC_CGOUT_WORD
_ad9361_swig.INVERT_RX1_RF_DC_CGOUT_WORD_swigconstant(_ad9361_swig)
INVERT_RX1_RF_DC_CGOUT_WORD = _ad9361_swig.INVERT_RX1_RF_DC_CGOUT_WORD
_ad9361_swig.USE_WAIT_COUNTER_FOR_RF_DC_INIT_CAL_swigconstant(_ad9361_swig)
USE_WAIT_COUNTER_FOR_RF_DC_INIT_CAL = _ad9361_swig.USE_WAIT_COUNTER_FOR_RF_DC_INIT_CAL
_ad9361_swig.ENABLE_FAST_SETTLE_MODE_swigconstant(_ad9361_swig)
ENABLE_FAST_SETTLE_MODE = _ad9361_swig.ENABLE_FAST_SETTLE_MODE
_ad9361_swig.ENABLE_BB_DC_OFFSET_TRACKING_swigconstant(_ad9361_swig)
ENABLE_BB_DC_OFFSET_TRACKING = _ad9361_swig.ENABLE_BB_DC_OFFSET_TRACKING
_ad9361_swig.RESET_ACC_ON_GAIN_CHANGE_swigconstant(_ad9361_swig)
RESET_ACC_ON_GAIN_CHANGE = _ad9361_swig.RESET_ACC_ON_GAIN_CHANGE
_ad9361_swig.ENABLE_RF_OFFSET_TRACKING_swigconstant(_ad9361_swig)
ENABLE_RF_OFFSET_TRACKING = _ad9361_swig.ENABLE_RF_OFFSET_TRACKING
_ad9361_swig.INCREASE_COUNT_DURATION_swigconstant(_ad9361_swig)
INCREASE_COUNT_DURATION = _ad9361_swig.INCREASE_COUNT_DURATION
_ad9361_swig.READ_BACK_CH_SEL_swigconstant(_ad9361_swig)
READ_BACK_CH_SEL = _ad9361_swig.READ_BACK_CH_SEL
_ad9361_swig.UPDATE_TRACKING_WORD_swigconstant(_ad9361_swig)
UPDATE_TRACKING_WORD = _ad9361_swig.UPDATE_TRACKING_WORD
_ad9361_swig.FORCE_RX_NULL_swigconstant(_ad9361_swig)
FORCE_RX_NULL = _ad9361_swig.FORCE_RX_NULL
_ad9361_swig.RX2_RSSI_SYMBOL_swigconstant(_ad9361_swig)
RX2_RSSI_SYMBOL = _ad9361_swig.RX2_RSSI_SYMBOL
_ad9361_swig.RX1_RSSI_SYMBOL_swigconstant(_ad9361_swig)
RX1_RSSI_SYMBOL = _ad9361_swig.RX1_RSSI_SYMBOL
_ad9361_swig.RX2_RSSI_PREAMBLE_swigconstant(_ad9361_swig)
RX2_RSSI_PREAMBLE = _ad9361_swig.RX2_RSSI_PREAMBLE
_ad9361_swig.RX1_RSSI_PREAMBLE_swigconstant(_ad9361_swig)
RX1_RSSI_PREAMBLE = _ad9361_swig.RX1_RSSI_PREAMBLE
_ad9361_swig.RSSI_LSB_SHIFT_swigconstant(_ad9361_swig)
RSSI_LSB_SHIFT = _ad9361_swig.RSSI_LSB_SHIFT
_ad9361_swig.RSSI_LSB_MASK1_swigconstant(_ad9361_swig)
RSSI_LSB_MASK1 = _ad9361_swig.RSSI_LSB_MASK1
_ad9361_swig.RSSI_LSB_MASK2_swigconstant(_ad9361_swig)
RSSI_LSB_MASK2 = _ad9361_swig.RSSI_LSB_MASK2
_ad9361_swig.RX_PATH_GAIN_swigconstant(_ad9361_swig)
RX_PATH_GAIN = _ad9361_swig.RX_PATH_GAIN
_ad9361_swig.FORCE_RX2_LNA_GAIN_swigconstant(_ad9361_swig)
FORCE_RX2_LNA_GAIN = _ad9361_swig.FORCE_RX2_LNA_GAIN
_ad9361_swig.RX2_LNA_BYPASS_swigconstant(_ad9361_swig)
RX2_LNA_BYPASS = _ad9361_swig.RX2_LNA_BYPASS
_ad9361_swig.FORCE_RX1_LNA_GAIN_swigconstant(_ad9361_swig)
FORCE_RX1_LNA_GAIN = _ad9361_swig.FORCE_RX1_LNA_GAIN
_ad9361_swig.RX1_LNA_BYPASS_swigconstant(_ad9361_swig)
RX1_LNA_BYPASS = _ad9361_swig.RX1_LNA_BYPASS
_ad9361_swig.FORCE_RX1_MIX_GM_swigconstant(_ad9361_swig)
FORCE_RX1_MIX_GM = _ad9361_swig.FORCE_RX1_MIX_GM
_ad9361_swig.FORCE_RX2_MIX_GM_swigconstant(_ad9361_swig)
FORCE_RX2_MIX_GM = _ad9361_swig.FORCE_RX2_MIX_GM
_ad9361_swig.FORCE_CGIN_DAC_swigconstant(_ad9361_swig)
FORCE_CGIN_DAC = _ad9361_swig.FORCE_CGIN_DAC
_ad9361_swig.TIA2_OVERRIDE_C_swigconstant(_ad9361_swig)
TIA2_OVERRIDE_C = _ad9361_swig.TIA2_OVERRIDE_C
_ad9361_swig.TIA2_OVERRIDE_R_swigconstant(_ad9361_swig)
TIA2_OVERRIDE_R = _ad9361_swig.TIA2_OVERRIDE_R
_ad9361_swig.TIA1_OVERRIDE_C_swigconstant(_ad9361_swig)
TIA1_OVERRIDE_C = _ad9361_swig.TIA1_OVERRIDE_C
_ad9361_swig.TIA1_OVERRIDE_R_swigconstant(_ad9361_swig)
TIA1_OVERRIDE_R = _ad9361_swig.TIA1_OVERRIDE_R
_ad9361_swig.FORCE_RX1_RESISTORS_swigconstant(_ad9361_swig)
FORCE_RX1_RESISTORS = _ad9361_swig.FORCE_RX1_RESISTORS
_ad9361_swig.FORCE_RX2_RESISTORS_swigconstant(_ad9361_swig)
FORCE_RX2_RESISTORS = _ad9361_swig.FORCE_RX2_RESISTORS
_ad9361_swig.RX1_TUNE_RESAMPLE_PHASE_swigconstant(_ad9361_swig)
RX1_TUNE_RESAMPLE_PHASE = _ad9361_swig.RX1_TUNE_RESAMPLE_PHASE
_ad9361_swig.RX1_TUNE_RESAMPLE_swigconstant(_ad9361_swig)
RX1_TUNE_RESAMPLE = _ad9361_swig.RX1_TUNE_RESAMPLE
_ad9361_swig.RX1_PD_TUNE_swigconstant(_ad9361_swig)
RX1_PD_TUNE = _ad9361_swig.RX1_PD_TUNE
_ad9361_swig.RX2_TUNE_RESAMPLE_PHASE_swigconstant(_ad9361_swig)
RX2_TUNE_RESAMPLE_PHASE = _ad9361_swig.RX2_TUNE_RESAMPLE_PHASE
_ad9361_swig.RX2_TUNE_RESAMPLE_swigconstant(_ad9361_swig)
RX2_TUNE_RESAMPLE = _ad9361_swig.RX2_TUNE_RESAMPLE
_ad9361_swig.RX2_PD_TUNE_swigconstant(_ad9361_swig)
RX2_PD_TUNE = _ad9361_swig.RX2_PD_TUNE
_ad9361_swig.TUNE_OVERRIDE_swigconstant(_ad9361_swig)
TUNE_OVERRIDE = _ad9361_swig.TUNE_OVERRIDE
_ad9361_swig.MUST_BE_ZERO_swigconstant(_ad9361_swig)
MUST_BE_ZERO = _ad9361_swig.MUST_BE_ZERO
_ad9361_swig.RXBBF_BYPASS_BIAS_R_swigconstant(_ad9361_swig)
RXBBF_BYPASS_BIAS_R = _ad9361_swig.RXBBF_BYPASS_BIAS_R
_ad9361_swig.RX_BBF_R5_TUNE_swigconstant(_ad9361_swig)
RX_BBF_R5_TUNE = _ad9361_swig.RX_BBF_R5_TUNE
_ad9361_swig.RX1_BBF_TUNE_COMP_I_swigconstant(_ad9361_swig)
RX1_BBF_TUNE_COMP_I = _ad9361_swig.RX1_BBF_TUNE_COMP_I
_ad9361_swig.RX1_BBF_TUNE_COMP_Q_swigconstant(_ad9361_swig)
RX1_BBF_TUNE_COMP_Q = _ad9361_swig.RX1_BBF_TUNE_COMP_Q
_ad9361_swig.RX2_BBF_TUNE_COMP_I_swigconstant(_ad9361_swig)
RX2_BBF_TUNE_COMP_I = _ad9361_swig.RX2_BBF_TUNE_COMP_I
_ad9361_swig.RX2_BBF_TUNE_COMP_Q_swigconstant(_ad9361_swig)
RX2_BBF_TUNE_COMP_Q = _ad9361_swig.RX2_BBF_TUNE_COMP_Q
_ad9361_swig.RX1_BBF_FORCE_GAIN_swigconstant(_ad9361_swig)
RX1_BBF_FORCE_GAIN = _ad9361_swig.RX1_BBF_FORCE_GAIN
_ad9361_swig.RX2_BBF_FORCE_GAIN_swigconstant(_ad9361_swig)
RX2_BBF_FORCE_GAIN = _ad9361_swig.RX2_BBF_FORCE_GAIN
_ad9361_swig.RX_TUNE_EVALTIME_swigconstant(_ad9361_swig)
RX_TUNE_EVALTIME = _ad9361_swig.RX_TUNE_EVALTIME
_ad9361_swig.RX_BBF_TUNE_DIVIDE_swigconstant(_ad9361_swig)
RX_BBF_TUNE_DIVIDE = _ad9361_swig.RX_BBF_TUNE_DIVIDE
_ad9361_swig.BYPASS_LD_SYNTH_swigconstant(_ad9361_swig)
BYPASS_LD_SYNTH = _ad9361_swig.BYPASS_LD_SYNTH
_ad9361_swig.PORB_VCO_LOGIC_swigconstant(_ad9361_swig)
PORB_VCO_LOGIC = _ad9361_swig.PORB_VCO_LOGIC
_ad9361_swig.SYNTH_RECAL_swigconstant(_ad9361_swig)
SYNTH_RECAL = _ad9361_swig.SYNTH_RECAL
_ad9361_swig.HALF_VCO_CAL_CLK_swigconstant(_ad9361_swig)
HALF_VCO_CAL_CLK = _ad9361_swig.HALF_VCO_CAL_CLK
_ad9361_swig.F_CPCAL_swigconstant(_ad9361_swig)
F_CPCAL = _ad9361_swig.F_CPCAL
_ad9361_swig.CP_CAL_ENABLE_swigconstant(_ad9361_swig)
CP_CAL_ENABLE = _ad9361_swig.CP_CAL_ENABLE
_ad9361_swig.LOOP_FILTER_BYPASS_R3_swigconstant(_ad9361_swig)
LOOP_FILTER_BYPASS_R3 = _ad9361_swig.LOOP_FILTER_BYPASS_R3
_ad9361_swig.LOOP_FILTER_BYPASS_R1_swigconstant(_ad9361_swig)
LOOP_FILTER_BYPASS_R1 = _ad9361_swig.LOOP_FILTER_BYPASS_R1
_ad9361_swig.LOOP_FILTER_BYPASS_C2_swigconstant(_ad9361_swig)
LOOP_FILTER_BYPASS_C2 = _ad9361_swig.LOOP_FILTER_BYPASS_C2
_ad9361_swig.LOOP_FILTER_BYPASS_C1_swigconstant(_ad9361_swig)
LOOP_FILTER_BYPASS_C1 = _ad9361_swig.LOOP_FILTER_BYPASS_C1
_ad9361_swig.CP_CAL_VALID_swigconstant(_ad9361_swig)
CP_CAL_VALID = _ad9361_swig.CP_CAL_VALID
_ad9361_swig.CP_CAL_DONE_swigconstant(_ad9361_swig)
CP_CAL_DONE = _ad9361_swig.CP_CAL_DONE
_ad9361_swig.VCO_CAL_BUSY_swigconstant(_ad9361_swig)
VCO_CAL_BUSY = _ad9361_swig.VCO_CAL_BUSY
_ad9361_swig.POWER_DOWN_VARACTOR_REF_swigconstant(_ad9361_swig)
POWER_DOWN_VARACTOR_REF = _ad9361_swig.POWER_DOWN_VARACTOR_REF
_ad9361_swig.PWR_DOWN_VARACT_REF_TCF_swigconstant(_ad9361_swig)
PWR_DOWN_VARACT_REF_TCF = _ad9361_swig.PWR_DOWN_VARACT_REF_TCF
_ad9361_swig.POWER_DOWN_CAL_TCF_swigconstant(_ad9361_swig)
POWER_DOWN_CAL_TCF = _ad9361_swig.POWER_DOWN_CAL_TCF
_ad9361_swig.POWER_DOWN_VCO_BUFFFER_swigconstant(_ad9361_swig)
POWER_DOWN_VCO_BUFFFER = _ad9361_swig.POWER_DOWN_VCO_BUFFFER
_ad9361_swig.CP_OVRG_HIGH_swigconstant(_ad9361_swig)
CP_OVRG_HIGH = _ad9361_swig.CP_OVRG_HIGH
_ad9361_swig.CP_OVRG_LOW_swigconstant(_ad9361_swig)
CP_OVRG_LOW = _ad9361_swig.CP_OVRG_LOW
_ad9361_swig.VCO_LOCK_swigconstant(_ad9361_swig)
VCO_LOCK = _ad9361_swig.VCO_LOCK
_ad9361_swig.VCO_LDO_BYPASS_swigconstant(_ad9361_swig)
VCO_LDO_BYPASS = _ad9361_swig.VCO_LDO_BYPASS
_ad9361_swig.VCO_CAL_EN_swigconstant(_ad9361_swig)
VCO_CAL_EN = _ad9361_swig.VCO_CAL_EN
_ad9361_swig.CP_LEVEL_DETECT_POWER_DOWN_swigconstant(_ad9361_swig)
CP_LEVEL_DETECT_POWER_DOWN = _ad9361_swig.CP_LEVEL_DETECT_POWER_DOWN
_ad9361_swig.SIF_CLOCK_swigconstant(_ad9361_swig)
SIF_CLOCK = _ad9361_swig.SIF_CLOCK
_ad9361_swig.SIF_RESET_BAR_swigconstant(_ad9361_swig)
SIF_RESET_BAR = _ad9361_swig.SIF_RESET_BAR
_ad9361_swig.UPDATE_FREQ_WORD_swigconstant(_ad9361_swig)
UPDATE_FREQ_WORD = _ad9361_swig.UPDATE_FREQ_WORD
_ad9361_swig.READ_EFFECTIVE_TUNING_WORD_swigconstant(_ad9361_swig)
READ_EFFECTIVE_TUNING_WORD = _ad9361_swig.READ_EFFECTIVE_TUNING_WORD
_ad9361_swig.RX_FAST_LOCK_LOAD_SYNTH_swigconstant(_ad9361_swig)
RX_FAST_LOCK_LOAD_SYNTH = _ad9361_swig.RX_FAST_LOCK_LOAD_SYNTH
_ad9361_swig.RX_FAST_LOCK_PROFILE_INIT_swigconstant(_ad9361_swig)
RX_FAST_LOCK_PROFILE_INIT = _ad9361_swig.RX_FAST_LOCK_PROFILE_INIT
_ad9361_swig.RX_FAST_LOCK_PROFILE_PIN_SELECT_swigconstant(_ad9361_swig)
RX_FAST_LOCK_PROFILE_PIN_SELECT = _ad9361_swig.RX_FAST_LOCK_PROFILE_PIN_SELECT
_ad9361_swig.RX_FAST_LOCK_MODE_ENABLE_swigconstant(_ad9361_swig)
RX_FAST_LOCK_MODE_ENABLE = _ad9361_swig.RX_FAST_LOCK_MODE_ENABLE
_ad9361_swig.RX_FAST_LOCK_PROGRAM_WRITE_swigconstant(_ad9361_swig)
RX_FAST_LOCK_PROGRAM_WRITE = _ad9361_swig.RX_FAST_LOCK_PROGRAM_WRITE
_ad9361_swig.RX_FAST_LOCK_PROGRAM_CLOCK_ENABLE_swigconstant(_ad9361_swig)
RX_FAST_LOCK_PROGRAM_CLOCK_ENABLE = _ad9361_swig.RX_FAST_LOCK_PROGRAM_CLOCK_ENABLE
_ad9361_swig.RX_FAST_LOCK_CONFIG_WORD_NUM_swigconstant(_ad9361_swig)
RX_FAST_LOCK_CONFIG_WORD_NUM = _ad9361_swig.RX_FAST_LOCK_CONFIG_WORD_NUM
_ad9361_swig.DIV_TEST_EN_swigconstant(_ad9361_swig)
DIV_TEST_EN = _ad9361_swig.DIV_TEST_EN
_ad9361_swig.PFD_CLK_EDGE_swigconstant(_ad9361_swig)
PFD_CLK_EDGE = _ad9361_swig.PFD_CLK_EDGE
_ad9361_swig.SDM_BYPASS_swigconstant(_ad9361_swig)
SDM_BYPASS = _ad9361_swig.SDM_BYPASS
_ad9361_swig.SDM_POWER_DOWN_swigconstant(_ad9361_swig)
SDM_POWER_DOWN = _ad9361_swig.SDM_POWER_DOWN
_ad9361_swig.FORCE_ALC_ENABLE_swigconstant(_ad9361_swig)
FORCE_ALC_ENABLE = _ad9361_swig.FORCE_ALC_ENABLE
_ad9361_swig.BYPASS_LOAD_DELAY_swigconstant(_ad9361_swig)
BYPASS_LOAD_DELAY = _ad9361_swig.BYPASS_LOAD_DELAY
_ad9361_swig.FORCE_VCO_TUNE_ENABLE_swigconstant(_ad9361_swig)
FORCE_VCO_TUNE_ENABLE = _ad9361_swig.FORCE_VCO_TUNE_ENABLE
_ad9361_swig.FORCE_VCO_TUNE_swigconstant(_ad9361_swig)
FORCE_VCO_TUNE = _ad9361_swig.FORCE_VCO_TUNE
_ad9361_swig.TX_CP_CURRENT_DFLT_swigconstant(_ad9361_swig)
TX_CP_CURRENT_DFLT = _ad9361_swig.TX_CP_CURRENT_DFLT
_ad9361_swig.VTUNE_FORCE_swigconstant(_ad9361_swig)
VTUNE_FORCE = _ad9361_swig.VTUNE_FORCE
_ad9361_swig.DITHER_MODE_swigconstant(_ad9361_swig)
DITHER_MODE = _ad9361_swig.DITHER_MODE
_ad9361_swig.CP_OFFSET_OFF_swigconstant(_ad9361_swig)
CP_OFFSET_OFF = _ad9361_swig.CP_OFFSET_OFF
_ad9361_swig.VCO_BYPASS_BIAS_DAC_R_swigconstant(_ad9361_swig)
VCO_BYPASS_BIAS_DAC_R = _ad9361_swig.VCO_BYPASS_BIAS_DAC_R
_ad9361_swig.VCO_COMP_BYPASS_BIAS_R_swigconstant(_ad9361_swig)
VCO_COMP_BYPASS_BIAS_R = _ad9361_swig.VCO_COMP_BYPASS_BIAS_R
_ad9361_swig.BYPASS_PRESCALE_R_swigconstant(_ad9361_swig)
BYPASS_PRESCALE_R = _ad9361_swig.BYPASS_PRESCALE_R
_ad9361_swig.LAST_ALC_ENABLE_swigconstant(_ad9361_swig)
LAST_ALC_ENABLE = _ad9361_swig.LAST_ALC_ENABLE
_ad9361_swig.COMP_OUT_swigconstant(_ad9361_swig)
COMP_OUT = _ad9361_swig.COMP_OUT
_ad9361_swig.VCO_CAL_REF_MONITOR_swigconstant(_ad9361_swig)
VCO_CAL_REF_MONITOR = _ad9361_swig.VCO_CAL_REF_MONITOR
_ad9361_swig.POWER_DOWN_VARACT_REF_TCF_swigconstant(_ad9361_swig)
POWER_DOWN_VARACT_REF_TCF = _ad9361_swig.POWER_DOWN_VARACT_REF_TCF
_ad9361_swig.DCXO_TEMPCO_EN_swigconstant(_ad9361_swig)
DCXO_TEMPCO_EN = _ad9361_swig.DCXO_TEMPCO_EN
_ad9361_swig.DCXO_TEMPCO_CLK_swigconstant(_ad9361_swig)
DCXO_TEMPCO_CLK = _ad9361_swig.DCXO_TEMPCO_CLK
_ad9361_swig.TX_FAST_LOCK_LOAD_SYNTH_swigconstant(_ad9361_swig)
TX_FAST_LOCK_LOAD_SYNTH = _ad9361_swig.TX_FAST_LOCK_LOAD_SYNTH
_ad9361_swig.TX_FAST_LOCK_PROFILE_INIT_swigconstant(_ad9361_swig)
TX_FAST_LOCK_PROFILE_INIT = _ad9361_swig.TX_FAST_LOCK_PROFILE_INIT
_ad9361_swig.TX_FAST_LOCK_PROFILE_PIN_SELECT_swigconstant(_ad9361_swig)
TX_FAST_LOCK_PROFILE_PIN_SELECT = _ad9361_swig.TX_FAST_LOCK_PROFILE_PIN_SELECT
_ad9361_swig.TX_FAST_LOCK_MODE_ENABLE_swigconstant(_ad9361_swig)
TX_FAST_LOCK_MODE_ENABLE = _ad9361_swig.TX_FAST_LOCK_MODE_ENABLE
_ad9361_swig.TX_FAST_LOCK_PROGRAM_WRITE_swigconstant(_ad9361_swig)
TX_FAST_LOCK_PROGRAM_WRITE = _ad9361_swig.TX_FAST_LOCK_PROGRAM_WRITE
_ad9361_swig.TX_FAST_LOCK_PROGRAM_CLOCK_ENABLE_swigconstant(_ad9361_swig)
TX_FAST_LOCK_PROGRAM_CLOCK_ENABLE = _ad9361_swig.TX_FAST_LOCK_PROGRAM_CLOCK_ENABLE
_ad9361_swig.POWER_DOWN_BANDGAP_REF_swigconstant(_ad9361_swig)
POWER_DOWN_BANDGAP_REF = _ad9361_swig.POWER_DOWN_BANDGAP_REF
_ad9361_swig.MASTER_BIAS_FILTER_BYPASS_swigconstant(_ad9361_swig)
MASTER_BIAS_FILTER_BYPASS = _ad9361_swig.MASTER_BIAS_FILTER_BYPASS
_ad9361_swig.MASTER_BIAS_REF_SEL_swigconstant(_ad9361_swig)
MASTER_BIAS_REF_SEL = _ad9361_swig.MASTER_BIAS_REF_SEL
_ad9361_swig.VCO_LDO_FILTER_BYPASS_swigconstant(_ad9361_swig)
VCO_LDO_FILTER_BYPASS = _ad9361_swig.VCO_LDO_FILTER_BYPASS
_ad9361_swig.VCO_LDO_REF_SEL_swigconstant(_ad9361_swig)
VCO_LDO_REF_SEL = _ad9361_swig.VCO_LDO_REF_SEL
_ad9361_swig.BANDGAP_REF_RESET_swigconstant(_ad9361_swig)
BANDGAP_REF_RESET = _ad9361_swig.BANDGAP_REF_RESET
_ad9361_swig.REF_DIVIDE_CONFIG_1_DFLT_swigconstant(_ad9361_swig)
REF_DIVIDE_CONFIG_1_DFLT = _ad9361_swig.REF_DIVIDE_CONFIG_1_DFLT
_ad9361_swig.RX_REF_RESET_BAR_swigconstant(_ad9361_swig)
RX_REF_RESET_BAR = _ad9361_swig.RX_REF_RESET_BAR
_ad9361_swig.RX_REF_DIVIDER_MSB_swigconstant(_ad9361_swig)
RX_REF_DIVIDER_MSB = _ad9361_swig.RX_REF_DIVIDER_MSB
_ad9361_swig.RX_REF_DIVIDER_LSB_swigconstant(_ad9361_swig)
RX_REF_DIVIDER_LSB = _ad9361_swig.RX_REF_DIVIDER_LSB
_ad9361_swig.TX_REF_RESET_BAR_swigconstant(_ad9361_swig)
TX_REF_RESET_BAR = _ad9361_swig.TX_REF_RESET_BAR
_ad9361_swig.FAST_ATK_MASK_swigconstant(_ad9361_swig)
FAST_ATK_MASK = _ad9361_swig.FAST_ATK_MASK
_ad9361_swig.RX1_FAST_ATK_SHIFT_swigconstant(_ad9361_swig)
RX1_FAST_ATK_SHIFT = _ad9361_swig.RX1_FAST_ATK_SHIFT
_ad9361_swig.RX2_FAST_ATK_SHIFT_swigconstant(_ad9361_swig)
RX2_FAST_ATK_SHIFT = _ad9361_swig.RX2_FAST_ATK_SHIFT
_ad9361_swig.FAST_ATK_RESET_swigconstant(_ad9361_swig)
FAST_ATK_RESET = _ad9361_swig.FAST_ATK_RESET
_ad9361_swig.FAST_ATK_PEAK_DETECT_swigconstant(_ad9361_swig)
FAST_ATK_PEAK_DETECT = _ad9361_swig.FAST_ATK_PEAK_DETECT
_ad9361_swig.FAST_ATK_PWR_MEASURE_swigconstant(_ad9361_swig)
FAST_ATK_PWR_MEASURE = _ad9361_swig.FAST_ATK_PWR_MEASURE
_ad9361_swig.FAST_ATK_FINAL_SETTELING_swigconstant(_ad9361_swig)
FAST_ATK_FINAL_SETTELING = _ad9361_swig.FAST_ATK_FINAL_SETTELING
_ad9361_swig.FAST_ATK_FINAL_OVER_swigconstant(_ad9361_swig)
FAST_ATK_FINAL_OVER = _ad9361_swig.FAST_ATK_FINAL_OVER
_ad9361_swig.FAST_ATK_GAIN_LOCKED_swigconstant(_ad9361_swig)
FAST_ATK_GAIN_LOCKED = _ad9361_swig.FAST_ATK_GAIN_LOCKED
_ad9361_swig.GAIN_LOCK_1_swigconstant(_ad9361_swig)
GAIN_LOCK_1 = _ad9361_swig.GAIN_LOCK_1
_ad9361_swig.LOW_POWER_1_swigconstant(_ad9361_swig)
LOW_POWER_1 = _ad9361_swig.LOW_POWER_1
_ad9361_swig.LARGE_LMT_OL_swigconstant(_ad9361_swig)
LARGE_LMT_OL = _ad9361_swig.LARGE_LMT_OL
_ad9361_swig.SMALL_LMT_OL_swigconstant(_ad9361_swig)
SMALL_LMT_OL = _ad9361_swig.SMALL_LMT_OL
_ad9361_swig.LARGE_ADC_OL_swigconstant(_ad9361_swig)
LARGE_ADC_OL = _ad9361_swig.LARGE_ADC_OL
_ad9361_swig.SMALL_ADC_OL_swigconstant(_ad9361_swig)
SMALL_ADC_OL = _ad9361_swig.SMALL_ADC_OL
_ad9361_swig.DIG_SAT_swigconstant(_ad9361_swig)
DIG_SAT = _ad9361_swig.DIG_SAT
_ad9361_swig.CTRL_ENABLE_swigconstant(_ad9361_swig)
CTRL_ENABLE = _ad9361_swig.CTRL_ENABLE
_ad9361_swig.TONE_PRBS_swigconstant(_ad9361_swig)
TONE_PRBS = _ad9361_swig.TONE_PRBS
_ad9361_swig.BIST_ENABLE_swigconstant(_ad9361_swig)
BIST_ENABLE = _ad9361_swig.BIST_ENABLE
_ad9361_swig.DATA_PORT_SP_HD_LOOP_TEST_OE_swigconstant(_ad9361_swig)
DATA_PORT_SP_HD_LOOP_TEST_OE = _ad9361_swig.DATA_PORT_SP_HD_LOOP_TEST_OE
_ad9361_swig.RX_MASK_swigconstant(_ad9361_swig)
RX_MASK = _ad9361_swig.RX_MASK
_ad9361_swig.CHANNEL_swigconstant(_ad9361_swig)
CHANNEL = _ad9361_swig.CHANNEL
_ad9361_swig.DATA_PORT_LOOP_TEST_ENABLE_swigconstant(_ad9361_swig)
DATA_PORT_LOOP_TEST_ENABLE = _ad9361_swig.DATA_PORT_LOOP_TEST_ENABLE
_ad9361_swig.BIST_MASK_CHANNEL_2_Q_DATA_swigconstant(_ad9361_swig)
BIST_MASK_CHANNEL_2_Q_DATA = _ad9361_swig.BIST_MASK_CHANNEL_2_Q_DATA
_ad9361_swig.BIST_MASK_CHANNEL_2_I_DATA_swigconstant(_ad9361_swig)
BIST_MASK_CHANNEL_2_I_DATA = _ad9361_swig.BIST_MASK_CHANNEL_2_I_DATA
_ad9361_swig.BIST_MASK_CHANNEL_1_Q_DATA_swigconstant(_ad9361_swig)
BIST_MASK_CHANNEL_1_Q_DATA = _ad9361_swig.BIST_MASK_CHANNEL_1_Q_DATA
_ad9361_swig.BIST_MASK_CHANNEL_1_I_DATA_swigconstant(_ad9361_swig)
BIST_MASK_CHANNEL_1_I_DATA = _ad9361_swig.BIST_MASK_CHANNEL_1_I_DATA
_ad9361_swig.DATA_PORT_HILOW_swigconstant(_ad9361_swig)
DATA_PORT_HILOW = _ad9361_swig.DATA_PORT_HILOW
_ad9361_swig.USE_DATA_PORT_swigconstant(_ad9361_swig)
USE_DATA_PORT = _ad9361_swig.USE_DATA_PORT
_ad9361_swig.DAC_TEST_ENABLE_swigconstant(_ad9361_swig)
DAC_TEST_ENABLE = _ad9361_swig.DAC_TEST_ENABLE
_ad9361_swig.AD_READ_swigconstant(_ad9361_swig)
AD_READ = _ad9361_swig.AD_READ
_ad9361_swig.AD_WRITE_swigconstant(_ad9361_swig)
AD_WRITE = _ad9361_swig.AD_WRITE
_ad9361_swig.RSSI_MULTIPLIER_swigconstant(_ad9361_swig)
RSSI_MULTIPLIER = _ad9361_swig.RSSI_MULTIPLIER
_ad9361_swig.RSSI_MAX_WEIGHT_swigconstant(_ad9361_swig)
RSSI_MAX_WEIGHT = _ad9361_swig.RSSI_MAX_WEIGHT
_ad9361_swig.MAX_LMT_INDEX_swigconstant(_ad9361_swig)
MAX_LMT_INDEX = _ad9361_swig.MAX_LMT_INDEX
_ad9361_swig.MAX_LPF_GAIN_swigconstant(_ad9361_swig)
MAX_LPF_GAIN = _ad9361_swig.MAX_LPF_GAIN
_ad9361_swig.MAX_DIG_GAIN_swigconstant(_ad9361_swig)
MAX_DIG_GAIN = _ad9361_swig.MAX_DIG_GAIN
_ad9361_swig.MAX_BBPLL_FREF_swigconstant(_ad9361_swig)
MAX_BBPLL_FREF = _ad9361_swig.MAX_BBPLL_FREF
_ad9361_swig.MIN_BBPLL_FREQ_swigconstant(_ad9361_swig)
MIN_BBPLL_FREQ = _ad9361_swig.MIN_BBPLL_FREQ
_ad9361_swig.MAX_BBPLL_FREQ_swigconstant(_ad9361_swig)
MAX_BBPLL_FREQ = _ad9361_swig.MAX_BBPLL_FREQ
_ad9361_swig.MAX_BBPLL_DIV_swigconstant(_ad9361_swig)
MAX_BBPLL_DIV = _ad9361_swig.MAX_BBPLL_DIV
_ad9361_swig.MIN_BBPLL_DIV_swigconstant(_ad9361_swig)
MIN_BBPLL_DIV = _ad9361_swig.MIN_BBPLL_DIV
_ad9361_swig.MIN_ADC_CLK_swigconstant(_ad9361_swig)
MIN_ADC_CLK = _ad9361_swig.MIN_ADC_CLK
_ad9361_swig.MAX_ADC_CLK_swigconstant(_ad9361_swig)
MAX_ADC_CLK = _ad9361_swig.MAX_ADC_CLK
_ad9361_swig.MAX_DAC_CLK_swigconstant(_ad9361_swig)
MAX_DAC_CLK = _ad9361_swig.MAX_DAC_CLK
_ad9361_swig.MAX_MBYTE_SPI_swigconstant(_ad9361_swig)
MAX_MBYTE_SPI = _ad9361_swig.MAX_MBYTE_SPI
_ad9361_swig.RFPLL_MODULUS_swigconstant(_ad9361_swig)
RFPLL_MODULUS = _ad9361_swig.RFPLL_MODULUS
_ad9361_swig.BBPLL_MODULUS_swigconstant(_ad9361_swig)
BBPLL_MODULUS = _ad9361_swig.BBPLL_MODULUS
_ad9361_swig.MAX_SYNTH_FREF_swigconstant(_ad9361_swig)
MAX_SYNTH_FREF = _ad9361_swig.MAX_SYNTH_FREF
_ad9361_swig.MIN_SYNTH_FREF_swigconstant(_ad9361_swig)
MIN_SYNTH_FREF = _ad9361_swig.MIN_SYNTH_FREF
_ad9361_swig.MIN_VCO_FREQ_HZ_swigconstant(_ad9361_swig)
MIN_VCO_FREQ_HZ = _ad9361_swig.MIN_VCO_FREQ_HZ
_ad9361_swig.MAX_CARRIER_FREQ_HZ_swigconstant(_ad9361_swig)
MAX_CARRIER_FREQ_HZ = _ad9361_swig.MAX_CARRIER_FREQ_HZ
_ad9361_swig.MIN_CARRIER_FREQ_HZ_swigconstant(_ad9361_swig)
MIN_CARRIER_FREQ_HZ = _ad9361_swig.MIN_CARRIER_FREQ_HZ
_ad9361_swig.RXGAIN_FULL_TBL_swigconstant(_ad9361_swig)
RXGAIN_FULL_TBL = _ad9361_swig.RXGAIN_FULL_TBL
_ad9361_swig.RXGAIN_SPLIT_TBL_swigconstant(_ad9361_swig)
RXGAIN_SPLIT_TBL = _ad9361_swig.RXGAIN_SPLIT_TBL
_ad9361_swig.TBL_200_1300_MHZ_swigconstant(_ad9361_swig)
TBL_200_1300_MHZ = _ad9361_swig.TBL_200_1300_MHZ
_ad9361_swig.TBL_1300_4000_MHZ_swigconstant(_ad9361_swig)
TBL_1300_4000_MHZ = _ad9361_swig.TBL_1300_4000_MHZ
_ad9361_swig.TBL_4000_6000_MHZ_swigconstant(_ad9361_swig)
TBL_4000_6000_MHZ = _ad9361_swig.TBL_4000_6000_MHZ
_ad9361_swig.RXGAIN_TBLS_END_swigconstant(_ad9361_swig)
RXGAIN_TBLS_END = _ad9361_swig.RXGAIN_TBLS_END
_ad9361_swig.FIR_TX1_swigconstant(_ad9361_swig)
FIR_TX1 = _ad9361_swig.FIR_TX1
_ad9361_swig.FIR_TX2_swigconstant(_ad9361_swig)
FIR_TX2 = _ad9361_swig.FIR_TX2
_ad9361_swig.FIR_TX1_TX2_swigconstant(_ad9361_swig)
FIR_TX1_TX2 = _ad9361_swig.FIR_TX1_TX2
_ad9361_swig.FIR_RX1_swigconstant(_ad9361_swig)
FIR_RX1 = _ad9361_swig.FIR_RX1
_ad9361_swig.FIR_RX2_swigconstant(_ad9361_swig)
FIR_RX2 = _ad9361_swig.FIR_RX2
_ad9361_swig.FIR_RX1_RX2_swigconstant(_ad9361_swig)
FIR_RX1_RX2 = _ad9361_swig.FIR_RX1_RX2
_ad9361_swig.FIR_IS_RX_swigconstant(_ad9361_swig)
FIR_IS_RX = _ad9361_swig.FIR_IS_RX
[docs]class rf_gain_ctrl(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, rf_gain_ctrl, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, rf_gain_ctrl, name)
__repr__ = _swig_repr
__swig_setmethods__["ant"] = _ad9361_swig.rf_gain_ctrl_ant_set
__swig_getmethods__["ant"] = _ad9361_swig.rf_gain_ctrl_ant_get
if _newclass:
ant = _swig_property(_ad9361_swig.rf_gain_ctrl_ant_get, _ad9361_swig.rf_gain_ctrl_ant_set)
__swig_setmethods__["mode"] = _ad9361_swig.rf_gain_ctrl_mode_set
__swig_getmethods__["mode"] = _ad9361_swig.rf_gain_ctrl_mode_get
if _newclass:
mode = _swig_property(_ad9361_swig.rf_gain_ctrl_mode_get, _ad9361_swig.rf_gain_ctrl_mode_set)
def __init__(self):
this = _ad9361_swig.new_rf_gain_ctrl()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_rf_gain_ctrl
__del__ = lambda self: None
rf_gain_ctrl_swigregister = _ad9361_swig.rf_gain_ctrl_swigregister
rf_gain_ctrl_swigregister(rf_gain_ctrl)
_ad9361_swig.RF_GAIN_MGC_swigconstant(_ad9361_swig)
RF_GAIN_MGC = _ad9361_swig.RF_GAIN_MGC
_ad9361_swig.RF_GAIN_FASTATTACK_AGC_swigconstant(_ad9361_swig)
RF_GAIN_FASTATTACK_AGC = _ad9361_swig.RF_GAIN_FASTATTACK_AGC
_ad9361_swig.RF_GAIN_SLOWATTACK_AGC_swigconstant(_ad9361_swig)
RF_GAIN_SLOWATTACK_AGC = _ad9361_swig.RF_GAIN_SLOWATTACK_AGC
_ad9361_swig.RF_GAIN_HYBRID_AGC_swigconstant(_ad9361_swig)
RF_GAIN_HYBRID_AGC = _ad9361_swig.RF_GAIN_HYBRID_AGC
_ad9361_swig.MAX_GAIN_swigconstant(_ad9361_swig)
MAX_GAIN = _ad9361_swig.MAX_GAIN
_ad9361_swig.SET_GAIN_swigconstant(_ad9361_swig)
SET_GAIN = _ad9361_swig.SET_GAIN
_ad9361_swig.OPTIMIZED_GAIN_swigconstant(_ad9361_swig)
OPTIMIZED_GAIN = _ad9361_swig.OPTIMIZED_GAIN
_ad9361_swig.NO_GAIN_CHANGE_swigconstant(_ad9361_swig)
NO_GAIN_CHANGE = _ad9361_swig.NO_GAIN_CHANGE
[docs]class gain_control(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, gain_control, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, gain_control, name)
__repr__ = _swig_repr
__swig_setmethods__["rx1_mode"] = _ad9361_swig.gain_control_rx1_mode_set
__swig_getmethods__["rx1_mode"] = _ad9361_swig.gain_control_rx1_mode_get
if _newclass:
rx1_mode = _swig_property(_ad9361_swig.gain_control_rx1_mode_get, _ad9361_swig.gain_control_rx1_mode_set)
__swig_setmethods__["rx2_mode"] = _ad9361_swig.gain_control_rx2_mode_set
__swig_getmethods__["rx2_mode"] = _ad9361_swig.gain_control_rx2_mode_get
if _newclass:
rx2_mode = _swig_property(_ad9361_swig.gain_control_rx2_mode_get, _ad9361_swig.gain_control_rx2_mode_set)
__swig_setmethods__["adc_ovr_sample_size"] = _ad9361_swig.gain_control_adc_ovr_sample_size_set
__swig_getmethods__["adc_ovr_sample_size"] = _ad9361_swig.gain_control_adc_ovr_sample_size_get
if _newclass:
adc_ovr_sample_size = _swig_property(_ad9361_swig.gain_control_adc_ovr_sample_size_get, _ad9361_swig.gain_control_adc_ovr_sample_size_set)
__swig_setmethods__["adc_small_overload_thresh"] = _ad9361_swig.gain_control_adc_small_overload_thresh_set
__swig_getmethods__["adc_small_overload_thresh"] = _ad9361_swig.gain_control_adc_small_overload_thresh_get
if _newclass:
adc_small_overload_thresh = _swig_property(_ad9361_swig.gain_control_adc_small_overload_thresh_get, _ad9361_swig.gain_control_adc_small_overload_thresh_set)
__swig_setmethods__["adc_large_overload_thresh"] = _ad9361_swig.gain_control_adc_large_overload_thresh_set
__swig_getmethods__["adc_large_overload_thresh"] = _ad9361_swig.gain_control_adc_large_overload_thresh_get
if _newclass:
adc_large_overload_thresh = _swig_property(_ad9361_swig.gain_control_adc_large_overload_thresh_get, _ad9361_swig.gain_control_adc_large_overload_thresh_set)
__swig_setmethods__["lmt_overload_high_thresh"] = _ad9361_swig.gain_control_lmt_overload_high_thresh_set
__swig_getmethods__["lmt_overload_high_thresh"] = _ad9361_swig.gain_control_lmt_overload_high_thresh_get
if _newclass:
lmt_overload_high_thresh = _swig_property(_ad9361_swig.gain_control_lmt_overload_high_thresh_get, _ad9361_swig.gain_control_lmt_overload_high_thresh_set)
__swig_setmethods__["lmt_overload_low_thresh"] = _ad9361_swig.gain_control_lmt_overload_low_thresh_set
__swig_getmethods__["lmt_overload_low_thresh"] = _ad9361_swig.gain_control_lmt_overload_low_thresh_get
if _newclass:
lmt_overload_low_thresh = _swig_property(_ad9361_swig.gain_control_lmt_overload_low_thresh_get, _ad9361_swig.gain_control_lmt_overload_low_thresh_set)
__swig_setmethods__["dec_pow_measuremnt_duration"] = _ad9361_swig.gain_control_dec_pow_measuremnt_duration_set
__swig_getmethods__["dec_pow_measuremnt_duration"] = _ad9361_swig.gain_control_dec_pow_measuremnt_duration_get
if _newclass:
dec_pow_measuremnt_duration = _swig_property(_ad9361_swig.gain_control_dec_pow_measuremnt_duration_get, _ad9361_swig.gain_control_dec_pow_measuremnt_duration_set)
__swig_setmethods__["low_power_thresh"] = _ad9361_swig.gain_control_low_power_thresh_set
__swig_getmethods__["low_power_thresh"] = _ad9361_swig.gain_control_low_power_thresh_get
if _newclass:
low_power_thresh = _swig_property(_ad9361_swig.gain_control_low_power_thresh_get, _ad9361_swig.gain_control_low_power_thresh_set)
__swig_setmethods__["dig_gain_en"] = _ad9361_swig.gain_control_dig_gain_en_set
__swig_getmethods__["dig_gain_en"] = _ad9361_swig.gain_control_dig_gain_en_get
if _newclass:
dig_gain_en = _swig_property(_ad9361_swig.gain_control_dig_gain_en_get, _ad9361_swig.gain_control_dig_gain_en_set)
__swig_setmethods__["max_dig_gain"] = _ad9361_swig.gain_control_max_dig_gain_set
__swig_getmethods__["max_dig_gain"] = _ad9361_swig.gain_control_max_dig_gain_get
if _newclass:
max_dig_gain = _swig_property(_ad9361_swig.gain_control_max_dig_gain_get, _ad9361_swig.gain_control_max_dig_gain_set)
__swig_setmethods__["mgc_rx1_ctrl_inp_en"] = _ad9361_swig.gain_control_mgc_rx1_ctrl_inp_en_set
__swig_getmethods__["mgc_rx1_ctrl_inp_en"] = _ad9361_swig.gain_control_mgc_rx1_ctrl_inp_en_get
if _newclass:
mgc_rx1_ctrl_inp_en = _swig_property(_ad9361_swig.gain_control_mgc_rx1_ctrl_inp_en_get, _ad9361_swig.gain_control_mgc_rx1_ctrl_inp_en_set)
__swig_setmethods__["mgc_rx2_ctrl_inp_en"] = _ad9361_swig.gain_control_mgc_rx2_ctrl_inp_en_set
__swig_getmethods__["mgc_rx2_ctrl_inp_en"] = _ad9361_swig.gain_control_mgc_rx2_ctrl_inp_en_get
if _newclass:
mgc_rx2_ctrl_inp_en = _swig_property(_ad9361_swig.gain_control_mgc_rx2_ctrl_inp_en_get, _ad9361_swig.gain_control_mgc_rx2_ctrl_inp_en_set)
__swig_setmethods__["mgc_inc_gain_step"] = _ad9361_swig.gain_control_mgc_inc_gain_step_set
__swig_getmethods__["mgc_inc_gain_step"] = _ad9361_swig.gain_control_mgc_inc_gain_step_get
if _newclass:
mgc_inc_gain_step = _swig_property(_ad9361_swig.gain_control_mgc_inc_gain_step_get, _ad9361_swig.gain_control_mgc_inc_gain_step_set)
__swig_setmethods__["mgc_dec_gain_step"] = _ad9361_swig.gain_control_mgc_dec_gain_step_set
__swig_getmethods__["mgc_dec_gain_step"] = _ad9361_swig.gain_control_mgc_dec_gain_step_get
if _newclass:
mgc_dec_gain_step = _swig_property(_ad9361_swig.gain_control_mgc_dec_gain_step_get, _ad9361_swig.gain_control_mgc_dec_gain_step_set)
__swig_setmethods__["mgc_split_table_ctrl_inp_gain_mode"] = _ad9361_swig.gain_control_mgc_split_table_ctrl_inp_gain_mode_set
__swig_getmethods__["mgc_split_table_ctrl_inp_gain_mode"] = _ad9361_swig.gain_control_mgc_split_table_ctrl_inp_gain_mode_get
if _newclass:
mgc_split_table_ctrl_inp_gain_mode = _swig_property(_ad9361_swig.gain_control_mgc_split_table_ctrl_inp_gain_mode_get, _ad9361_swig.gain_control_mgc_split_table_ctrl_inp_gain_mode_set)
__swig_setmethods__["agc_attack_delay_extra_margin_us"] = _ad9361_swig.gain_control_agc_attack_delay_extra_margin_us_set
__swig_getmethods__["agc_attack_delay_extra_margin_us"] = _ad9361_swig.gain_control_agc_attack_delay_extra_margin_us_get
if _newclass:
agc_attack_delay_extra_margin_us = _swig_property(_ad9361_swig.gain_control_agc_attack_delay_extra_margin_us_get, _ad9361_swig.gain_control_agc_attack_delay_extra_margin_us_set)
__swig_setmethods__["agc_outer_thresh_high"] = _ad9361_swig.gain_control_agc_outer_thresh_high_set
__swig_getmethods__["agc_outer_thresh_high"] = _ad9361_swig.gain_control_agc_outer_thresh_high_get
if _newclass:
agc_outer_thresh_high = _swig_property(_ad9361_swig.gain_control_agc_outer_thresh_high_get, _ad9361_swig.gain_control_agc_outer_thresh_high_set)
__swig_setmethods__["agc_outer_thresh_high_dec_steps"] = _ad9361_swig.gain_control_agc_outer_thresh_high_dec_steps_set
__swig_getmethods__["agc_outer_thresh_high_dec_steps"] = _ad9361_swig.gain_control_agc_outer_thresh_high_dec_steps_get
if _newclass:
agc_outer_thresh_high_dec_steps = _swig_property(_ad9361_swig.gain_control_agc_outer_thresh_high_dec_steps_get, _ad9361_swig.gain_control_agc_outer_thresh_high_dec_steps_set)
__swig_setmethods__["agc_inner_thresh_high"] = _ad9361_swig.gain_control_agc_inner_thresh_high_set
__swig_getmethods__["agc_inner_thresh_high"] = _ad9361_swig.gain_control_agc_inner_thresh_high_get
if _newclass:
agc_inner_thresh_high = _swig_property(_ad9361_swig.gain_control_agc_inner_thresh_high_get, _ad9361_swig.gain_control_agc_inner_thresh_high_set)
__swig_setmethods__["agc_inner_thresh_high_dec_steps"] = _ad9361_swig.gain_control_agc_inner_thresh_high_dec_steps_set
__swig_getmethods__["agc_inner_thresh_high_dec_steps"] = _ad9361_swig.gain_control_agc_inner_thresh_high_dec_steps_get
if _newclass:
agc_inner_thresh_high_dec_steps = _swig_property(_ad9361_swig.gain_control_agc_inner_thresh_high_dec_steps_get, _ad9361_swig.gain_control_agc_inner_thresh_high_dec_steps_set)
__swig_setmethods__["agc_inner_thresh_low"] = _ad9361_swig.gain_control_agc_inner_thresh_low_set
__swig_getmethods__["agc_inner_thresh_low"] = _ad9361_swig.gain_control_agc_inner_thresh_low_get
if _newclass:
agc_inner_thresh_low = _swig_property(_ad9361_swig.gain_control_agc_inner_thresh_low_get, _ad9361_swig.gain_control_agc_inner_thresh_low_set)
__swig_setmethods__["agc_inner_thresh_low_inc_steps"] = _ad9361_swig.gain_control_agc_inner_thresh_low_inc_steps_set
__swig_getmethods__["agc_inner_thresh_low_inc_steps"] = _ad9361_swig.gain_control_agc_inner_thresh_low_inc_steps_get
if _newclass:
agc_inner_thresh_low_inc_steps = _swig_property(_ad9361_swig.gain_control_agc_inner_thresh_low_inc_steps_get, _ad9361_swig.gain_control_agc_inner_thresh_low_inc_steps_set)
__swig_setmethods__["agc_outer_thresh_low"] = _ad9361_swig.gain_control_agc_outer_thresh_low_set
__swig_getmethods__["agc_outer_thresh_low"] = _ad9361_swig.gain_control_agc_outer_thresh_low_get
if _newclass:
agc_outer_thresh_low = _swig_property(_ad9361_swig.gain_control_agc_outer_thresh_low_get, _ad9361_swig.gain_control_agc_outer_thresh_low_set)
__swig_setmethods__["agc_outer_thresh_low_inc_steps"] = _ad9361_swig.gain_control_agc_outer_thresh_low_inc_steps_set
__swig_getmethods__["agc_outer_thresh_low_inc_steps"] = _ad9361_swig.gain_control_agc_outer_thresh_low_inc_steps_get
if _newclass:
agc_outer_thresh_low_inc_steps = _swig_property(_ad9361_swig.gain_control_agc_outer_thresh_low_inc_steps_get, _ad9361_swig.gain_control_agc_outer_thresh_low_inc_steps_set)
__swig_setmethods__["adc_small_overload_exceed_counter"] = _ad9361_swig.gain_control_adc_small_overload_exceed_counter_set
__swig_getmethods__["adc_small_overload_exceed_counter"] = _ad9361_swig.gain_control_adc_small_overload_exceed_counter_get
if _newclass:
adc_small_overload_exceed_counter = _swig_property(_ad9361_swig.gain_control_adc_small_overload_exceed_counter_get, _ad9361_swig.gain_control_adc_small_overload_exceed_counter_set)
__swig_setmethods__["adc_large_overload_exceed_counter"] = _ad9361_swig.gain_control_adc_large_overload_exceed_counter_set
__swig_getmethods__["adc_large_overload_exceed_counter"] = _ad9361_swig.gain_control_adc_large_overload_exceed_counter_get
if _newclass:
adc_large_overload_exceed_counter = _swig_property(_ad9361_swig.gain_control_adc_large_overload_exceed_counter_get, _ad9361_swig.gain_control_adc_large_overload_exceed_counter_set)
__swig_setmethods__["adc_large_overload_inc_steps"] = _ad9361_swig.gain_control_adc_large_overload_inc_steps_set
__swig_getmethods__["adc_large_overload_inc_steps"] = _ad9361_swig.gain_control_adc_large_overload_inc_steps_get
if _newclass:
adc_large_overload_inc_steps = _swig_property(_ad9361_swig.gain_control_adc_large_overload_inc_steps_get, _ad9361_swig.gain_control_adc_large_overload_inc_steps_set)
__swig_setmethods__["adc_lmt_small_overload_prevent_gain_inc"] = _ad9361_swig.gain_control_adc_lmt_small_overload_prevent_gain_inc_set
__swig_getmethods__["adc_lmt_small_overload_prevent_gain_inc"] = _ad9361_swig.gain_control_adc_lmt_small_overload_prevent_gain_inc_get
if _newclass:
adc_lmt_small_overload_prevent_gain_inc = _swig_property(_ad9361_swig.gain_control_adc_lmt_small_overload_prevent_gain_inc_get, _ad9361_swig.gain_control_adc_lmt_small_overload_prevent_gain_inc_set)
__swig_setmethods__["lmt_overload_large_exceed_counter"] = _ad9361_swig.gain_control_lmt_overload_large_exceed_counter_set
__swig_getmethods__["lmt_overload_large_exceed_counter"] = _ad9361_swig.gain_control_lmt_overload_large_exceed_counter_get
if _newclass:
lmt_overload_large_exceed_counter = _swig_property(_ad9361_swig.gain_control_lmt_overload_large_exceed_counter_get, _ad9361_swig.gain_control_lmt_overload_large_exceed_counter_set)
__swig_setmethods__["lmt_overload_small_exceed_counter"] = _ad9361_swig.gain_control_lmt_overload_small_exceed_counter_set
__swig_getmethods__["lmt_overload_small_exceed_counter"] = _ad9361_swig.gain_control_lmt_overload_small_exceed_counter_get
if _newclass:
lmt_overload_small_exceed_counter = _swig_property(_ad9361_swig.gain_control_lmt_overload_small_exceed_counter_get, _ad9361_swig.gain_control_lmt_overload_small_exceed_counter_set)
__swig_setmethods__["lmt_overload_large_inc_steps"] = _ad9361_swig.gain_control_lmt_overload_large_inc_steps_set
__swig_getmethods__["lmt_overload_large_inc_steps"] = _ad9361_swig.gain_control_lmt_overload_large_inc_steps_get
if _newclass:
lmt_overload_large_inc_steps = _swig_property(_ad9361_swig.gain_control_lmt_overload_large_inc_steps_get, _ad9361_swig.gain_control_lmt_overload_large_inc_steps_set)
__swig_setmethods__["dig_saturation_exceed_counter"] = _ad9361_swig.gain_control_dig_saturation_exceed_counter_set
__swig_getmethods__["dig_saturation_exceed_counter"] = _ad9361_swig.gain_control_dig_saturation_exceed_counter_get
if _newclass:
dig_saturation_exceed_counter = _swig_property(_ad9361_swig.gain_control_dig_saturation_exceed_counter_get, _ad9361_swig.gain_control_dig_saturation_exceed_counter_set)
__swig_setmethods__["dig_gain_step_size"] = _ad9361_swig.gain_control_dig_gain_step_size_set
__swig_getmethods__["dig_gain_step_size"] = _ad9361_swig.gain_control_dig_gain_step_size_get
if _newclass:
dig_gain_step_size = _swig_property(_ad9361_swig.gain_control_dig_gain_step_size_get, _ad9361_swig.gain_control_dig_gain_step_size_set)
__swig_setmethods__["sync_for_gain_counter_en"] = _ad9361_swig.gain_control_sync_for_gain_counter_en_set
__swig_getmethods__["sync_for_gain_counter_en"] = _ad9361_swig.gain_control_sync_for_gain_counter_en_get
if _newclass:
sync_for_gain_counter_en = _swig_property(_ad9361_swig.gain_control_sync_for_gain_counter_en_get, _ad9361_swig.gain_control_sync_for_gain_counter_en_set)
__swig_setmethods__["gain_update_interval_us"] = _ad9361_swig.gain_control_gain_update_interval_us_set
__swig_getmethods__["gain_update_interval_us"] = _ad9361_swig.gain_control_gain_update_interval_us_get
if _newclass:
gain_update_interval_us = _swig_property(_ad9361_swig.gain_control_gain_update_interval_us_get, _ad9361_swig.gain_control_gain_update_interval_us_set)
__swig_setmethods__["immed_gain_change_if_large_adc_overload"] = _ad9361_swig.gain_control_immed_gain_change_if_large_adc_overload_set
__swig_getmethods__["immed_gain_change_if_large_adc_overload"] = _ad9361_swig.gain_control_immed_gain_change_if_large_adc_overload_get
if _newclass:
immed_gain_change_if_large_adc_overload = _swig_property(_ad9361_swig.gain_control_immed_gain_change_if_large_adc_overload_get, _ad9361_swig.gain_control_immed_gain_change_if_large_adc_overload_set)
__swig_setmethods__["immed_gain_change_if_large_lmt_overload"] = _ad9361_swig.gain_control_immed_gain_change_if_large_lmt_overload_set
__swig_getmethods__["immed_gain_change_if_large_lmt_overload"] = _ad9361_swig.gain_control_immed_gain_change_if_large_lmt_overload_get
if _newclass:
immed_gain_change_if_large_lmt_overload = _swig_property(_ad9361_swig.gain_control_immed_gain_change_if_large_lmt_overload_get, _ad9361_swig.gain_control_immed_gain_change_if_large_lmt_overload_set)
__swig_setmethods__["f_agc_dec_pow_measuremnt_duration"] = _ad9361_swig.gain_control_f_agc_dec_pow_measuremnt_duration_set
__swig_getmethods__["f_agc_dec_pow_measuremnt_duration"] = _ad9361_swig.gain_control_f_agc_dec_pow_measuremnt_duration_get
if _newclass:
f_agc_dec_pow_measuremnt_duration = _swig_property(_ad9361_swig.gain_control_f_agc_dec_pow_measuremnt_duration_get, _ad9361_swig.gain_control_f_agc_dec_pow_measuremnt_duration_set)
__swig_setmethods__["f_agc_state_wait_time_ns"] = _ad9361_swig.gain_control_f_agc_state_wait_time_ns_set
__swig_getmethods__["f_agc_state_wait_time_ns"] = _ad9361_swig.gain_control_f_agc_state_wait_time_ns_get
if _newclass:
f_agc_state_wait_time_ns = _swig_property(_ad9361_swig.gain_control_f_agc_state_wait_time_ns_get, _ad9361_swig.gain_control_f_agc_state_wait_time_ns_set)
__swig_setmethods__["f_agc_allow_agc_gain_increase"] = _ad9361_swig.gain_control_f_agc_allow_agc_gain_increase_set
__swig_getmethods__["f_agc_allow_agc_gain_increase"] = _ad9361_swig.gain_control_f_agc_allow_agc_gain_increase_get
if _newclass:
f_agc_allow_agc_gain_increase = _swig_property(_ad9361_swig.gain_control_f_agc_allow_agc_gain_increase_get, _ad9361_swig.gain_control_f_agc_allow_agc_gain_increase_set)
__swig_setmethods__["f_agc_lp_thresh_increment_time"] = _ad9361_swig.gain_control_f_agc_lp_thresh_increment_time_set
__swig_getmethods__["f_agc_lp_thresh_increment_time"] = _ad9361_swig.gain_control_f_agc_lp_thresh_increment_time_get
if _newclass:
f_agc_lp_thresh_increment_time = _swig_property(_ad9361_swig.gain_control_f_agc_lp_thresh_increment_time_get, _ad9361_swig.gain_control_f_agc_lp_thresh_increment_time_set)
__swig_setmethods__["f_agc_lp_thresh_increment_steps"] = _ad9361_swig.gain_control_f_agc_lp_thresh_increment_steps_set
__swig_getmethods__["f_agc_lp_thresh_increment_steps"] = _ad9361_swig.gain_control_f_agc_lp_thresh_increment_steps_get
if _newclass:
f_agc_lp_thresh_increment_steps = _swig_property(_ad9361_swig.gain_control_f_agc_lp_thresh_increment_steps_get, _ad9361_swig.gain_control_f_agc_lp_thresh_increment_steps_set)
__swig_setmethods__["f_agc_lock_level"] = _ad9361_swig.gain_control_f_agc_lock_level_set
__swig_getmethods__["f_agc_lock_level"] = _ad9361_swig.gain_control_f_agc_lock_level_get
if _newclass:
f_agc_lock_level = _swig_property(_ad9361_swig.gain_control_f_agc_lock_level_get, _ad9361_swig.gain_control_f_agc_lock_level_set)
__swig_setmethods__["f_agc_lock_level_lmt_gain_increase_en"] = _ad9361_swig.gain_control_f_agc_lock_level_lmt_gain_increase_en_set
__swig_getmethods__["f_agc_lock_level_lmt_gain_increase_en"] = _ad9361_swig.gain_control_f_agc_lock_level_lmt_gain_increase_en_get
if _newclass:
f_agc_lock_level_lmt_gain_increase_en = _swig_property(_ad9361_swig.gain_control_f_agc_lock_level_lmt_gain_increase_en_get, _ad9361_swig.gain_control_f_agc_lock_level_lmt_gain_increase_en_set)
__swig_setmethods__["f_agc_lock_level_gain_increase_upper_limit"] = _ad9361_swig.gain_control_f_agc_lock_level_gain_increase_upper_limit_set
__swig_getmethods__["f_agc_lock_level_gain_increase_upper_limit"] = _ad9361_swig.gain_control_f_agc_lock_level_gain_increase_upper_limit_get
if _newclass:
f_agc_lock_level_gain_increase_upper_limit = _swig_property(_ad9361_swig.gain_control_f_agc_lock_level_gain_increase_upper_limit_get, _ad9361_swig.gain_control_f_agc_lock_level_gain_increase_upper_limit_set)
__swig_setmethods__["f_agc_lpf_final_settling_steps"] = _ad9361_swig.gain_control_f_agc_lpf_final_settling_steps_set
__swig_getmethods__["f_agc_lpf_final_settling_steps"] = _ad9361_swig.gain_control_f_agc_lpf_final_settling_steps_get
if _newclass:
f_agc_lpf_final_settling_steps = _swig_property(_ad9361_swig.gain_control_f_agc_lpf_final_settling_steps_get, _ad9361_swig.gain_control_f_agc_lpf_final_settling_steps_set)
__swig_setmethods__["f_agc_lmt_final_settling_steps"] = _ad9361_swig.gain_control_f_agc_lmt_final_settling_steps_set
__swig_getmethods__["f_agc_lmt_final_settling_steps"] = _ad9361_swig.gain_control_f_agc_lmt_final_settling_steps_get
if _newclass:
f_agc_lmt_final_settling_steps = _swig_property(_ad9361_swig.gain_control_f_agc_lmt_final_settling_steps_get, _ad9361_swig.gain_control_f_agc_lmt_final_settling_steps_set)
__swig_setmethods__["f_agc_final_overrange_count"] = _ad9361_swig.gain_control_f_agc_final_overrange_count_set
__swig_getmethods__["f_agc_final_overrange_count"] = _ad9361_swig.gain_control_f_agc_final_overrange_count_get
if _newclass:
f_agc_final_overrange_count = _swig_property(_ad9361_swig.gain_control_f_agc_final_overrange_count_get, _ad9361_swig.gain_control_f_agc_final_overrange_count_set)
__swig_setmethods__["f_agc_gain_increase_after_gain_lock_en"] = _ad9361_swig.gain_control_f_agc_gain_increase_after_gain_lock_en_set
__swig_getmethods__["f_agc_gain_increase_after_gain_lock_en"] = _ad9361_swig.gain_control_f_agc_gain_increase_after_gain_lock_en_get
if _newclass:
f_agc_gain_increase_after_gain_lock_en = _swig_property(_ad9361_swig.gain_control_f_agc_gain_increase_after_gain_lock_en_get, _ad9361_swig.gain_control_f_agc_gain_increase_after_gain_lock_en_set)
__swig_setmethods__["f_agc_gain_index_type_after_exit_rx_mode"] = _ad9361_swig.gain_control_f_agc_gain_index_type_after_exit_rx_mode_set
__swig_getmethods__["f_agc_gain_index_type_after_exit_rx_mode"] = _ad9361_swig.gain_control_f_agc_gain_index_type_after_exit_rx_mode_get
if _newclass:
f_agc_gain_index_type_after_exit_rx_mode = _swig_property(_ad9361_swig.gain_control_f_agc_gain_index_type_after_exit_rx_mode_get, _ad9361_swig.gain_control_f_agc_gain_index_type_after_exit_rx_mode_set)
__swig_setmethods__["f_agc_use_last_lock_level_for_set_gain_en"] = _ad9361_swig.gain_control_f_agc_use_last_lock_level_for_set_gain_en_set
__swig_getmethods__["f_agc_use_last_lock_level_for_set_gain_en"] = _ad9361_swig.gain_control_f_agc_use_last_lock_level_for_set_gain_en_get
if _newclass:
f_agc_use_last_lock_level_for_set_gain_en = _swig_property(_ad9361_swig.gain_control_f_agc_use_last_lock_level_for_set_gain_en_get, _ad9361_swig.gain_control_f_agc_use_last_lock_level_for_set_gain_en_set)
__swig_setmethods__["f_agc_optimized_gain_offset"] = _ad9361_swig.gain_control_f_agc_optimized_gain_offset_set
__swig_getmethods__["f_agc_optimized_gain_offset"] = _ad9361_swig.gain_control_f_agc_optimized_gain_offset_get
if _newclass:
f_agc_optimized_gain_offset = _swig_property(_ad9361_swig.gain_control_f_agc_optimized_gain_offset_get, _ad9361_swig.gain_control_f_agc_optimized_gain_offset_set)
__swig_setmethods__["f_agc_rst_gla_stronger_sig_thresh_exceeded_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_stronger_sig_thresh_exceeded_en_set
__swig_getmethods__["f_agc_rst_gla_stronger_sig_thresh_exceeded_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_stronger_sig_thresh_exceeded_en_get
if _newclass:
f_agc_rst_gla_stronger_sig_thresh_exceeded_en = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_stronger_sig_thresh_exceeded_en_get, _ad9361_swig.gain_control_f_agc_rst_gla_stronger_sig_thresh_exceeded_en_set)
__swig_setmethods__["f_agc_rst_gla_stronger_sig_thresh_above_ll"] = _ad9361_swig.gain_control_f_agc_rst_gla_stronger_sig_thresh_above_ll_set
__swig_getmethods__["f_agc_rst_gla_stronger_sig_thresh_above_ll"] = _ad9361_swig.gain_control_f_agc_rst_gla_stronger_sig_thresh_above_ll_get
if _newclass:
f_agc_rst_gla_stronger_sig_thresh_above_ll = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_stronger_sig_thresh_above_ll_get, _ad9361_swig.gain_control_f_agc_rst_gla_stronger_sig_thresh_above_ll_set)
__swig_setmethods__["f_agc_rst_gla_engergy_lost_sig_thresh_exceeded_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_sig_thresh_exceeded_en_set
__swig_getmethods__["f_agc_rst_gla_engergy_lost_sig_thresh_exceeded_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_sig_thresh_exceeded_en_get
if _newclass:
f_agc_rst_gla_engergy_lost_sig_thresh_exceeded_en = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_sig_thresh_exceeded_en_get, _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_sig_thresh_exceeded_en_set)
__swig_setmethods__["f_agc_rst_gla_engergy_lost_goto_optim_gain_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_goto_optim_gain_en_set
__swig_getmethods__["f_agc_rst_gla_engergy_lost_goto_optim_gain_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_goto_optim_gain_en_get
if _newclass:
f_agc_rst_gla_engergy_lost_goto_optim_gain_en = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_goto_optim_gain_en_get, _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_goto_optim_gain_en_set)
__swig_setmethods__["f_agc_rst_gla_engergy_lost_sig_thresh_below_ll"] = _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_sig_thresh_below_ll_set
__swig_getmethods__["f_agc_rst_gla_engergy_lost_sig_thresh_below_ll"] = _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_sig_thresh_below_ll_get
if _newclass:
f_agc_rst_gla_engergy_lost_sig_thresh_below_ll = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_sig_thresh_below_ll_get, _ad9361_swig.gain_control_f_agc_rst_gla_engergy_lost_sig_thresh_below_ll_set)
__swig_setmethods__["f_agc_energy_lost_stronger_sig_gain_lock_exit_cnt"] = _ad9361_swig.gain_control_f_agc_energy_lost_stronger_sig_gain_lock_exit_cnt_set
__swig_getmethods__["f_agc_energy_lost_stronger_sig_gain_lock_exit_cnt"] = _ad9361_swig.gain_control_f_agc_energy_lost_stronger_sig_gain_lock_exit_cnt_get
if _newclass:
f_agc_energy_lost_stronger_sig_gain_lock_exit_cnt = _swig_property(_ad9361_swig.gain_control_f_agc_energy_lost_stronger_sig_gain_lock_exit_cnt_get, _ad9361_swig.gain_control_f_agc_energy_lost_stronger_sig_gain_lock_exit_cnt_set)
__swig_setmethods__["f_agc_rst_gla_large_adc_overload_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_large_adc_overload_en_set
__swig_getmethods__["f_agc_rst_gla_large_adc_overload_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_large_adc_overload_en_get
if _newclass:
f_agc_rst_gla_large_adc_overload_en = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_large_adc_overload_en_get, _ad9361_swig.gain_control_f_agc_rst_gla_large_adc_overload_en_set)
__swig_setmethods__["f_agc_rst_gla_large_lmt_overload_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_large_lmt_overload_en_set
__swig_getmethods__["f_agc_rst_gla_large_lmt_overload_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_large_lmt_overload_en_get
if _newclass:
f_agc_rst_gla_large_lmt_overload_en = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_large_lmt_overload_en_get, _ad9361_swig.gain_control_f_agc_rst_gla_large_lmt_overload_en_set)
__swig_setmethods__["f_agc_rst_gla_en_agc_pulled_high_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_en_agc_pulled_high_en_set
__swig_getmethods__["f_agc_rst_gla_en_agc_pulled_high_en"] = _ad9361_swig.gain_control_f_agc_rst_gla_en_agc_pulled_high_en_get
if _newclass:
f_agc_rst_gla_en_agc_pulled_high_en = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_en_agc_pulled_high_en_get, _ad9361_swig.gain_control_f_agc_rst_gla_en_agc_pulled_high_en_set)
__swig_setmethods__["f_agc_rst_gla_if_en_agc_pulled_high_mode"] = _ad9361_swig.gain_control_f_agc_rst_gla_if_en_agc_pulled_high_mode_set
__swig_getmethods__["f_agc_rst_gla_if_en_agc_pulled_high_mode"] = _ad9361_swig.gain_control_f_agc_rst_gla_if_en_agc_pulled_high_mode_get
if _newclass:
f_agc_rst_gla_if_en_agc_pulled_high_mode = _swig_property(_ad9361_swig.gain_control_f_agc_rst_gla_if_en_agc_pulled_high_mode_get, _ad9361_swig.gain_control_f_agc_rst_gla_if_en_agc_pulled_high_mode_set)
__swig_setmethods__["f_agc_power_measurement_duration_in_state5"] = _ad9361_swig.gain_control_f_agc_power_measurement_duration_in_state5_set
__swig_getmethods__["f_agc_power_measurement_duration_in_state5"] = _ad9361_swig.gain_control_f_agc_power_measurement_duration_in_state5_get
if _newclass:
f_agc_power_measurement_duration_in_state5 = _swig_property(_ad9361_swig.gain_control_f_agc_power_measurement_duration_in_state5_get, _ad9361_swig.gain_control_f_agc_power_measurement_duration_in_state5_set)
def __init__(self):
this = _ad9361_swig.new_gain_control()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_gain_control
__del__ = lambda self: None
gain_control_swigregister = _ad9361_swig.gain_control_swigregister
gain_control_swigregister(gain_control)
[docs]class auxdac_control(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, auxdac_control, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, auxdac_control, name)
__repr__ = _swig_repr
__swig_setmethods__["dac1_default_value"] = _ad9361_swig.auxdac_control_dac1_default_value_set
__swig_getmethods__["dac1_default_value"] = _ad9361_swig.auxdac_control_dac1_default_value_get
if _newclass:
dac1_default_value = _swig_property(_ad9361_swig.auxdac_control_dac1_default_value_get, _ad9361_swig.auxdac_control_dac1_default_value_set)
__swig_setmethods__["dac2_default_value"] = _ad9361_swig.auxdac_control_dac2_default_value_set
__swig_getmethods__["dac2_default_value"] = _ad9361_swig.auxdac_control_dac2_default_value_get
if _newclass:
dac2_default_value = _swig_property(_ad9361_swig.auxdac_control_dac2_default_value_get, _ad9361_swig.auxdac_control_dac2_default_value_set)
__swig_setmethods__["auxdac_manual_mode_en"] = _ad9361_swig.auxdac_control_auxdac_manual_mode_en_set
__swig_getmethods__["auxdac_manual_mode_en"] = _ad9361_swig.auxdac_control_auxdac_manual_mode_en_get
if _newclass:
auxdac_manual_mode_en = _swig_property(_ad9361_swig.auxdac_control_auxdac_manual_mode_en_get, _ad9361_swig.auxdac_control_auxdac_manual_mode_en_set)
__swig_setmethods__["dac1_in_rx_en"] = _ad9361_swig.auxdac_control_dac1_in_rx_en_set
__swig_getmethods__["dac1_in_rx_en"] = _ad9361_swig.auxdac_control_dac1_in_rx_en_get
if _newclass:
dac1_in_rx_en = _swig_property(_ad9361_swig.auxdac_control_dac1_in_rx_en_get, _ad9361_swig.auxdac_control_dac1_in_rx_en_set)
__swig_setmethods__["dac1_in_tx_en"] = _ad9361_swig.auxdac_control_dac1_in_tx_en_set
__swig_getmethods__["dac1_in_tx_en"] = _ad9361_swig.auxdac_control_dac1_in_tx_en_get
if _newclass:
dac1_in_tx_en = _swig_property(_ad9361_swig.auxdac_control_dac1_in_tx_en_get, _ad9361_swig.auxdac_control_dac1_in_tx_en_set)
__swig_setmethods__["dac1_in_alert_en"] = _ad9361_swig.auxdac_control_dac1_in_alert_en_set
__swig_getmethods__["dac1_in_alert_en"] = _ad9361_swig.auxdac_control_dac1_in_alert_en_get
if _newclass:
dac1_in_alert_en = _swig_property(_ad9361_swig.auxdac_control_dac1_in_alert_en_get, _ad9361_swig.auxdac_control_dac1_in_alert_en_set)
__swig_setmethods__["dac2_in_rx_en"] = _ad9361_swig.auxdac_control_dac2_in_rx_en_set
__swig_getmethods__["dac2_in_rx_en"] = _ad9361_swig.auxdac_control_dac2_in_rx_en_get
if _newclass:
dac2_in_rx_en = _swig_property(_ad9361_swig.auxdac_control_dac2_in_rx_en_get, _ad9361_swig.auxdac_control_dac2_in_rx_en_set)
__swig_setmethods__["dac2_in_tx_en"] = _ad9361_swig.auxdac_control_dac2_in_tx_en_set
__swig_getmethods__["dac2_in_tx_en"] = _ad9361_swig.auxdac_control_dac2_in_tx_en_get
if _newclass:
dac2_in_tx_en = _swig_property(_ad9361_swig.auxdac_control_dac2_in_tx_en_get, _ad9361_swig.auxdac_control_dac2_in_tx_en_set)
__swig_setmethods__["dac2_in_alert_en"] = _ad9361_swig.auxdac_control_dac2_in_alert_en_set
__swig_getmethods__["dac2_in_alert_en"] = _ad9361_swig.auxdac_control_dac2_in_alert_en_get
if _newclass:
dac2_in_alert_en = _swig_property(_ad9361_swig.auxdac_control_dac2_in_alert_en_get, _ad9361_swig.auxdac_control_dac2_in_alert_en_set)
__swig_setmethods__["dac1_rx_delay_us"] = _ad9361_swig.auxdac_control_dac1_rx_delay_us_set
__swig_getmethods__["dac1_rx_delay_us"] = _ad9361_swig.auxdac_control_dac1_rx_delay_us_get
if _newclass:
dac1_rx_delay_us = _swig_property(_ad9361_swig.auxdac_control_dac1_rx_delay_us_get, _ad9361_swig.auxdac_control_dac1_rx_delay_us_set)
__swig_setmethods__["dac1_tx_delay_us"] = _ad9361_swig.auxdac_control_dac1_tx_delay_us_set
__swig_getmethods__["dac1_tx_delay_us"] = _ad9361_swig.auxdac_control_dac1_tx_delay_us_get
if _newclass:
dac1_tx_delay_us = _swig_property(_ad9361_swig.auxdac_control_dac1_tx_delay_us_get, _ad9361_swig.auxdac_control_dac1_tx_delay_us_set)
__swig_setmethods__["dac2_rx_delay_us"] = _ad9361_swig.auxdac_control_dac2_rx_delay_us_set
__swig_getmethods__["dac2_rx_delay_us"] = _ad9361_swig.auxdac_control_dac2_rx_delay_us_get
if _newclass:
dac2_rx_delay_us = _swig_property(_ad9361_swig.auxdac_control_dac2_rx_delay_us_get, _ad9361_swig.auxdac_control_dac2_rx_delay_us_set)
__swig_setmethods__["dac2_tx_delay_us"] = _ad9361_swig.auxdac_control_dac2_tx_delay_us_set
__swig_getmethods__["dac2_tx_delay_us"] = _ad9361_swig.auxdac_control_dac2_tx_delay_us_get
if _newclass:
dac2_tx_delay_us = _swig_property(_ad9361_swig.auxdac_control_dac2_tx_delay_us_get, _ad9361_swig.auxdac_control_dac2_tx_delay_us_set)
def __init__(self):
this = _ad9361_swig.new_auxdac_control()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_auxdac_control
__del__ = lambda self: None
auxdac_control_swigregister = _ad9361_swig.auxdac_control_swigregister
auxdac_control_swigregister(auxdac_control)
_ad9361_swig.AGC_IN_FAST_ATTACK_MODE_LOCKS_THE_GAIN_swigconstant(_ad9361_swig)
AGC_IN_FAST_ATTACK_MODE_LOCKS_THE_GAIN = _ad9361_swig.AGC_IN_FAST_ATTACK_MODE_LOCKS_THE_GAIN
_ad9361_swig.EN_AGC_PIN_IS_PULLED_HIGH_swigconstant(_ad9361_swig)
EN_AGC_PIN_IS_PULLED_HIGH = _ad9361_swig.EN_AGC_PIN_IS_PULLED_HIGH
_ad9361_swig.ENTERS_RX_MODE_swigconstant(_ad9361_swig)
ENTERS_RX_MODE = _ad9361_swig.ENTERS_RX_MODE
_ad9361_swig.GAIN_CHANGE_OCCURS_swigconstant(_ad9361_swig)
GAIN_CHANGE_OCCURS = _ad9361_swig.GAIN_CHANGE_OCCURS
_ad9361_swig.SPI_WRITE_TO_REGISTER_swigconstant(_ad9361_swig)
SPI_WRITE_TO_REGISTER = _ad9361_swig.SPI_WRITE_TO_REGISTER
_ad9361_swig.GAIN_CHANGE_OCCURS_OR_EN_AGC_PIN_PULLED_HIGH_swigconstant(_ad9361_swig)
GAIN_CHANGE_OCCURS_OR_EN_AGC_PIN_PULLED_HIGH = _ad9361_swig.GAIN_CHANGE_OCCURS_OR_EN_AGC_PIN_PULLED_HIGH
rssi_control_swigregister = _ad9361_swig.rssi_control_swigregister
rssi_control_swigregister(rssi_control)
[docs]class rx_gain_info(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, rx_gain_info, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, rx_gain_info, name)
__repr__ = _swig_repr
__swig_setmethods__["tbl_type"] = _ad9361_swig.rx_gain_info_tbl_type_set
__swig_getmethods__["tbl_type"] = _ad9361_swig.rx_gain_info_tbl_type_get
if _newclass:
tbl_type = _swig_property(_ad9361_swig.rx_gain_info_tbl_type_get, _ad9361_swig.rx_gain_info_tbl_type_set)
__swig_setmethods__["starting_gain_db"] = _ad9361_swig.rx_gain_info_starting_gain_db_set
__swig_getmethods__["starting_gain_db"] = _ad9361_swig.rx_gain_info_starting_gain_db_get
if _newclass:
starting_gain_db = _swig_property(_ad9361_swig.rx_gain_info_starting_gain_db_get, _ad9361_swig.rx_gain_info_starting_gain_db_set)
__swig_setmethods__["max_gain_db"] = _ad9361_swig.rx_gain_info_max_gain_db_set
__swig_getmethods__["max_gain_db"] = _ad9361_swig.rx_gain_info_max_gain_db_get
if _newclass:
max_gain_db = _swig_property(_ad9361_swig.rx_gain_info_max_gain_db_get, _ad9361_swig.rx_gain_info_max_gain_db_set)
__swig_setmethods__["gain_step_db"] = _ad9361_swig.rx_gain_info_gain_step_db_set
__swig_getmethods__["gain_step_db"] = _ad9361_swig.rx_gain_info_gain_step_db_get
if _newclass:
gain_step_db = _swig_property(_ad9361_swig.rx_gain_info_gain_step_db_get, _ad9361_swig.rx_gain_info_gain_step_db_set)
__swig_setmethods__["max_idx"] = _ad9361_swig.rx_gain_info_max_idx_set
__swig_getmethods__["max_idx"] = _ad9361_swig.rx_gain_info_max_idx_get
if _newclass:
max_idx = _swig_property(_ad9361_swig.rx_gain_info_max_idx_get, _ad9361_swig.rx_gain_info_max_idx_set)
__swig_setmethods__["idx_step_offset"] = _ad9361_swig.rx_gain_info_idx_step_offset_set
__swig_getmethods__["idx_step_offset"] = _ad9361_swig.rx_gain_info_idx_step_offset_get
if _newclass:
idx_step_offset = _swig_property(_ad9361_swig.rx_gain_info_idx_step_offset_get, _ad9361_swig.rx_gain_info_idx_step_offset_set)
def __init__(self):
this = _ad9361_swig.new_rx_gain_info()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_rx_gain_info
__del__ = lambda self: None
rx_gain_info_swigregister = _ad9361_swig.rx_gain_info_swigregister
rx_gain_info_swigregister(rx_gain_info)
[docs]class port_control(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, port_control, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, port_control, name)
__repr__ = _swig_repr
__swig_setmethods__["pp_conf"] = _ad9361_swig.port_control_pp_conf_set
__swig_getmethods__["pp_conf"] = _ad9361_swig.port_control_pp_conf_get
if _newclass:
pp_conf = _swig_property(_ad9361_swig.port_control_pp_conf_get, _ad9361_swig.port_control_pp_conf_set)
__swig_setmethods__["rx_clk_data_delay"] = _ad9361_swig.port_control_rx_clk_data_delay_set
__swig_getmethods__["rx_clk_data_delay"] = _ad9361_swig.port_control_rx_clk_data_delay_get
if _newclass:
rx_clk_data_delay = _swig_property(_ad9361_swig.port_control_rx_clk_data_delay_get, _ad9361_swig.port_control_rx_clk_data_delay_set)
__swig_setmethods__["tx_clk_data_delay"] = _ad9361_swig.port_control_tx_clk_data_delay_set
__swig_getmethods__["tx_clk_data_delay"] = _ad9361_swig.port_control_tx_clk_data_delay_get
if _newclass:
tx_clk_data_delay = _swig_property(_ad9361_swig.port_control_tx_clk_data_delay_get, _ad9361_swig.port_control_tx_clk_data_delay_set)
__swig_setmethods__["digital_io_ctrl"] = _ad9361_swig.port_control_digital_io_ctrl_set
__swig_getmethods__["digital_io_ctrl"] = _ad9361_swig.port_control_digital_io_ctrl_get
if _newclass:
digital_io_ctrl = _swig_property(_ad9361_swig.port_control_digital_io_ctrl_get, _ad9361_swig.port_control_digital_io_ctrl_set)
__swig_setmethods__["lvds_bias_ctrl"] = _ad9361_swig.port_control_lvds_bias_ctrl_set
__swig_getmethods__["lvds_bias_ctrl"] = _ad9361_swig.port_control_lvds_bias_ctrl_get
if _newclass:
lvds_bias_ctrl = _swig_property(_ad9361_swig.port_control_lvds_bias_ctrl_get, _ad9361_swig.port_control_lvds_bias_ctrl_set)
__swig_setmethods__["lvds_invert"] = _ad9361_swig.port_control_lvds_invert_set
__swig_getmethods__["lvds_invert"] = _ad9361_swig.port_control_lvds_invert_get
if _newclass:
lvds_invert = _swig_property(_ad9361_swig.port_control_lvds_invert_get, _ad9361_swig.port_control_lvds_invert_set)
def __init__(self):
this = _ad9361_swig.new_port_control()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_port_control
__del__ = lambda self: None
port_control_swigregister = _ad9361_swig.port_control_swigregister
port_control_swigregister(port_control)
[docs]class ctrl_outs_control(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, ctrl_outs_control, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, ctrl_outs_control, name)
__repr__ = _swig_repr
__swig_setmethods__["index"] = _ad9361_swig.ctrl_outs_control_index_set
__swig_getmethods__["index"] = _ad9361_swig.ctrl_outs_control_index_get
if _newclass:
index = _swig_property(_ad9361_swig.ctrl_outs_control_index_get, _ad9361_swig.ctrl_outs_control_index_set)
__swig_setmethods__["en_mask"] = _ad9361_swig.ctrl_outs_control_en_mask_set
__swig_getmethods__["en_mask"] = _ad9361_swig.ctrl_outs_control_en_mask_get
if _newclass:
en_mask = _swig_property(_ad9361_swig.ctrl_outs_control_en_mask_get, _ad9361_swig.ctrl_outs_control_en_mask_set)
def __init__(self):
this = _ad9361_swig.new_ctrl_outs_control()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_ctrl_outs_control
__del__ = lambda self: None
ctrl_outs_control_swigregister = _ad9361_swig.ctrl_outs_control_swigregister
ctrl_outs_control_swigregister(ctrl_outs_control)
[docs]class elna_control(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, elna_control, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, elna_control, name)
__repr__ = _swig_repr
__swig_setmethods__["gain_mdB"] = _ad9361_swig.elna_control_gain_mdB_set
__swig_getmethods__["gain_mdB"] = _ad9361_swig.elna_control_gain_mdB_get
if _newclass:
gain_mdB = _swig_property(_ad9361_swig.elna_control_gain_mdB_get, _ad9361_swig.elna_control_gain_mdB_set)
__swig_setmethods__["bypass_loss_mdB"] = _ad9361_swig.elna_control_bypass_loss_mdB_set
__swig_getmethods__["bypass_loss_mdB"] = _ad9361_swig.elna_control_bypass_loss_mdB_get
if _newclass:
bypass_loss_mdB = _swig_property(_ad9361_swig.elna_control_bypass_loss_mdB_get, _ad9361_swig.elna_control_bypass_loss_mdB_set)
__swig_setmethods__["settling_delay_ns"] = _ad9361_swig.elna_control_settling_delay_ns_set
__swig_getmethods__["settling_delay_ns"] = _ad9361_swig.elna_control_settling_delay_ns_get
if _newclass:
settling_delay_ns = _swig_property(_ad9361_swig.elna_control_settling_delay_ns_get, _ad9361_swig.elna_control_settling_delay_ns_set)
__swig_setmethods__["elna_1_control_en"] = _ad9361_swig.elna_control_elna_1_control_en_set
__swig_getmethods__["elna_1_control_en"] = _ad9361_swig.elna_control_elna_1_control_en_get
if _newclass:
elna_1_control_en = _swig_property(_ad9361_swig.elna_control_elna_1_control_en_get, _ad9361_swig.elna_control_elna_1_control_en_set)
__swig_setmethods__["elna_2_control_en"] = _ad9361_swig.elna_control_elna_2_control_en_set
__swig_getmethods__["elna_2_control_en"] = _ad9361_swig.elna_control_elna_2_control_en_get
if _newclass:
elna_2_control_en = _swig_property(_ad9361_swig.elna_control_elna_2_control_en_get, _ad9361_swig.elna_control_elna_2_control_en_set)
__swig_setmethods__["elna_in_gaintable_all_index_en"] = _ad9361_swig.elna_control_elna_in_gaintable_all_index_en_set
__swig_getmethods__["elna_in_gaintable_all_index_en"] = _ad9361_swig.elna_control_elna_in_gaintable_all_index_en_get
if _newclass:
elna_in_gaintable_all_index_en = _swig_property(_ad9361_swig.elna_control_elna_in_gaintable_all_index_en_get, _ad9361_swig.elna_control_elna_in_gaintable_all_index_en_set)
def __init__(self):
this = _ad9361_swig.new_elna_control()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_elna_control
__del__ = lambda self: None
elna_control_swigregister = _ad9361_swig.elna_control_swigregister
elna_control_swigregister(elna_control)
[docs]class auxadc_control(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, auxadc_control, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, auxadc_control, name)
__repr__ = _swig_repr
__swig_setmethods__["offset"] = _ad9361_swig.auxadc_control_offset_set
__swig_getmethods__["offset"] = _ad9361_swig.auxadc_control_offset_get
if _newclass:
offset = _swig_property(_ad9361_swig.auxadc_control_offset_get, _ad9361_swig.auxadc_control_offset_set)
__swig_setmethods__["temp_time_inteval_ms"] = _ad9361_swig.auxadc_control_temp_time_inteval_ms_set
__swig_getmethods__["temp_time_inteval_ms"] = _ad9361_swig.auxadc_control_temp_time_inteval_ms_get
if _newclass:
temp_time_inteval_ms = _swig_property(_ad9361_swig.auxadc_control_temp_time_inteval_ms_get, _ad9361_swig.auxadc_control_temp_time_inteval_ms_set)
__swig_setmethods__["temp_sensor_decimation"] = _ad9361_swig.auxadc_control_temp_sensor_decimation_set
__swig_getmethods__["temp_sensor_decimation"] = _ad9361_swig.auxadc_control_temp_sensor_decimation_get
if _newclass:
temp_sensor_decimation = _swig_property(_ad9361_swig.auxadc_control_temp_sensor_decimation_get, _ad9361_swig.auxadc_control_temp_sensor_decimation_set)
__swig_setmethods__["periodic_temp_measuremnt"] = _ad9361_swig.auxadc_control_periodic_temp_measuremnt_set
__swig_getmethods__["periodic_temp_measuremnt"] = _ad9361_swig.auxadc_control_periodic_temp_measuremnt_get
if _newclass:
periodic_temp_measuremnt = _swig_property(_ad9361_swig.auxadc_control_periodic_temp_measuremnt_get, _ad9361_swig.auxadc_control_periodic_temp_measuremnt_set)
__swig_setmethods__["auxadc_clock_rate"] = _ad9361_swig.auxadc_control_auxadc_clock_rate_set
__swig_getmethods__["auxadc_clock_rate"] = _ad9361_swig.auxadc_control_auxadc_clock_rate_get
if _newclass:
auxadc_clock_rate = _swig_property(_ad9361_swig.auxadc_control_auxadc_clock_rate_get, _ad9361_swig.auxadc_control_auxadc_clock_rate_set)
__swig_setmethods__["auxadc_decimation"] = _ad9361_swig.auxadc_control_auxadc_decimation_set
__swig_getmethods__["auxadc_decimation"] = _ad9361_swig.auxadc_control_auxadc_decimation_get
if _newclass:
auxadc_decimation = _swig_property(_ad9361_swig.auxadc_control_auxadc_decimation_get, _ad9361_swig.auxadc_control_auxadc_decimation_set)
def __init__(self):
this = _ad9361_swig.new_auxadc_control()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_auxadc_control
__del__ = lambda self: None
auxadc_control_swigregister = _ad9361_swig.auxadc_control_swigregister
auxadc_control_swigregister(auxadc_control)
[docs]class gpo_control(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, gpo_control, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, gpo_control, name)
__repr__ = _swig_repr
__swig_setmethods__["gpo0_inactive_state_high_en"] = _ad9361_swig.gpo_control_gpo0_inactive_state_high_en_set
__swig_getmethods__["gpo0_inactive_state_high_en"] = _ad9361_swig.gpo_control_gpo0_inactive_state_high_en_get
if _newclass:
gpo0_inactive_state_high_en = _swig_property(_ad9361_swig.gpo_control_gpo0_inactive_state_high_en_get, _ad9361_swig.gpo_control_gpo0_inactive_state_high_en_set)
__swig_setmethods__["gpo1_inactive_state_high_en"] = _ad9361_swig.gpo_control_gpo1_inactive_state_high_en_set
__swig_getmethods__["gpo1_inactive_state_high_en"] = _ad9361_swig.gpo_control_gpo1_inactive_state_high_en_get
if _newclass:
gpo1_inactive_state_high_en = _swig_property(_ad9361_swig.gpo_control_gpo1_inactive_state_high_en_get, _ad9361_swig.gpo_control_gpo1_inactive_state_high_en_set)
__swig_setmethods__["gpo2_inactive_state_high_en"] = _ad9361_swig.gpo_control_gpo2_inactive_state_high_en_set
__swig_getmethods__["gpo2_inactive_state_high_en"] = _ad9361_swig.gpo_control_gpo2_inactive_state_high_en_get
if _newclass:
gpo2_inactive_state_high_en = _swig_property(_ad9361_swig.gpo_control_gpo2_inactive_state_high_en_get, _ad9361_swig.gpo_control_gpo2_inactive_state_high_en_set)
__swig_setmethods__["gpo3_inactive_state_high_en"] = _ad9361_swig.gpo_control_gpo3_inactive_state_high_en_set
__swig_getmethods__["gpo3_inactive_state_high_en"] = _ad9361_swig.gpo_control_gpo3_inactive_state_high_en_get
if _newclass:
gpo3_inactive_state_high_en = _swig_property(_ad9361_swig.gpo_control_gpo3_inactive_state_high_en_get, _ad9361_swig.gpo_control_gpo3_inactive_state_high_en_set)
__swig_setmethods__["gpo0_slave_rx_en"] = _ad9361_swig.gpo_control_gpo0_slave_rx_en_set
__swig_getmethods__["gpo0_slave_rx_en"] = _ad9361_swig.gpo_control_gpo0_slave_rx_en_get
if _newclass:
gpo0_slave_rx_en = _swig_property(_ad9361_swig.gpo_control_gpo0_slave_rx_en_get, _ad9361_swig.gpo_control_gpo0_slave_rx_en_set)
__swig_setmethods__["gpo0_slave_tx_en"] = _ad9361_swig.gpo_control_gpo0_slave_tx_en_set
__swig_getmethods__["gpo0_slave_tx_en"] = _ad9361_swig.gpo_control_gpo0_slave_tx_en_get
if _newclass:
gpo0_slave_tx_en = _swig_property(_ad9361_swig.gpo_control_gpo0_slave_tx_en_get, _ad9361_swig.gpo_control_gpo0_slave_tx_en_set)
__swig_setmethods__["gpo1_slave_rx_en"] = _ad9361_swig.gpo_control_gpo1_slave_rx_en_set
__swig_getmethods__["gpo1_slave_rx_en"] = _ad9361_swig.gpo_control_gpo1_slave_rx_en_get
if _newclass:
gpo1_slave_rx_en = _swig_property(_ad9361_swig.gpo_control_gpo1_slave_rx_en_get, _ad9361_swig.gpo_control_gpo1_slave_rx_en_set)
__swig_setmethods__["gpo1_slave_tx_en"] = _ad9361_swig.gpo_control_gpo1_slave_tx_en_set
__swig_getmethods__["gpo1_slave_tx_en"] = _ad9361_swig.gpo_control_gpo1_slave_tx_en_get
if _newclass:
gpo1_slave_tx_en = _swig_property(_ad9361_swig.gpo_control_gpo1_slave_tx_en_get, _ad9361_swig.gpo_control_gpo1_slave_tx_en_set)
__swig_setmethods__["gpo2_slave_rx_en"] = _ad9361_swig.gpo_control_gpo2_slave_rx_en_set
__swig_getmethods__["gpo2_slave_rx_en"] = _ad9361_swig.gpo_control_gpo2_slave_rx_en_get
if _newclass:
gpo2_slave_rx_en = _swig_property(_ad9361_swig.gpo_control_gpo2_slave_rx_en_get, _ad9361_swig.gpo_control_gpo2_slave_rx_en_set)
__swig_setmethods__["gpo2_slave_tx_en"] = _ad9361_swig.gpo_control_gpo2_slave_tx_en_set
__swig_getmethods__["gpo2_slave_tx_en"] = _ad9361_swig.gpo_control_gpo2_slave_tx_en_get
if _newclass:
gpo2_slave_tx_en = _swig_property(_ad9361_swig.gpo_control_gpo2_slave_tx_en_get, _ad9361_swig.gpo_control_gpo2_slave_tx_en_set)
__swig_setmethods__["gpo3_slave_rx_en"] = _ad9361_swig.gpo_control_gpo3_slave_rx_en_set
__swig_getmethods__["gpo3_slave_rx_en"] = _ad9361_swig.gpo_control_gpo3_slave_rx_en_get
if _newclass:
gpo3_slave_rx_en = _swig_property(_ad9361_swig.gpo_control_gpo3_slave_rx_en_get, _ad9361_swig.gpo_control_gpo3_slave_rx_en_set)
__swig_setmethods__["gpo3_slave_tx_en"] = _ad9361_swig.gpo_control_gpo3_slave_tx_en_set
__swig_getmethods__["gpo3_slave_tx_en"] = _ad9361_swig.gpo_control_gpo3_slave_tx_en_get
if _newclass:
gpo3_slave_tx_en = _swig_property(_ad9361_swig.gpo_control_gpo3_slave_tx_en_get, _ad9361_swig.gpo_control_gpo3_slave_tx_en_set)
__swig_setmethods__["gpo0_rx_delay_us"] = _ad9361_swig.gpo_control_gpo0_rx_delay_us_set
__swig_getmethods__["gpo0_rx_delay_us"] = _ad9361_swig.gpo_control_gpo0_rx_delay_us_get
if _newclass:
gpo0_rx_delay_us = _swig_property(_ad9361_swig.gpo_control_gpo0_rx_delay_us_get, _ad9361_swig.gpo_control_gpo0_rx_delay_us_set)
__swig_setmethods__["gpo0_tx_delay_us"] = _ad9361_swig.gpo_control_gpo0_tx_delay_us_set
__swig_getmethods__["gpo0_tx_delay_us"] = _ad9361_swig.gpo_control_gpo0_tx_delay_us_get
if _newclass:
gpo0_tx_delay_us = _swig_property(_ad9361_swig.gpo_control_gpo0_tx_delay_us_get, _ad9361_swig.gpo_control_gpo0_tx_delay_us_set)
__swig_setmethods__["gpo1_rx_delay_us"] = _ad9361_swig.gpo_control_gpo1_rx_delay_us_set
__swig_getmethods__["gpo1_rx_delay_us"] = _ad9361_swig.gpo_control_gpo1_rx_delay_us_get
if _newclass:
gpo1_rx_delay_us = _swig_property(_ad9361_swig.gpo_control_gpo1_rx_delay_us_get, _ad9361_swig.gpo_control_gpo1_rx_delay_us_set)
__swig_setmethods__["gpo1_tx_delay_us"] = _ad9361_swig.gpo_control_gpo1_tx_delay_us_set
__swig_getmethods__["gpo1_tx_delay_us"] = _ad9361_swig.gpo_control_gpo1_tx_delay_us_get
if _newclass:
gpo1_tx_delay_us = _swig_property(_ad9361_swig.gpo_control_gpo1_tx_delay_us_get, _ad9361_swig.gpo_control_gpo1_tx_delay_us_set)
__swig_setmethods__["gpo2_rx_delay_us"] = _ad9361_swig.gpo_control_gpo2_rx_delay_us_set
__swig_getmethods__["gpo2_rx_delay_us"] = _ad9361_swig.gpo_control_gpo2_rx_delay_us_get
if _newclass:
gpo2_rx_delay_us = _swig_property(_ad9361_swig.gpo_control_gpo2_rx_delay_us_get, _ad9361_swig.gpo_control_gpo2_rx_delay_us_set)
__swig_setmethods__["gpo2_tx_delay_us"] = _ad9361_swig.gpo_control_gpo2_tx_delay_us_set
__swig_getmethods__["gpo2_tx_delay_us"] = _ad9361_swig.gpo_control_gpo2_tx_delay_us_get
if _newclass:
gpo2_tx_delay_us = _swig_property(_ad9361_swig.gpo_control_gpo2_tx_delay_us_get, _ad9361_swig.gpo_control_gpo2_tx_delay_us_set)
__swig_setmethods__["gpo3_rx_delay_us"] = _ad9361_swig.gpo_control_gpo3_rx_delay_us_set
__swig_getmethods__["gpo3_rx_delay_us"] = _ad9361_swig.gpo_control_gpo3_rx_delay_us_get
if _newclass:
gpo3_rx_delay_us = _swig_property(_ad9361_swig.gpo_control_gpo3_rx_delay_us_get, _ad9361_swig.gpo_control_gpo3_rx_delay_us_set)
__swig_setmethods__["gpo3_tx_delay_us"] = _ad9361_swig.gpo_control_gpo3_tx_delay_us_set
__swig_getmethods__["gpo3_tx_delay_us"] = _ad9361_swig.gpo_control_gpo3_tx_delay_us_get
if _newclass:
gpo3_tx_delay_us = _swig_property(_ad9361_swig.gpo_control_gpo3_tx_delay_us_get, _ad9361_swig.gpo_control_gpo3_tx_delay_us_set)
def __init__(self):
this = _ad9361_swig.new_gpo_control()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_gpo_control
__del__ = lambda self: None
gpo_control_swigregister = _ad9361_swig.gpo_control_swigregister
gpo_control_swigregister(gpo_control)
[docs]class tx_monitor_control(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, tx_monitor_control, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, tx_monitor_control, name)
__repr__ = _swig_repr
__swig_setmethods__["tx_mon_track_en"] = _ad9361_swig.tx_monitor_control_tx_mon_track_en_set
__swig_getmethods__["tx_mon_track_en"] = _ad9361_swig.tx_monitor_control_tx_mon_track_en_get
if _newclass:
tx_mon_track_en = _swig_property(_ad9361_swig.tx_monitor_control_tx_mon_track_en_get, _ad9361_swig.tx_monitor_control_tx_mon_track_en_set)
__swig_setmethods__["one_shot_mode_en"] = _ad9361_swig.tx_monitor_control_one_shot_mode_en_set
__swig_getmethods__["one_shot_mode_en"] = _ad9361_swig.tx_monitor_control_one_shot_mode_en_get
if _newclass:
one_shot_mode_en = _swig_property(_ad9361_swig.tx_monitor_control_one_shot_mode_en_get, _ad9361_swig.tx_monitor_control_one_shot_mode_en_set)
__swig_setmethods__["low_high_gain_threshold_mdB"] = _ad9361_swig.tx_monitor_control_low_high_gain_threshold_mdB_set
__swig_getmethods__["low_high_gain_threshold_mdB"] = _ad9361_swig.tx_monitor_control_low_high_gain_threshold_mdB_get
if _newclass:
low_high_gain_threshold_mdB = _swig_property(_ad9361_swig.tx_monitor_control_low_high_gain_threshold_mdB_get, _ad9361_swig.tx_monitor_control_low_high_gain_threshold_mdB_set)
__swig_setmethods__["low_gain_dB"] = _ad9361_swig.tx_monitor_control_low_gain_dB_set
__swig_getmethods__["low_gain_dB"] = _ad9361_swig.tx_monitor_control_low_gain_dB_get
if _newclass:
low_gain_dB = _swig_property(_ad9361_swig.tx_monitor_control_low_gain_dB_get, _ad9361_swig.tx_monitor_control_low_gain_dB_set)
__swig_setmethods__["high_gain_dB"] = _ad9361_swig.tx_monitor_control_high_gain_dB_set
__swig_getmethods__["high_gain_dB"] = _ad9361_swig.tx_monitor_control_high_gain_dB_get
if _newclass:
high_gain_dB = _swig_property(_ad9361_swig.tx_monitor_control_high_gain_dB_get, _ad9361_swig.tx_monitor_control_high_gain_dB_set)
__swig_setmethods__["tx_mon_delay"] = _ad9361_swig.tx_monitor_control_tx_mon_delay_set
__swig_getmethods__["tx_mon_delay"] = _ad9361_swig.tx_monitor_control_tx_mon_delay_get
if _newclass:
tx_mon_delay = _swig_property(_ad9361_swig.tx_monitor_control_tx_mon_delay_get, _ad9361_swig.tx_monitor_control_tx_mon_delay_set)
__swig_setmethods__["tx_mon_duration"] = _ad9361_swig.tx_monitor_control_tx_mon_duration_set
__swig_getmethods__["tx_mon_duration"] = _ad9361_swig.tx_monitor_control_tx_mon_duration_get
if _newclass:
tx_mon_duration = _swig_property(_ad9361_swig.tx_monitor_control_tx_mon_duration_get, _ad9361_swig.tx_monitor_control_tx_mon_duration_set)
__swig_setmethods__["tx1_mon_front_end_gain"] = _ad9361_swig.tx_monitor_control_tx1_mon_front_end_gain_set
__swig_getmethods__["tx1_mon_front_end_gain"] = _ad9361_swig.tx_monitor_control_tx1_mon_front_end_gain_get
if _newclass:
tx1_mon_front_end_gain = _swig_property(_ad9361_swig.tx_monitor_control_tx1_mon_front_end_gain_get, _ad9361_swig.tx_monitor_control_tx1_mon_front_end_gain_set)
__swig_setmethods__["tx2_mon_front_end_gain"] = _ad9361_swig.tx_monitor_control_tx2_mon_front_end_gain_set
__swig_getmethods__["tx2_mon_front_end_gain"] = _ad9361_swig.tx_monitor_control_tx2_mon_front_end_gain_get
if _newclass:
tx2_mon_front_end_gain = _swig_property(_ad9361_swig.tx_monitor_control_tx2_mon_front_end_gain_get, _ad9361_swig.tx_monitor_control_tx2_mon_front_end_gain_set)
__swig_setmethods__["tx1_mon_lo_cm"] = _ad9361_swig.tx_monitor_control_tx1_mon_lo_cm_set
__swig_getmethods__["tx1_mon_lo_cm"] = _ad9361_swig.tx_monitor_control_tx1_mon_lo_cm_get
if _newclass:
tx1_mon_lo_cm = _swig_property(_ad9361_swig.tx_monitor_control_tx1_mon_lo_cm_get, _ad9361_swig.tx_monitor_control_tx1_mon_lo_cm_set)
__swig_setmethods__["tx2_mon_lo_cm"] = _ad9361_swig.tx_monitor_control_tx2_mon_lo_cm_set
__swig_getmethods__["tx2_mon_lo_cm"] = _ad9361_swig.tx_monitor_control_tx2_mon_lo_cm_get
if _newclass:
tx2_mon_lo_cm = _swig_property(_ad9361_swig.tx_monitor_control_tx2_mon_lo_cm_get, _ad9361_swig.tx_monitor_control_tx2_mon_lo_cm_set)
def __init__(self):
this = _ad9361_swig.new_tx_monitor_control()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_tx_monitor_control
__del__ = lambda self: None
tx_monitor_control_swigregister = _ad9361_swig.tx_monitor_control_swigregister
tx_monitor_control_swigregister(tx_monitor_control)
_ad9361_swig.BBPLL_FREQ_swigconstant(_ad9361_swig)
BBPLL_FREQ = _ad9361_swig.BBPLL_FREQ
_ad9361_swig.ADC_FREQ_swigconstant(_ad9361_swig)
ADC_FREQ = _ad9361_swig.ADC_FREQ
_ad9361_swig.R2_FREQ_swigconstant(_ad9361_swig)
R2_FREQ = _ad9361_swig.R2_FREQ
_ad9361_swig.R1_FREQ_swigconstant(_ad9361_swig)
R1_FREQ = _ad9361_swig.R1_FREQ
_ad9361_swig.CLKRF_FREQ_swigconstant(_ad9361_swig)
CLKRF_FREQ = _ad9361_swig.CLKRF_FREQ
_ad9361_swig.RX_SAMPL_FREQ_swigconstant(_ad9361_swig)
RX_SAMPL_FREQ = _ad9361_swig.RX_SAMPL_FREQ
_ad9361_swig.NUM_RX_CLOCKS_swigconstant(_ad9361_swig)
NUM_RX_CLOCKS = _ad9361_swig.NUM_RX_CLOCKS
_ad9361_swig.IGNORE_swigconstant(_ad9361_swig)
IGNORE = _ad9361_swig.IGNORE
_ad9361_swig.DAC_FREQ_swigconstant(_ad9361_swig)
DAC_FREQ = _ad9361_swig.DAC_FREQ
_ad9361_swig.T2_FREQ_swigconstant(_ad9361_swig)
T2_FREQ = _ad9361_swig.T2_FREQ
_ad9361_swig.T1_FREQ_swigconstant(_ad9361_swig)
T1_FREQ = _ad9361_swig.T1_FREQ
_ad9361_swig.CLKTF_FREQ_swigconstant(_ad9361_swig)
CLKTF_FREQ = _ad9361_swig.CLKTF_FREQ
_ad9361_swig.TX_SAMPL_FREQ_swigconstant(_ad9361_swig)
TX_SAMPL_FREQ = _ad9361_swig.TX_SAMPL_FREQ
_ad9361_swig.NUM_TX_CLOCKS_swigconstant(_ad9361_swig)
NUM_TX_CLOCKS = _ad9361_swig.NUM_TX_CLOCKS
_ad9361_swig.CLKOUT_DISABLE_swigconstant(_ad9361_swig)
CLKOUT_DISABLE = _ad9361_swig.CLKOUT_DISABLE
_ad9361_swig.BUFFERED_XTALN_DCXO_swigconstant(_ad9361_swig)
BUFFERED_XTALN_DCXO = _ad9361_swig.BUFFERED_XTALN_DCXO
_ad9361_swig.ADC_CLK_DIV_2_swigconstant(_ad9361_swig)
ADC_CLK_DIV_2 = _ad9361_swig.ADC_CLK_DIV_2
_ad9361_swig.ADC_CLK_DIV_3_swigconstant(_ad9361_swig)
ADC_CLK_DIV_3 = _ad9361_swig.ADC_CLK_DIV_3
_ad9361_swig.ADC_CLK_DIV_4_swigconstant(_ad9361_swig)
ADC_CLK_DIV_4 = _ad9361_swig.ADC_CLK_DIV_4
_ad9361_swig.ADC_CLK_DIV_8_swigconstant(_ad9361_swig)
ADC_CLK_DIV_8 = _ad9361_swig.ADC_CLK_DIV_8
_ad9361_swig.ADC_CLK_DIV_16_swigconstant(_ad9361_swig)
ADC_CLK_DIV_16 = _ad9361_swig.ADC_CLK_DIV_16
ad9361_phy_platform_data_swigregister = _ad9361_swig.ad9361_phy_platform_data_swigregister
ad9361_phy_platform_data_swigregister(ad9361_phy_platform_data)
[docs]class rf_rx_gain(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, rf_rx_gain, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, rf_rx_gain, name)
__repr__ = _swig_repr
__swig_setmethods__["ant"] = _ad9361_swig.rf_rx_gain_ant_set
__swig_getmethods__["ant"] = _ad9361_swig.rf_rx_gain_ant_get
if _newclass:
ant = _swig_property(_ad9361_swig.rf_rx_gain_ant_get, _ad9361_swig.rf_rx_gain_ant_set)
__swig_setmethods__["gain_db"] = _ad9361_swig.rf_rx_gain_gain_db_set
__swig_getmethods__["gain_db"] = _ad9361_swig.rf_rx_gain_gain_db_get
if _newclass:
gain_db = _swig_property(_ad9361_swig.rf_rx_gain_gain_db_get, _ad9361_swig.rf_rx_gain_gain_db_set)
__swig_setmethods__["fgt_lmt_index"] = _ad9361_swig.rf_rx_gain_fgt_lmt_index_set
__swig_getmethods__["fgt_lmt_index"] = _ad9361_swig.rf_rx_gain_fgt_lmt_index_get
if _newclass:
fgt_lmt_index = _swig_property(_ad9361_swig.rf_rx_gain_fgt_lmt_index_get, _ad9361_swig.rf_rx_gain_fgt_lmt_index_set)
__swig_setmethods__["lmt_gain"] = _ad9361_swig.rf_rx_gain_lmt_gain_set
__swig_getmethods__["lmt_gain"] = _ad9361_swig.rf_rx_gain_lmt_gain_get
if _newclass:
lmt_gain = _swig_property(_ad9361_swig.rf_rx_gain_lmt_gain_get, _ad9361_swig.rf_rx_gain_lmt_gain_set)
__swig_setmethods__["lpf_gain"] = _ad9361_swig.rf_rx_gain_lpf_gain_set
__swig_getmethods__["lpf_gain"] = _ad9361_swig.rf_rx_gain_lpf_gain_get
if _newclass:
lpf_gain = _swig_property(_ad9361_swig.rf_rx_gain_lpf_gain_get, _ad9361_swig.rf_rx_gain_lpf_gain_set)
__swig_setmethods__["digital_gain"] = _ad9361_swig.rf_rx_gain_digital_gain_set
__swig_getmethods__["digital_gain"] = _ad9361_swig.rf_rx_gain_digital_gain_get
if _newclass:
digital_gain = _swig_property(_ad9361_swig.rf_rx_gain_digital_gain_get, _ad9361_swig.rf_rx_gain_digital_gain_set)
__swig_setmethods__["lna_index"] = _ad9361_swig.rf_rx_gain_lna_index_set
__swig_getmethods__["lna_index"] = _ad9361_swig.rf_rx_gain_lna_index_get
if _newclass:
lna_index = _swig_property(_ad9361_swig.rf_rx_gain_lna_index_get, _ad9361_swig.rf_rx_gain_lna_index_set)
__swig_setmethods__["tia_index"] = _ad9361_swig.rf_rx_gain_tia_index_set
__swig_getmethods__["tia_index"] = _ad9361_swig.rf_rx_gain_tia_index_get
if _newclass:
tia_index = _swig_property(_ad9361_swig.rf_rx_gain_tia_index_get, _ad9361_swig.rf_rx_gain_tia_index_set)
__swig_setmethods__["mixer_index"] = _ad9361_swig.rf_rx_gain_mixer_index_set
__swig_getmethods__["mixer_index"] = _ad9361_swig.rf_rx_gain_mixer_index_get
if _newclass:
mixer_index = _swig_property(_ad9361_swig.rf_rx_gain_mixer_index_get, _ad9361_swig.rf_rx_gain_mixer_index_set)
def __init__(self):
this = _ad9361_swig.new_rf_rx_gain()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_rf_rx_gain
__del__ = lambda self: None
rf_rx_gain_swigregister = _ad9361_swig.rf_rx_gain_swigregister
rf_rx_gain_swigregister(rf_rx_gain)
rf_rssi_swigregister = _ad9361_swig.rf_rssi_swigregister
rf_rssi_swigregister(rf_rssi)
[docs]class SynthLUT(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, SynthLUT, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, SynthLUT, name)
__repr__ = _swig_repr
__swig_setmethods__["VCO_MHz"] = _ad9361_swig.SynthLUT_VCO_MHz_set
__swig_getmethods__["VCO_MHz"] = _ad9361_swig.SynthLUT_VCO_MHz_get
if _newclass:
VCO_MHz = _swig_property(_ad9361_swig.SynthLUT_VCO_MHz_get, _ad9361_swig.SynthLUT_VCO_MHz_set)
__swig_setmethods__["VCO_Output_Level"] = _ad9361_swig.SynthLUT_VCO_Output_Level_set
__swig_getmethods__["VCO_Output_Level"] = _ad9361_swig.SynthLUT_VCO_Output_Level_get
if _newclass:
VCO_Output_Level = _swig_property(_ad9361_swig.SynthLUT_VCO_Output_Level_get, _ad9361_swig.SynthLUT_VCO_Output_Level_set)
__swig_setmethods__["VCO_Varactor"] = _ad9361_swig.SynthLUT_VCO_Varactor_set
__swig_getmethods__["VCO_Varactor"] = _ad9361_swig.SynthLUT_VCO_Varactor_get
if _newclass:
VCO_Varactor = _swig_property(_ad9361_swig.SynthLUT_VCO_Varactor_get, _ad9361_swig.SynthLUT_VCO_Varactor_set)
__swig_setmethods__["VCO_Bias_Ref"] = _ad9361_swig.SynthLUT_VCO_Bias_Ref_set
__swig_getmethods__["VCO_Bias_Ref"] = _ad9361_swig.SynthLUT_VCO_Bias_Ref_get
if _newclass:
VCO_Bias_Ref = _swig_property(_ad9361_swig.SynthLUT_VCO_Bias_Ref_get, _ad9361_swig.SynthLUT_VCO_Bias_Ref_set)
__swig_setmethods__["VCO_Bias_Tcf"] = _ad9361_swig.SynthLUT_VCO_Bias_Tcf_set
__swig_getmethods__["VCO_Bias_Tcf"] = _ad9361_swig.SynthLUT_VCO_Bias_Tcf_get
if _newclass:
VCO_Bias_Tcf = _swig_property(_ad9361_swig.SynthLUT_VCO_Bias_Tcf_get, _ad9361_swig.SynthLUT_VCO_Bias_Tcf_set)
__swig_setmethods__["VCO_Cal_Offset"] = _ad9361_swig.SynthLUT_VCO_Cal_Offset_set
__swig_getmethods__["VCO_Cal_Offset"] = _ad9361_swig.SynthLUT_VCO_Cal_Offset_get
if _newclass:
VCO_Cal_Offset = _swig_property(_ad9361_swig.SynthLUT_VCO_Cal_Offset_get, _ad9361_swig.SynthLUT_VCO_Cal_Offset_set)
__swig_setmethods__["VCO_Varactor_Reference"] = _ad9361_swig.SynthLUT_VCO_Varactor_Reference_set
__swig_getmethods__["VCO_Varactor_Reference"] = _ad9361_swig.SynthLUT_VCO_Varactor_Reference_get
if _newclass:
VCO_Varactor_Reference = _swig_property(_ad9361_swig.SynthLUT_VCO_Varactor_Reference_get, _ad9361_swig.SynthLUT_VCO_Varactor_Reference_set)
__swig_setmethods__["Charge_Pump_Current"] = _ad9361_swig.SynthLUT_Charge_Pump_Current_set
__swig_getmethods__["Charge_Pump_Current"] = _ad9361_swig.SynthLUT_Charge_Pump_Current_get
if _newclass:
Charge_Pump_Current = _swig_property(_ad9361_swig.SynthLUT_Charge_Pump_Current_get, _ad9361_swig.SynthLUT_Charge_Pump_Current_set)
__swig_setmethods__["LF_C2"] = _ad9361_swig.SynthLUT_LF_C2_set
__swig_getmethods__["LF_C2"] = _ad9361_swig.SynthLUT_LF_C2_get
if _newclass:
LF_C2 = _swig_property(_ad9361_swig.SynthLUT_LF_C2_get, _ad9361_swig.SynthLUT_LF_C2_set)
__swig_setmethods__["LF_C1"] = _ad9361_swig.SynthLUT_LF_C1_set
__swig_getmethods__["LF_C1"] = _ad9361_swig.SynthLUT_LF_C1_get
if _newclass:
LF_C1 = _swig_property(_ad9361_swig.SynthLUT_LF_C1_get, _ad9361_swig.SynthLUT_LF_C1_set)
__swig_setmethods__["LF_R1"] = _ad9361_swig.SynthLUT_LF_R1_set
__swig_getmethods__["LF_R1"] = _ad9361_swig.SynthLUT_LF_R1_get
if _newclass:
LF_R1 = _swig_property(_ad9361_swig.SynthLUT_LF_R1_get, _ad9361_swig.SynthLUT_LF_R1_set)
__swig_setmethods__["LF_C3"] = _ad9361_swig.SynthLUT_LF_C3_set
__swig_getmethods__["LF_C3"] = _ad9361_swig.SynthLUT_LF_C3_get
if _newclass:
LF_C3 = _swig_property(_ad9361_swig.SynthLUT_LF_C3_get, _ad9361_swig.SynthLUT_LF_C3_set)
__swig_setmethods__["LF_R3"] = _ad9361_swig.SynthLUT_LF_R3_set
__swig_getmethods__["LF_R3"] = _ad9361_swig.SynthLUT_LF_R3_get
if _newclass:
LF_R3 = _swig_property(_ad9361_swig.SynthLUT_LF_R3_get, _ad9361_swig.SynthLUT_LF_R3_set)
def __init__(self):
this = _ad9361_swig.new_SynthLUT()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_SynthLUT
__del__ = lambda self: None
SynthLUT_swigregister = _ad9361_swig.SynthLUT_swigregister
SynthLUT_swigregister(SynthLUT)
_ad9361_swig.LUT_FTDD_40_swigconstant(_ad9361_swig)
LUT_FTDD_40 = _ad9361_swig.LUT_FTDD_40
_ad9361_swig.LUT_FTDD_60_swigconstant(_ad9361_swig)
LUT_FTDD_60 = _ad9361_swig.LUT_FTDD_60
_ad9361_swig.LUT_FTDD_80_swigconstant(_ad9361_swig)
LUT_FTDD_80 = _ad9361_swig.LUT_FTDD_80
_ad9361_swig.LUT_FTDD_ENT_swigconstant(_ad9361_swig)
LUT_FTDD_ENT = _ad9361_swig.LUT_FTDD_ENT
_ad9361_swig.BB_REFCLK_swigconstant(_ad9361_swig)
BB_REFCLK = _ad9361_swig.BB_REFCLK
_ad9361_swig.RX_REFCLK_swigconstant(_ad9361_swig)
RX_REFCLK = _ad9361_swig.RX_REFCLK
_ad9361_swig.TX_REFCLK_swigconstant(_ad9361_swig)
TX_REFCLK = _ad9361_swig.TX_REFCLK
_ad9361_swig.BBPLL_CLK_swigconstant(_ad9361_swig)
BBPLL_CLK = _ad9361_swig.BBPLL_CLK
_ad9361_swig.ADC_CLK_swigconstant(_ad9361_swig)
ADC_CLK = _ad9361_swig.ADC_CLK
_ad9361_swig.R2_CLK_swigconstant(_ad9361_swig)
R2_CLK = _ad9361_swig.R2_CLK
_ad9361_swig.R1_CLK_swigconstant(_ad9361_swig)
R1_CLK = _ad9361_swig.R1_CLK
_ad9361_swig.CLKRF_CLK_swigconstant(_ad9361_swig)
CLKRF_CLK = _ad9361_swig.CLKRF_CLK
_ad9361_swig.RX_SAMPL_CLK_swigconstant(_ad9361_swig)
RX_SAMPL_CLK = _ad9361_swig.RX_SAMPL_CLK
_ad9361_swig.DAC_CLK_swigconstant(_ad9361_swig)
DAC_CLK = _ad9361_swig.DAC_CLK
_ad9361_swig.T2_CLK_swigconstant(_ad9361_swig)
T2_CLK = _ad9361_swig.T2_CLK
_ad9361_swig.T1_CLK_swigconstant(_ad9361_swig)
T1_CLK = _ad9361_swig.T1_CLK
_ad9361_swig.CLKTF_CLK_swigconstant(_ad9361_swig)
CLKTF_CLK = _ad9361_swig.CLKTF_CLK
_ad9361_swig.TX_SAMPL_CLK_swigconstant(_ad9361_swig)
TX_SAMPL_CLK = _ad9361_swig.TX_SAMPL_CLK
_ad9361_swig.RX_RFPLL_INT_swigconstant(_ad9361_swig)
RX_RFPLL_INT = _ad9361_swig.RX_RFPLL_INT
_ad9361_swig.TX_RFPLL_INT_swigconstant(_ad9361_swig)
TX_RFPLL_INT = _ad9361_swig.TX_RFPLL_INT
_ad9361_swig.RX_RFPLL_DUMMY_swigconstant(_ad9361_swig)
RX_RFPLL_DUMMY = _ad9361_swig.RX_RFPLL_DUMMY
_ad9361_swig.TX_RFPLL_DUMMY_swigconstant(_ad9361_swig)
TX_RFPLL_DUMMY = _ad9361_swig.TX_RFPLL_DUMMY
_ad9361_swig.RX_RFPLL_swigconstant(_ad9361_swig)
RX_RFPLL = _ad9361_swig.RX_RFPLL
_ad9361_swig.TX_RFPLL_swigconstant(_ad9361_swig)
TX_RFPLL = _ad9361_swig.TX_RFPLL
_ad9361_swig.NUM_AD9361_CLKS_swigconstant(_ad9361_swig)
NUM_AD9361_CLKS = _ad9361_swig.NUM_AD9361_CLKS
_ad9361_swig.EXT_REF_CLK_swigconstant(_ad9361_swig)
EXT_REF_CLK = _ad9361_swig.EXT_REF_CLK
[docs]class ad9361_debugfs_entry(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, ad9361_debugfs_entry, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, ad9361_debugfs_entry, name)
__repr__ = _swig_repr
__swig_setmethods__["phy"] = _ad9361_swig.ad9361_debugfs_entry_phy_set
__swig_getmethods__["phy"] = _ad9361_swig.ad9361_debugfs_entry_phy_get
if _newclass:
phy = _swig_property(_ad9361_swig.ad9361_debugfs_entry_phy_get, _ad9361_swig.ad9361_debugfs_entry_phy_set)
__swig_setmethods__["propname"] = _ad9361_swig.ad9361_debugfs_entry_propname_set
__swig_getmethods__["propname"] = _ad9361_swig.ad9361_debugfs_entry_propname_get
if _newclass:
propname = _swig_property(_ad9361_swig.ad9361_debugfs_entry_propname_get, _ad9361_swig.ad9361_debugfs_entry_propname_set)
__swig_setmethods__["out_value"] = _ad9361_swig.ad9361_debugfs_entry_out_value_set
__swig_getmethods__["out_value"] = _ad9361_swig.ad9361_debugfs_entry_out_value_get
if _newclass:
out_value = _swig_property(_ad9361_swig.ad9361_debugfs_entry_out_value_get, _ad9361_swig.ad9361_debugfs_entry_out_value_set)
__swig_setmethods__["val"] = _ad9361_swig.ad9361_debugfs_entry_val_set
__swig_getmethods__["val"] = _ad9361_swig.ad9361_debugfs_entry_val_get
if _newclass:
val = _swig_property(_ad9361_swig.ad9361_debugfs_entry_val_get, _ad9361_swig.ad9361_debugfs_entry_val_set)
__swig_setmethods__["size"] = _ad9361_swig.ad9361_debugfs_entry_size_set
__swig_getmethods__["size"] = _ad9361_swig.ad9361_debugfs_entry_size_get
if _newclass:
size = _swig_property(_ad9361_swig.ad9361_debugfs_entry_size_get, _ad9361_swig.ad9361_debugfs_entry_size_set)
__swig_setmethods__["cmd"] = _ad9361_swig.ad9361_debugfs_entry_cmd_set
__swig_getmethods__["cmd"] = _ad9361_swig.ad9361_debugfs_entry_cmd_get
if _newclass:
cmd = _swig_property(_ad9361_swig.ad9361_debugfs_entry_cmd_get, _ad9361_swig.ad9361_debugfs_entry_cmd_set)
def __init__(self):
this = _ad9361_swig.new_ad9361_debugfs_entry()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_ad9361_debugfs_entry
__del__ = lambda self: None
ad9361_debugfs_entry_swigregister = _ad9361_swig.ad9361_debugfs_entry_swigregister
ad9361_debugfs_entry_swigregister(ad9361_debugfs_entry)
[docs]class ad9361_fastlock_entry(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, ad9361_fastlock_entry, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, ad9361_fastlock_entry, name)
__repr__ = _swig_repr
__swig_setmethods__["flags"] = _ad9361_swig.ad9361_fastlock_entry_flags_set
__swig_getmethods__["flags"] = _ad9361_swig.ad9361_fastlock_entry_flags_get
if _newclass:
flags = _swig_property(_ad9361_swig.ad9361_fastlock_entry_flags_get, _ad9361_swig.ad9361_fastlock_entry_flags_set)
__swig_setmethods__["alc_orig"] = _ad9361_swig.ad9361_fastlock_entry_alc_orig_set
__swig_getmethods__["alc_orig"] = _ad9361_swig.ad9361_fastlock_entry_alc_orig_get
if _newclass:
alc_orig = _swig_property(_ad9361_swig.ad9361_fastlock_entry_alc_orig_get, _ad9361_swig.ad9361_fastlock_entry_alc_orig_set)
__swig_setmethods__["alc_written"] = _ad9361_swig.ad9361_fastlock_entry_alc_written_set
__swig_getmethods__["alc_written"] = _ad9361_swig.ad9361_fastlock_entry_alc_written_get
if _newclass:
alc_written = _swig_property(_ad9361_swig.ad9361_fastlock_entry_alc_written_get, _ad9361_swig.ad9361_fastlock_entry_alc_written_set)
def __init__(self):
this = _ad9361_swig.new_ad9361_fastlock_entry()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_ad9361_fastlock_entry
__del__ = lambda self: None
ad9361_fastlock_entry_swigregister = _ad9361_swig.ad9361_fastlock_entry_swigregister
ad9361_fastlock_entry_swigregister(ad9361_fastlock_entry)
_ad9361_swig.FASTLOOK_INIT_swigconstant(_ad9361_swig)
FASTLOOK_INIT = _ad9361_swig.FASTLOOK_INIT
[docs]class ad9361_fastlock(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, ad9361_fastlock, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, ad9361_fastlock, name)
__repr__ = _swig_repr
__swig_setmethods__["save_profile"] = _ad9361_swig.ad9361_fastlock_save_profile_set
__swig_getmethods__["save_profile"] = _ad9361_swig.ad9361_fastlock_save_profile_get
if _newclass:
save_profile = _swig_property(_ad9361_swig.ad9361_fastlock_save_profile_get, _ad9361_swig.ad9361_fastlock_save_profile_set)
__swig_setmethods__["current_profile"] = _ad9361_swig.ad9361_fastlock_current_profile_set
__swig_getmethods__["current_profile"] = _ad9361_swig.ad9361_fastlock_current_profile_get
if _newclass:
current_profile = _swig_property(_ad9361_swig.ad9361_fastlock_current_profile_get, _ad9361_swig.ad9361_fastlock_current_profile_set)
__swig_setmethods__["entry"] = _ad9361_swig.ad9361_fastlock_entry_set
__swig_getmethods__["entry"] = _ad9361_swig.ad9361_fastlock_entry_get
if _newclass:
entry = _swig_property(_ad9361_swig.ad9361_fastlock_entry_get, _ad9361_swig.ad9361_fastlock_entry_set)
def __init__(self):
this = _ad9361_swig.new_ad9361_fastlock()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_ad9361_fastlock
__del__ = lambda self: None
ad9361_fastlock_swigregister = _ad9361_swig.ad9361_fastlock_swigregister
ad9361_fastlock_swigregister(ad9361_fastlock)
_ad9361_swig.BE_VERBOSE_swigconstant(_ad9361_swig)
BE_VERBOSE = _ad9361_swig.BE_VERBOSE
_ad9361_swig.BE_MOREVERBOSE_swigconstant(_ad9361_swig)
BE_MOREVERBOSE = _ad9361_swig.BE_MOREVERBOSE
_ad9361_swig.DO_IDELAY_swigconstant(_ad9361_swig)
DO_IDELAY = _ad9361_swig.DO_IDELAY
_ad9361_swig.DO_ODELAY_swigconstant(_ad9361_swig)
DO_ODELAY = _ad9361_swig.DO_ODELAY
_ad9361_swig.SKIP_STORE_RESULT_swigconstant(_ad9361_swig)
SKIP_STORE_RESULT = _ad9361_swig.SKIP_STORE_RESULT
_ad9361_swig.RESTORE_DEFAULT_swigconstant(_ad9361_swig)
RESTORE_DEFAULT = _ad9361_swig.RESTORE_DEFAULT
_ad9361_swig.BIST_DISABLE_swigconstant(_ad9361_swig)
BIST_DISABLE = _ad9361_swig.BIST_DISABLE
_ad9361_swig.BIST_INJ_TX_swigconstant(_ad9361_swig)
BIST_INJ_TX = _ad9361_swig.BIST_INJ_TX
_ad9361_swig.BIST_INJ_RX_swigconstant(_ad9361_swig)
BIST_INJ_RX = _ad9361_swig.BIST_INJ_RX
[docs]class ad9361_rf_phy(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, ad9361_rf_phy, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, ad9361_rf_phy, name)
__repr__ = _swig_repr
__swig_setmethods__["id_no"] = _ad9361_swig.ad9361_rf_phy_id_no_set
__swig_getmethods__["id_no"] = _ad9361_swig.ad9361_rf_phy_id_no_get
if _newclass:
id_no = _swig_property(_ad9361_swig.ad9361_rf_phy_id_no_get, _ad9361_swig.ad9361_rf_phy_id_no_set)
__swig_setmethods__["spi"] = _ad9361_swig.ad9361_rf_phy_spi_set
__swig_getmethods__["spi"] = _ad9361_swig.ad9361_rf_phy_spi_get
if _newclass:
spi = _swig_property(_ad9361_swig.ad9361_rf_phy_spi_get, _ad9361_swig.ad9361_rf_phy_spi_set)
__swig_setmethods__["clk_refin"] = _ad9361_swig.ad9361_rf_phy_clk_refin_set
__swig_getmethods__["clk_refin"] = _ad9361_swig.ad9361_rf_phy_clk_refin_get
if _newclass:
clk_refin = _swig_property(_ad9361_swig.ad9361_rf_phy_clk_refin_get, _ad9361_swig.ad9361_rf_phy_clk_refin_set)
__swig_setmethods__["clks"] = _ad9361_swig.ad9361_rf_phy_clks_set
__swig_getmethods__["clks"] = _ad9361_swig.ad9361_rf_phy_clks_get
if _newclass:
clks = _swig_property(_ad9361_swig.ad9361_rf_phy_clks_get, _ad9361_swig.ad9361_rf_phy_clks_set)
__swig_setmethods__["ref_clk_scale"] = _ad9361_swig.ad9361_rf_phy_ref_clk_scale_set
__swig_getmethods__["ref_clk_scale"] = _ad9361_swig.ad9361_rf_phy_ref_clk_scale_get
if _newclass:
ref_clk_scale = _swig_property(_ad9361_swig.ad9361_rf_phy_ref_clk_scale_get, _ad9361_swig.ad9361_rf_phy_ref_clk_scale_set)
__swig_setmethods__["clk_data"] = _ad9361_swig.ad9361_rf_phy_clk_data_set
__swig_getmethods__["clk_data"] = _ad9361_swig.ad9361_rf_phy_clk_data_get
if _newclass:
clk_data = _swig_property(_ad9361_swig.ad9361_rf_phy_clk_data_get, _ad9361_swig.ad9361_rf_phy_clk_data_set)
__swig_setmethods__["ad9361_rfpll_ext_recalc_rate"] = _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_recalc_rate_set
__swig_getmethods__["ad9361_rfpll_ext_recalc_rate"] = _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_recalc_rate_get
if _newclass:
ad9361_rfpll_ext_recalc_rate = _swig_property(_ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_recalc_rate_get, _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_recalc_rate_set)
__swig_setmethods__["ad9361_rfpll_ext_round_rate"] = _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_round_rate_set
__swig_getmethods__["ad9361_rfpll_ext_round_rate"] = _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_round_rate_get
if _newclass:
ad9361_rfpll_ext_round_rate = _swig_property(_ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_round_rate_get, _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_round_rate_set)
__swig_setmethods__["ad9361_rfpll_ext_set_rate"] = _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_set_rate_set
__swig_getmethods__["ad9361_rfpll_ext_set_rate"] = _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_set_rate_get
if _newclass:
ad9361_rfpll_ext_set_rate = _swig_property(_ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_set_rate_get, _ad9361_swig.ad9361_rf_phy_ad9361_rfpll_ext_set_rate_set)
__swig_setmethods__["pdata"] = _ad9361_swig.ad9361_rf_phy_pdata_set
__swig_getmethods__["pdata"] = _ad9361_swig.ad9361_rf_phy_pdata_get
if _newclass:
pdata = _swig_property(_ad9361_swig.ad9361_rf_phy_pdata_get, _ad9361_swig.ad9361_rf_phy_pdata_set)
__swig_setmethods__["prev_ensm_state"] = _ad9361_swig.ad9361_rf_phy_prev_ensm_state_set
__swig_getmethods__["prev_ensm_state"] = _ad9361_swig.ad9361_rf_phy_prev_ensm_state_get
if _newclass:
prev_ensm_state = _swig_property(_ad9361_swig.ad9361_rf_phy_prev_ensm_state_get, _ad9361_swig.ad9361_rf_phy_prev_ensm_state_set)
__swig_setmethods__["curr_ensm_state"] = _ad9361_swig.ad9361_rf_phy_curr_ensm_state_set
__swig_getmethods__["curr_ensm_state"] = _ad9361_swig.ad9361_rf_phy_curr_ensm_state_get
if _newclass:
curr_ensm_state = _swig_property(_ad9361_swig.ad9361_rf_phy_curr_ensm_state_get, _ad9361_swig.ad9361_rf_phy_curr_ensm_state_set)
__swig_setmethods__["cached_rx_rfpll_div"] = _ad9361_swig.ad9361_rf_phy_cached_rx_rfpll_div_set
__swig_getmethods__["cached_rx_rfpll_div"] = _ad9361_swig.ad9361_rf_phy_cached_rx_rfpll_div_get
if _newclass:
cached_rx_rfpll_div = _swig_property(_ad9361_swig.ad9361_rf_phy_cached_rx_rfpll_div_get, _ad9361_swig.ad9361_rf_phy_cached_rx_rfpll_div_set)
__swig_setmethods__["cached_tx_rfpll_div"] = _ad9361_swig.ad9361_rf_phy_cached_tx_rfpll_div_set
__swig_getmethods__["cached_tx_rfpll_div"] = _ad9361_swig.ad9361_rf_phy_cached_tx_rfpll_div_get
if _newclass:
cached_tx_rfpll_div = _swig_property(_ad9361_swig.ad9361_rf_phy_cached_tx_rfpll_div_get, _ad9361_swig.ad9361_rf_phy_cached_tx_rfpll_div_set)
__swig_setmethods__["rx_gain"] = _ad9361_swig.ad9361_rf_phy_rx_gain_set
__swig_getmethods__["rx_gain"] = _ad9361_swig.ad9361_rf_phy_rx_gain_get
if _newclass:
rx_gain = _swig_property(_ad9361_swig.ad9361_rf_phy_rx_gain_get, _ad9361_swig.ad9361_rf_phy_rx_gain_set)
__swig_setmethods__["current_table"] = _ad9361_swig.ad9361_rf_phy_current_table_set
__swig_getmethods__["current_table"] = _ad9361_swig.ad9361_rf_phy_current_table_get
if _newclass:
current_table = _swig_property(_ad9361_swig.ad9361_rf_phy_current_table_get, _ad9361_swig.ad9361_rf_phy_current_table_set)
__swig_setmethods__["ensm_pin_ctl_en"] = _ad9361_swig.ad9361_rf_phy_ensm_pin_ctl_en_set
__swig_getmethods__["ensm_pin_ctl_en"] = _ad9361_swig.ad9361_rf_phy_ensm_pin_ctl_en_get
if _newclass:
ensm_pin_ctl_en = _swig_property(_ad9361_swig.ad9361_rf_phy_ensm_pin_ctl_en_get, _ad9361_swig.ad9361_rf_phy_ensm_pin_ctl_en_set)
__swig_setmethods__["auto_cal_en"] = _ad9361_swig.ad9361_rf_phy_auto_cal_en_set
__swig_getmethods__["auto_cal_en"] = _ad9361_swig.ad9361_rf_phy_auto_cal_en_get
if _newclass:
auto_cal_en = _swig_property(_ad9361_swig.ad9361_rf_phy_auto_cal_en_get, _ad9361_swig.ad9361_rf_phy_auto_cal_en_set)
__swig_setmethods__["last_tx_quad_cal_freq"] = _ad9361_swig.ad9361_rf_phy_last_tx_quad_cal_freq_set
__swig_getmethods__["last_tx_quad_cal_freq"] = _ad9361_swig.ad9361_rf_phy_last_tx_quad_cal_freq_get
if _newclass:
last_tx_quad_cal_freq = _swig_property(_ad9361_swig.ad9361_rf_phy_last_tx_quad_cal_freq_get, _ad9361_swig.ad9361_rf_phy_last_tx_quad_cal_freq_set)
__swig_setmethods__["last_tx_quad_cal_phase"] = _ad9361_swig.ad9361_rf_phy_last_tx_quad_cal_phase_set
__swig_getmethods__["last_tx_quad_cal_phase"] = _ad9361_swig.ad9361_rf_phy_last_tx_quad_cal_phase_get
if _newclass:
last_tx_quad_cal_phase = _swig_property(_ad9361_swig.ad9361_rf_phy_last_tx_quad_cal_phase_get, _ad9361_swig.ad9361_rf_phy_last_tx_quad_cal_phase_set)
__swig_setmethods__["flags"] = _ad9361_swig.ad9361_rf_phy_flags_set
__swig_getmethods__["flags"] = _ad9361_swig.ad9361_rf_phy_flags_get
if _newclass:
flags = _swig_property(_ad9361_swig.ad9361_rf_phy_flags_get, _ad9361_swig.ad9361_rf_phy_flags_set)
__swig_setmethods__["cal_threshold_freq"] = _ad9361_swig.ad9361_rf_phy_cal_threshold_freq_set
__swig_getmethods__["cal_threshold_freq"] = _ad9361_swig.ad9361_rf_phy_cal_threshold_freq_get
if _newclass:
cal_threshold_freq = _swig_property(_ad9361_swig.ad9361_rf_phy_cal_threshold_freq_get, _ad9361_swig.ad9361_rf_phy_cal_threshold_freq_set)
__swig_setmethods__["current_rx_bw_Hz"] = _ad9361_swig.ad9361_rf_phy_current_rx_bw_Hz_set
__swig_getmethods__["current_rx_bw_Hz"] = _ad9361_swig.ad9361_rf_phy_current_rx_bw_Hz_get
if _newclass:
current_rx_bw_Hz = _swig_property(_ad9361_swig.ad9361_rf_phy_current_rx_bw_Hz_get, _ad9361_swig.ad9361_rf_phy_current_rx_bw_Hz_set)
__swig_setmethods__["current_tx_bw_Hz"] = _ad9361_swig.ad9361_rf_phy_current_tx_bw_Hz_set
__swig_getmethods__["current_tx_bw_Hz"] = _ad9361_swig.ad9361_rf_phy_current_tx_bw_Hz_get
if _newclass:
current_tx_bw_Hz = _swig_property(_ad9361_swig.ad9361_rf_phy_current_tx_bw_Hz_get, _ad9361_swig.ad9361_rf_phy_current_tx_bw_Hz_set)
__swig_setmethods__["rxbbf_div"] = _ad9361_swig.ad9361_rf_phy_rxbbf_div_set
__swig_getmethods__["rxbbf_div"] = _ad9361_swig.ad9361_rf_phy_rxbbf_div_get
if _newclass:
rxbbf_div = _swig_property(_ad9361_swig.ad9361_rf_phy_rxbbf_div_get, _ad9361_swig.ad9361_rf_phy_rxbbf_div_set)
__swig_setmethods__["rate_governor"] = _ad9361_swig.ad9361_rf_phy_rate_governor_set
__swig_getmethods__["rate_governor"] = _ad9361_swig.ad9361_rf_phy_rate_governor_get
if _newclass:
rate_governor = _swig_property(_ad9361_swig.ad9361_rf_phy_rate_governor_get, _ad9361_swig.ad9361_rf_phy_rate_governor_set)
__swig_setmethods__["bypass_rx_fir"] = _ad9361_swig.ad9361_rf_phy_bypass_rx_fir_set
__swig_getmethods__["bypass_rx_fir"] = _ad9361_swig.ad9361_rf_phy_bypass_rx_fir_get
if _newclass:
bypass_rx_fir = _swig_property(_ad9361_swig.ad9361_rf_phy_bypass_rx_fir_get, _ad9361_swig.ad9361_rf_phy_bypass_rx_fir_set)
__swig_setmethods__["bypass_tx_fir"] = _ad9361_swig.ad9361_rf_phy_bypass_tx_fir_set
__swig_getmethods__["bypass_tx_fir"] = _ad9361_swig.ad9361_rf_phy_bypass_tx_fir_get
if _newclass:
bypass_tx_fir = _swig_property(_ad9361_swig.ad9361_rf_phy_bypass_tx_fir_get, _ad9361_swig.ad9361_rf_phy_bypass_tx_fir_set)
__swig_setmethods__["rx_eq_2tx"] = _ad9361_swig.ad9361_rf_phy_rx_eq_2tx_set
__swig_getmethods__["rx_eq_2tx"] = _ad9361_swig.ad9361_rf_phy_rx_eq_2tx_get
if _newclass:
rx_eq_2tx = _swig_property(_ad9361_swig.ad9361_rf_phy_rx_eq_2tx_get, _ad9361_swig.ad9361_rf_phy_rx_eq_2tx_set)
__swig_setmethods__["filt_valid"] = _ad9361_swig.ad9361_rf_phy_filt_valid_set
__swig_getmethods__["filt_valid"] = _ad9361_swig.ad9361_rf_phy_filt_valid_get
if _newclass:
filt_valid = _swig_property(_ad9361_swig.ad9361_rf_phy_filt_valid_get, _ad9361_swig.ad9361_rf_phy_filt_valid_set)
__swig_setmethods__["filt_rx_path_clks"] = _ad9361_swig.ad9361_rf_phy_filt_rx_path_clks_set
__swig_getmethods__["filt_rx_path_clks"] = _ad9361_swig.ad9361_rf_phy_filt_rx_path_clks_get
if _newclass:
filt_rx_path_clks = _swig_property(_ad9361_swig.ad9361_rf_phy_filt_rx_path_clks_get, _ad9361_swig.ad9361_rf_phy_filt_rx_path_clks_set)
__swig_setmethods__["filt_tx_path_clks"] = _ad9361_swig.ad9361_rf_phy_filt_tx_path_clks_set
__swig_getmethods__["filt_tx_path_clks"] = _ad9361_swig.ad9361_rf_phy_filt_tx_path_clks_get
if _newclass:
filt_tx_path_clks = _swig_property(_ad9361_swig.ad9361_rf_phy_filt_tx_path_clks_get, _ad9361_swig.ad9361_rf_phy_filt_tx_path_clks_set)
__swig_setmethods__["filt_rx_bw_Hz"] = _ad9361_swig.ad9361_rf_phy_filt_rx_bw_Hz_set
__swig_getmethods__["filt_rx_bw_Hz"] = _ad9361_swig.ad9361_rf_phy_filt_rx_bw_Hz_get
if _newclass:
filt_rx_bw_Hz = _swig_property(_ad9361_swig.ad9361_rf_phy_filt_rx_bw_Hz_get, _ad9361_swig.ad9361_rf_phy_filt_rx_bw_Hz_set)
__swig_setmethods__["filt_tx_bw_Hz"] = _ad9361_swig.ad9361_rf_phy_filt_tx_bw_Hz_set
__swig_getmethods__["filt_tx_bw_Hz"] = _ad9361_swig.ad9361_rf_phy_filt_tx_bw_Hz_get
if _newclass:
filt_tx_bw_Hz = _swig_property(_ad9361_swig.ad9361_rf_phy_filt_tx_bw_Hz_get, _ad9361_swig.ad9361_rf_phy_filt_tx_bw_Hz_set)
__swig_setmethods__["tx_fir_int"] = _ad9361_swig.ad9361_rf_phy_tx_fir_int_set
__swig_getmethods__["tx_fir_int"] = _ad9361_swig.ad9361_rf_phy_tx_fir_int_get
if _newclass:
tx_fir_int = _swig_property(_ad9361_swig.ad9361_rf_phy_tx_fir_int_get, _ad9361_swig.ad9361_rf_phy_tx_fir_int_set)
__swig_setmethods__["tx_fir_ntaps"] = _ad9361_swig.ad9361_rf_phy_tx_fir_ntaps_set
__swig_getmethods__["tx_fir_ntaps"] = _ad9361_swig.ad9361_rf_phy_tx_fir_ntaps_get
if _newclass:
tx_fir_ntaps = _swig_property(_ad9361_swig.ad9361_rf_phy_tx_fir_ntaps_get, _ad9361_swig.ad9361_rf_phy_tx_fir_ntaps_set)
__swig_setmethods__["rx_fir_dec"] = _ad9361_swig.ad9361_rf_phy_rx_fir_dec_set
__swig_getmethods__["rx_fir_dec"] = _ad9361_swig.ad9361_rf_phy_rx_fir_dec_get
if _newclass:
rx_fir_dec = _swig_property(_ad9361_swig.ad9361_rf_phy_rx_fir_dec_get, _ad9361_swig.ad9361_rf_phy_rx_fir_dec_set)
__swig_setmethods__["rx_fir_ntaps"] = _ad9361_swig.ad9361_rf_phy_rx_fir_ntaps_set
__swig_getmethods__["rx_fir_ntaps"] = _ad9361_swig.ad9361_rf_phy_rx_fir_ntaps_get
if _newclass:
rx_fir_ntaps = _swig_property(_ad9361_swig.ad9361_rf_phy_rx_fir_ntaps_get, _ad9361_swig.ad9361_rf_phy_rx_fir_ntaps_set)
__swig_setmethods__["agc_mode"] = _ad9361_swig.ad9361_rf_phy_agc_mode_set
__swig_getmethods__["agc_mode"] = _ad9361_swig.ad9361_rf_phy_agc_mode_get
if _newclass:
agc_mode = _swig_property(_ad9361_swig.ad9361_rf_phy_agc_mode_get, _ad9361_swig.ad9361_rf_phy_agc_mode_set)
__swig_setmethods__["rfdc_track_en"] = _ad9361_swig.ad9361_rf_phy_rfdc_track_en_set
__swig_getmethods__["rfdc_track_en"] = _ad9361_swig.ad9361_rf_phy_rfdc_track_en_get
if _newclass:
rfdc_track_en = _swig_property(_ad9361_swig.ad9361_rf_phy_rfdc_track_en_get, _ad9361_swig.ad9361_rf_phy_rfdc_track_en_set)
__swig_setmethods__["bbdc_track_en"] = _ad9361_swig.ad9361_rf_phy_bbdc_track_en_set
__swig_getmethods__["bbdc_track_en"] = _ad9361_swig.ad9361_rf_phy_bbdc_track_en_get
if _newclass:
bbdc_track_en = _swig_property(_ad9361_swig.ad9361_rf_phy_bbdc_track_en_get, _ad9361_swig.ad9361_rf_phy_bbdc_track_en_set)
__swig_setmethods__["quad_track_en"] = _ad9361_swig.ad9361_rf_phy_quad_track_en_set
__swig_getmethods__["quad_track_en"] = _ad9361_swig.ad9361_rf_phy_quad_track_en_get
if _newclass:
quad_track_en = _swig_property(_ad9361_swig.ad9361_rf_phy_quad_track_en_get, _ad9361_swig.ad9361_rf_phy_quad_track_en_set)
__swig_setmethods__["txmon_tdd_en"] = _ad9361_swig.ad9361_rf_phy_txmon_tdd_en_set
__swig_getmethods__["txmon_tdd_en"] = _ad9361_swig.ad9361_rf_phy_txmon_tdd_en_get
if _newclass:
txmon_tdd_en = _swig_property(_ad9361_swig.ad9361_rf_phy_txmon_tdd_en_get, _ad9361_swig.ad9361_rf_phy_txmon_tdd_en_set)
__swig_setmethods__["auxdac1_value"] = _ad9361_swig.ad9361_rf_phy_auxdac1_value_set
__swig_getmethods__["auxdac1_value"] = _ad9361_swig.ad9361_rf_phy_auxdac1_value_get
if _newclass:
auxdac1_value = _swig_property(_ad9361_swig.ad9361_rf_phy_auxdac1_value_get, _ad9361_swig.ad9361_rf_phy_auxdac1_value_set)
__swig_setmethods__["auxdac2_value"] = _ad9361_swig.ad9361_rf_phy_auxdac2_value_set
__swig_getmethods__["auxdac2_value"] = _ad9361_swig.ad9361_rf_phy_auxdac2_value_get
if _newclass:
auxdac2_value = _swig_property(_ad9361_swig.ad9361_rf_phy_auxdac2_value_get, _ad9361_swig.ad9361_rf_phy_auxdac2_value_set)
__swig_setmethods__["fastlock"] = _ad9361_swig.ad9361_rf_phy_fastlock_set
__swig_getmethods__["fastlock"] = _ad9361_swig.ad9361_rf_phy_fastlock_get
if _newclass:
fastlock = _swig_property(_ad9361_swig.ad9361_rf_phy_fastlock_get, _ad9361_swig.ad9361_rf_phy_fastlock_set)
__swig_setmethods__["adc_conv"] = _ad9361_swig.ad9361_rf_phy_adc_conv_set
__swig_getmethods__["adc_conv"] = _ad9361_swig.ad9361_rf_phy_adc_conv_get
if _newclass:
adc_conv = _swig_property(_ad9361_swig.ad9361_rf_phy_adc_conv_get, _ad9361_swig.ad9361_rf_phy_adc_conv_set)
__swig_setmethods__["adc_state"] = _ad9361_swig.ad9361_rf_phy_adc_state_set
__swig_getmethods__["adc_state"] = _ad9361_swig.ad9361_rf_phy_adc_state_get
if _newclass:
adc_state = _swig_property(_ad9361_swig.ad9361_rf_phy_adc_state_get, _ad9361_swig.ad9361_rf_phy_adc_state_set)
__swig_setmethods__["bist_loopback_mode"] = _ad9361_swig.ad9361_rf_phy_bist_loopback_mode_set
__swig_getmethods__["bist_loopback_mode"] = _ad9361_swig.ad9361_rf_phy_bist_loopback_mode_get
if _newclass:
bist_loopback_mode = _swig_property(_ad9361_swig.ad9361_rf_phy_bist_loopback_mode_get, _ad9361_swig.ad9361_rf_phy_bist_loopback_mode_set)
__swig_setmethods__["bist_prbs_mode"] = _ad9361_swig.ad9361_rf_phy_bist_prbs_mode_set
__swig_getmethods__["bist_prbs_mode"] = _ad9361_swig.ad9361_rf_phy_bist_prbs_mode_get
if _newclass:
bist_prbs_mode = _swig_property(_ad9361_swig.ad9361_rf_phy_bist_prbs_mode_get, _ad9361_swig.ad9361_rf_phy_bist_prbs_mode_set)
__swig_setmethods__["bist_tone_mode"] = _ad9361_swig.ad9361_rf_phy_bist_tone_mode_set
__swig_getmethods__["bist_tone_mode"] = _ad9361_swig.ad9361_rf_phy_bist_tone_mode_get
if _newclass:
bist_tone_mode = _swig_property(_ad9361_swig.ad9361_rf_phy_bist_tone_mode_get, _ad9361_swig.ad9361_rf_phy_bist_tone_mode_set)
__swig_setmethods__["bist_tone_freq_Hz"] = _ad9361_swig.ad9361_rf_phy_bist_tone_freq_Hz_set
__swig_getmethods__["bist_tone_freq_Hz"] = _ad9361_swig.ad9361_rf_phy_bist_tone_freq_Hz_get
if _newclass:
bist_tone_freq_Hz = _swig_property(_ad9361_swig.ad9361_rf_phy_bist_tone_freq_Hz_get, _ad9361_swig.ad9361_rf_phy_bist_tone_freq_Hz_set)
__swig_setmethods__["bist_tone_level_dB"] = _ad9361_swig.ad9361_rf_phy_bist_tone_level_dB_set
__swig_getmethods__["bist_tone_level_dB"] = _ad9361_swig.ad9361_rf_phy_bist_tone_level_dB_get
if _newclass:
bist_tone_level_dB = _swig_property(_ad9361_swig.ad9361_rf_phy_bist_tone_level_dB_get, _ad9361_swig.ad9361_rf_phy_bist_tone_level_dB_set)
__swig_setmethods__["bist_tone_mask"] = _ad9361_swig.ad9361_rf_phy_bist_tone_mask_set
__swig_getmethods__["bist_tone_mask"] = _ad9361_swig.ad9361_rf_phy_bist_tone_mask_get
if _newclass:
bist_tone_mask = _swig_property(_ad9361_swig.ad9361_rf_phy_bist_tone_mask_get, _ad9361_swig.ad9361_rf_phy_bist_tone_mask_set)
def __init__(self):
this = _ad9361_swig.new_ad9361_rf_phy()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_ad9361_rf_phy
__del__ = lambda self: None
ad9361_rf_phy_swigregister = _ad9361_swig.ad9361_rf_phy_swigregister
ad9361_rf_phy_swigregister(ad9361_rf_phy)
[docs]class refclk_scale(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, refclk_scale, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, refclk_scale, name)
__repr__ = _swig_repr
__swig_setmethods__["spi"] = _ad9361_swig.refclk_scale_spi_set
__swig_getmethods__["spi"] = _ad9361_swig.refclk_scale_spi_get
if _newclass:
spi = _swig_property(_ad9361_swig.refclk_scale_spi_get, _ad9361_swig.refclk_scale_spi_set)
__swig_setmethods__["phy"] = _ad9361_swig.refclk_scale_phy_set
__swig_getmethods__["phy"] = _ad9361_swig.refclk_scale_phy_get
if _newclass:
phy = _swig_property(_ad9361_swig.refclk_scale_phy_get, _ad9361_swig.refclk_scale_phy_set)
__swig_setmethods__["mult"] = _ad9361_swig.refclk_scale_mult_set
__swig_getmethods__["mult"] = _ad9361_swig.refclk_scale_mult_get
if _newclass:
mult = _swig_property(_ad9361_swig.refclk_scale_mult_get, _ad9361_swig.refclk_scale_mult_set)
__swig_setmethods__["div"] = _ad9361_swig.refclk_scale_div_set
__swig_getmethods__["div"] = _ad9361_swig.refclk_scale_div_get
if _newclass:
div = _swig_property(_ad9361_swig.refclk_scale_div_get, _ad9361_swig.refclk_scale_div_set)
__swig_setmethods__["source"] = _ad9361_swig.refclk_scale_source_set
__swig_getmethods__["source"] = _ad9361_swig.refclk_scale_source_get
if _newclass:
source = _swig_property(_ad9361_swig.refclk_scale_source_get, _ad9361_swig.refclk_scale_source_set)
__swig_setmethods__["parent_source"] = _ad9361_swig.refclk_scale_parent_source_set
__swig_getmethods__["parent_source"] = _ad9361_swig.refclk_scale_parent_source_get
if _newclass:
parent_source = _swig_property(_ad9361_swig.refclk_scale_parent_source_get, _ad9361_swig.refclk_scale_parent_source_set)
def __init__(self):
this = _ad9361_swig.new_refclk_scale()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_refclk_scale
__del__ = lambda self: None
refclk_scale_swigregister = _ad9361_swig.refclk_scale_swigregister
refclk_scale_swigregister(refclk_scale)
_ad9361_swig.DBGFS_NONE_swigconstant(_ad9361_swig)
DBGFS_NONE = _ad9361_swig.DBGFS_NONE
_ad9361_swig.DBGFS_INIT_swigconstant(_ad9361_swig)
DBGFS_INIT = _ad9361_swig.DBGFS_INIT
_ad9361_swig.DBGFS_LOOPBACK_swigconstant(_ad9361_swig)
DBGFS_LOOPBACK = _ad9361_swig.DBGFS_LOOPBACK
_ad9361_swig.DBGFS_BIST_PRBS_swigconstant(_ad9361_swig)
DBGFS_BIST_PRBS = _ad9361_swig.DBGFS_BIST_PRBS
_ad9361_swig.DBGFS_BIST_TONE_swigconstant(_ad9361_swig)
DBGFS_BIST_TONE = _ad9361_swig.DBGFS_BIST_TONE
_ad9361_swig.DBGFS_BIST_DT_ANALYSIS_swigconstant(_ad9361_swig)
DBGFS_BIST_DT_ANALYSIS = _ad9361_swig.DBGFS_BIST_DT_ANALYSIS
_ad9361_swig.DBGFS_RXGAIN_1_swigconstant(_ad9361_swig)
DBGFS_RXGAIN_1 = _ad9361_swig.DBGFS_RXGAIN_1
_ad9361_swig.DBGFS_RXGAIN_2_swigconstant(_ad9361_swig)
DBGFS_RXGAIN_2 = _ad9361_swig.DBGFS_RXGAIN_2
_ad9361_swig.ID_AD9361_swigconstant(_ad9361_swig)
ID_AD9361 = _ad9361_swig.ID_AD9361
_ad9361_swig.ID_AD9364_swigconstant(_ad9361_swig)
ID_AD9364 = _ad9361_swig.ID_AD9364
def ad9361_spi_readm(spi, reg, rbuf, num):
return _ad9361_swig.ad9361_spi_readm(spi, reg, rbuf, num)
ad9361_spi_readm = _ad9361_swig.ad9361_spi_readm
def ad9361_spi_read(spi, reg):
return _ad9361_swig.ad9361_spi_read(spi, reg)
ad9361_spi_read = _ad9361_swig.ad9361_spi_read
def ad9361_spi_write(spi, reg, val):
return _ad9361_swig.ad9361_spi_write(spi, reg, val)
ad9361_spi_write = _ad9361_swig.ad9361_spi_write
def ad9361_reset(phy):
return _ad9361_swig.ad9361_reset(phy)
ad9361_reset = _ad9361_swig.ad9361_reset
def register_clocks(phy):
return _ad9361_swig.register_clocks(phy)
register_clocks = _ad9361_swig.register_clocks
def ad9361_init_gain_tables(phy):
return _ad9361_swig.ad9361_init_gain_tables(phy)
ad9361_init_gain_tables = _ad9361_swig.ad9361_init_gain_tables
def ad9361_setup(phy):
return _ad9361_swig.ad9361_setup(phy)
ad9361_setup = _ad9361_swig.ad9361_setup
def ad9361_post_setup(phy):
return _ad9361_swig.ad9361_post_setup(phy)
ad9361_post_setup = _ad9361_swig.ad9361_post_setup
def ad9361_set_ensm_mode(phy, fdd, pinctrl):
return _ad9361_swig.ad9361_set_ensm_mode(phy, fdd, pinctrl)
ad9361_set_ensm_mode = _ad9361_swig.ad9361_set_ensm_mode
def ad9361_ensm_set_state(phy, ensm_state, pinctrl):
return _ad9361_swig.ad9361_ensm_set_state(phy, ensm_state, pinctrl)
ad9361_ensm_set_state = _ad9361_swig.ad9361_ensm_set_state
def ad9361_set_rx_gain(phy, rx_id, rx_gain):
return _ad9361_swig.ad9361_set_rx_gain(phy, rx_id, rx_gain)
ad9361_set_rx_gain = _ad9361_swig.ad9361_set_rx_gain
def ad9361_get_rx_gain(phy, rx_id, rx_gain):
return _ad9361_swig.ad9361_get_rx_gain(phy, rx_id, rx_gain)
ad9361_get_rx_gain = _ad9361_swig.ad9361_get_rx_gain
def ad9361_update_rf_bandwidth(phy, rf_rx_bw, rf_tx_bw):
return _ad9361_swig.ad9361_update_rf_bandwidth(phy, rf_rx_bw, rf_tx_bw)
ad9361_update_rf_bandwidth = _ad9361_swig.ad9361_update_rf_bandwidth
def ad9361_calculate_rf_clock_chain(phy, tx_sample_rate, rate_gov, rx_path_clks):
return _ad9361_swig.ad9361_calculate_rf_clock_chain(phy, tx_sample_rate, rate_gov, rx_path_clks)
ad9361_calculate_rf_clock_chain = _ad9361_swig.ad9361_calculate_rf_clock_chain
def ad9361_set_trx_clock_chain(phy, rx_path_clks):
return _ad9361_swig.ad9361_set_trx_clock_chain(phy, rx_path_clks)
ad9361_set_trx_clock_chain = _ad9361_swig.ad9361_set_trx_clock_chain
def ad9361_get_trx_clock_chain(phy, rx_path_clks):
return _ad9361_swig.ad9361_get_trx_clock_chain(phy, rx_path_clks)
ad9361_get_trx_clock_chain = _ad9361_swig.ad9361_get_trx_clock_chain
def ad9361_to_clk(freq):
return _ad9361_swig.ad9361_to_clk(freq)
ad9361_to_clk = _ad9361_swig.ad9361_to_clk
def ad9361_from_clk(freq):
return _ad9361_swig.ad9361_from_clk(freq)
ad9361_from_clk = _ad9361_swig.ad9361_from_clk
def ad9361_read_rssi(phy, rssi):
return _ad9361_swig.ad9361_read_rssi(phy, rssi)
ad9361_read_rssi = _ad9361_swig.ad9361_read_rssi
def ad9361_set_gain_ctrl_mode(phy, gain_ctrl):
return _ad9361_swig.ad9361_set_gain_ctrl_mode(phy, gain_ctrl)
ad9361_set_gain_ctrl_mode = _ad9361_swig.ad9361_set_gain_ctrl_mode
def ad9361_load_fir_filter_coef(phy, dest, gain_dB, ntaps, coef):
return _ad9361_swig.ad9361_load_fir_filter_coef(phy, dest, gain_dB, ntaps, coef)
ad9361_load_fir_filter_coef = _ad9361_swig.ad9361_load_fir_filter_coef
def ad9361_validate_enable_fir(phy):
return _ad9361_swig.ad9361_validate_enable_fir(phy)
ad9361_validate_enable_fir = _ad9361_swig.ad9361_validate_enable_fir
def ad9361_set_tx_atten(phy, atten_mdb, tx1, tx2, immed):
return _ad9361_swig.ad9361_set_tx_atten(phy, atten_mdb, tx1, tx2, immed)
ad9361_set_tx_atten = _ad9361_swig.ad9361_set_tx_atten
def ad9361_get_tx_atten(phy, tx_num):
return _ad9361_swig.ad9361_get_tx_atten(phy, tx_num)
ad9361_get_tx_atten = _ad9361_swig.ad9361_get_tx_atten
def ad9361_clk_factor_recalc_rate(clk_priv, parent_rate):
return _ad9361_swig.ad9361_clk_factor_recalc_rate(clk_priv, parent_rate)
ad9361_clk_factor_recalc_rate = _ad9361_swig.ad9361_clk_factor_recalc_rate
def ad9361_clk_factor_round_rate(clk_priv, rate, prate):
return _ad9361_swig.ad9361_clk_factor_round_rate(clk_priv, rate, prate)
ad9361_clk_factor_round_rate = _ad9361_swig.ad9361_clk_factor_round_rate
def ad9361_clk_factor_set_rate(clk_priv, rate, parent_rate):
return _ad9361_swig.ad9361_clk_factor_set_rate(clk_priv, rate, parent_rate)
ad9361_clk_factor_set_rate = _ad9361_swig.ad9361_clk_factor_set_rate
def ad9361_bbpll_recalc_rate(clk_priv, parent_rate):
return _ad9361_swig.ad9361_bbpll_recalc_rate(clk_priv, parent_rate)
ad9361_bbpll_recalc_rate = _ad9361_swig.ad9361_bbpll_recalc_rate
def ad9361_bbpll_round_rate(clk_priv, rate, prate):
return _ad9361_swig.ad9361_bbpll_round_rate(clk_priv, rate, prate)
ad9361_bbpll_round_rate = _ad9361_swig.ad9361_bbpll_round_rate
def ad9361_bbpll_set_rate(clk_priv, rate, parent_rate):
return _ad9361_swig.ad9361_bbpll_set_rate(clk_priv, rate, parent_rate)
ad9361_bbpll_set_rate = _ad9361_swig.ad9361_bbpll_set_rate
def ad9361_rfpll_int_recalc_rate(clk_priv, parent_rate):
return _ad9361_swig.ad9361_rfpll_int_recalc_rate(clk_priv, parent_rate)
ad9361_rfpll_int_recalc_rate = _ad9361_swig.ad9361_rfpll_int_recalc_rate
def ad9361_rfpll_int_round_rate(clk_priv, rate, prate):
return _ad9361_swig.ad9361_rfpll_int_round_rate(clk_priv, rate, prate)
ad9361_rfpll_int_round_rate = _ad9361_swig.ad9361_rfpll_int_round_rate
def ad9361_rfpll_int_set_rate(clk_priv, rate, parent_rate):
return _ad9361_swig.ad9361_rfpll_int_set_rate(clk_priv, rate, parent_rate)
ad9361_rfpll_int_set_rate = _ad9361_swig.ad9361_rfpll_int_set_rate
def ad9361_rfpll_dummy_recalc_rate(clk_priv):
return _ad9361_swig.ad9361_rfpll_dummy_recalc_rate(clk_priv)
ad9361_rfpll_dummy_recalc_rate = _ad9361_swig.ad9361_rfpll_dummy_recalc_rate
def ad9361_rfpll_dummy_set_rate(clk_priv, rate):
return _ad9361_swig.ad9361_rfpll_dummy_set_rate(clk_priv, rate)
ad9361_rfpll_dummy_set_rate = _ad9361_swig.ad9361_rfpll_dummy_set_rate
def ad9361_rfpll_recalc_rate(clk_priv):
return _ad9361_swig.ad9361_rfpll_recalc_rate(clk_priv)
ad9361_rfpll_recalc_rate = _ad9361_swig.ad9361_rfpll_recalc_rate
def ad9361_rfpll_round_rate(clk_priv, rate):
return _ad9361_swig.ad9361_rfpll_round_rate(clk_priv, rate)
ad9361_rfpll_round_rate = _ad9361_swig.ad9361_rfpll_round_rate
def ad9361_rfpll_set_rate(clk_priv, rate):
return _ad9361_swig.ad9361_rfpll_set_rate(clk_priv, rate)
ad9361_rfpll_set_rate = _ad9361_swig.ad9361_rfpll_set_rate
def ad9361_clk_mux_set_parent(clk_priv, index):
return _ad9361_swig.ad9361_clk_mux_set_parent(clk_priv, index)
ad9361_clk_mux_set_parent = _ad9361_swig.ad9361_clk_mux_set_parent
def ad9361_tracking_control(phy, bbdc_track, rfdc_track, rxquad_track):
return _ad9361_swig.ad9361_tracking_control(phy, bbdc_track, rfdc_track, rxquad_track)
ad9361_tracking_control = _ad9361_swig.ad9361_tracking_control
def ad9361_bist_loopback(phy, mode):
return _ad9361_swig.ad9361_bist_loopback(phy, mode)
ad9361_bist_loopback = _ad9361_swig.ad9361_bist_loopback
def ad9361_get_bist_loopback(phy):
return _ad9361_swig.ad9361_get_bist_loopback(phy)
ad9361_get_bist_loopback = _ad9361_swig.ad9361_get_bist_loopback
def ad9361_bist_prbs(phy, mode):
return _ad9361_swig.ad9361_bist_prbs(phy, mode)
ad9361_bist_prbs = _ad9361_swig.ad9361_bist_prbs
def ad9361_get_bist_prbs(phy, mode):
return _ad9361_swig.ad9361_get_bist_prbs(phy, mode)
ad9361_get_bist_prbs = _ad9361_swig.ad9361_get_bist_prbs
def ad9361_bist_tone(phy, mode, freq_Hz, level_dB, mask):
return _ad9361_swig.ad9361_bist_tone(phy, mode, freq_Hz, level_dB, mask)
ad9361_bist_tone = _ad9361_swig.ad9361_bist_tone
def ad9361_get_bist_tone(phy, mode, freq_Hz, level_dB, mask):
return _ad9361_swig.ad9361_get_bist_tone(phy, mode, freq_Hz, level_dB, mask)
ad9361_get_bist_tone = _ad9361_swig.ad9361_get_bist_tone
def ad9361_rf_port_setup(phy, is_out, rx_inputs, txb):
return _ad9361_swig.ad9361_rf_port_setup(phy, is_out, rx_inputs, txb)
ad9361_rf_port_setup = _ad9361_swig.ad9361_rf_port_setup
def ad9361_mcs(phy, step):
return _ad9361_swig.ad9361_mcs(phy, step)
ad9361_mcs = _ad9361_swig.ad9361_mcs
def ad9361_do_calib_run(phy, cal, arg):
return _ad9361_swig.ad9361_do_calib_run(phy, cal, arg)
ad9361_do_calib_run = _ad9361_swig.ad9361_do_calib_run
def ad9361_fastlock_store(phy, tx, profile):
return _ad9361_swig.ad9361_fastlock_store(phy, tx, profile)
ad9361_fastlock_store = _ad9361_swig.ad9361_fastlock_store
def ad9361_fastlock_recall(phy, tx, profile):
return _ad9361_swig.ad9361_fastlock_recall(phy, tx, profile)
ad9361_fastlock_recall = _ad9361_swig.ad9361_fastlock_recall
def ad9361_fastlock_load(phy, tx, profile, values):
return _ad9361_swig.ad9361_fastlock_load(phy, tx, profile, values)
ad9361_fastlock_load = _ad9361_swig.ad9361_fastlock_load
def ad9361_fastlock_save(phy, tx, profile, values):
return _ad9361_swig.ad9361_fastlock_save(phy, tx, profile, values)
ad9361_fastlock_save = _ad9361_swig.ad9361_fastlock_save
def ad9361_ensm_force_state(phy, ensm_state):
return _ad9361_swig.ad9361_ensm_force_state(phy, ensm_state)
ad9361_ensm_force_state = _ad9361_swig.ad9361_ensm_force_state
def ad9361_ensm_restore_prev_state(phy):
return _ad9361_swig.ad9361_ensm_restore_prev_state(phy)
ad9361_ensm_restore_prev_state = _ad9361_swig.ad9361_ensm_restore_prev_state
def ad9361_set_trx_clock_chain_freq(phy, freq):
return _ad9361_swig.ad9361_set_trx_clock_chain_freq(phy, freq)
ad9361_set_trx_clock_chain_freq = _ad9361_swig.ad9361_set_trx_clock_chain_freq
def ad9361_find_opt(field, size, ret_start):
return _ad9361_swig.ad9361_find_opt(field, size, ret_start)
ad9361_find_opt = _ad9361_swig.ad9361_find_opt
def ad9361_hdl_loopback(phy, enable):
return _ad9361_swig.ad9361_hdl_loopback(phy, enable)
ad9361_hdl_loopback = _ad9361_swig.ad9361_hdl_loopback
def ad9361_dig_interface_timing_analysis(phy, buf, buflen):
return _ad9361_swig.ad9361_dig_interface_timing_analysis(phy, buf, buflen)
ad9361_dig_interface_timing_analysis = _ad9361_swig.ad9361_dig_interface_timing_analysis
def ad9361_dig_tune(phy, max_freq, flags):
return _ad9361_swig.ad9361_dig_tune(phy, max_freq, flags)
ad9361_dig_tune = _ad9361_swig.ad9361_dig_tune
def ad9361_en_dis_tx(phy, tx_if, enable):
return _ad9361_swig.ad9361_en_dis_tx(phy, tx_if, enable)
ad9361_en_dis_tx = _ad9361_swig.ad9361_en_dis_tx
def ad9361_en_dis_rx(phy, rx_if, enable):
return _ad9361_swig.ad9361_en_dis_rx(phy, rx_if, enable)
ad9361_en_dis_rx = _ad9361_swig.ad9361_en_dis_rx
def ad9361_1rx1tx_channel_map(phy, tx, channel):
return _ad9361_swig.ad9361_1rx1tx_channel_map(phy, tx, channel)
ad9361_1rx1tx_channel_map = _ad9361_swig.ad9361_1rx1tx_channel_map
def ad9361_rssi_gain_step_calib(phy):
return _ad9361_swig.ad9361_rssi_gain_step_calib(phy)
ad9361_rssi_gain_step_calib = _ad9361_swig.ad9361_rssi_gain_step_calib
_ad9361_swig.CF_AD9361_RX_BASEADDR_swigconstant(_ad9361_swig)
CF_AD9361_RX_BASEADDR = _ad9361_swig.CF_AD9361_RX_BASEADDR
_ad9361_swig.CF_AD9361_TX_BASEADDR_swigconstant(_ad9361_swig)
CF_AD9361_TX_BASEADDR = _ad9361_swig.CF_AD9361_TX_BASEADDR
_ad9361_swig.CF_AD9361_RX_DMA_BASEADDR_swigconstant(_ad9361_swig)
CF_AD9361_RX_DMA_BASEADDR = _ad9361_swig.CF_AD9361_RX_DMA_BASEADDR
_ad9361_swig.CF_AD9361_TX_DMA_BASEADDR_swigconstant(_ad9361_swig)
CF_AD9361_TX_DMA_BASEADDR = _ad9361_swig.CF_AD9361_TX_DMA_BASEADDR
_ad9361_swig.ADC_DDR_BASEADDR_swigconstant(_ad9361_swig)
ADC_DDR_BASEADDR = _ad9361_swig.ADC_DDR_BASEADDR
_ad9361_swig.DAC_DDR_BASEADDR_swigconstant(_ad9361_swig)
DAC_DDR_BASEADDR = _ad9361_swig.DAC_DDR_BASEADDR
_ad9361_swig.GPIO_DEVICE_ID_swigconstant(_ad9361_swig)
GPIO_DEVICE_ID = _ad9361_swig.GPIO_DEVICE_ID
_ad9361_swig.GPIO_CHIP_BASE_swigconstant(_ad9361_swig)
GPIO_CHIP_BASE = _ad9361_swig.GPIO_CHIP_BASE
_ad9361_swig.GPIO_RESET_PIN_swigconstant(_ad9361_swig)
GPIO_RESET_PIN = _ad9361_swig.GPIO_RESET_PIN
_ad9361_swig.GPIO_RESET_PIN_2_swigconstant(_ad9361_swig)
GPIO_RESET_PIN_2 = _ad9361_swig.GPIO_RESET_PIN_2
_ad9361_swig.GPIO_SYNC_PIN_swigconstant(_ad9361_swig)
GPIO_SYNC_PIN = _ad9361_swig.GPIO_SYNC_PIN
_ad9361_swig.GPIO_CAL_SW1_PIN_swigconstant(_ad9361_swig)
GPIO_CAL_SW1_PIN = _ad9361_swig.GPIO_CAL_SW1_PIN
_ad9361_swig.GPIO_CAL_SW2_PIN_swigconstant(_ad9361_swig)
GPIO_CAL_SW2_PIN = _ad9361_swig.GPIO_CAL_SW2_PIN
_ad9361_swig.SPI_DEVICE_ID_swigconstant(_ad9361_swig)
SPI_DEVICE_ID = _ad9361_swig.SPI_DEVICE_ID
_ad9361_swig.AD9361_UIO_DEV_swigconstant(_ad9361_swig)
AD9361_UIO_DEV = _ad9361_swig.AD9361_UIO_DEV
_ad9361_swig.AD9361_UIO_SIZE_swigconstant(_ad9361_swig)
AD9361_UIO_SIZE = _ad9361_swig.AD9361_UIO_SIZE
_ad9361_swig.AD9361_UIO_ADDR_swigconstant(_ad9361_swig)
AD9361_UIO_ADDR = _ad9361_swig.AD9361_UIO_ADDR
_ad9361_swig.RX_DMA_UIO_DEV_swigconstant(_ad9361_swig)
RX_DMA_UIO_DEV = _ad9361_swig.RX_DMA_UIO_DEV
_ad9361_swig.RX_DMA_UIO_SIZE_swigconstant(_ad9361_swig)
RX_DMA_UIO_SIZE = _ad9361_swig.RX_DMA_UIO_SIZE
_ad9361_swig.RX_DMA_UIO_ADDR_swigconstant(_ad9361_swig)
RX_DMA_UIO_ADDR = _ad9361_swig.RX_DMA_UIO_ADDR
_ad9361_swig.RX_BUFF_MEM_SIZE_swigconstant(_ad9361_swig)
RX_BUFF_MEM_SIZE = _ad9361_swig.RX_BUFF_MEM_SIZE
_ad9361_swig.RX_BUFF_MEM_ADDR_swigconstant(_ad9361_swig)
RX_BUFF_MEM_ADDR = _ad9361_swig.RX_BUFF_MEM_ADDR
_ad9361_swig.TX_DMA_UIO_DEV_swigconstant(_ad9361_swig)
TX_DMA_UIO_DEV = _ad9361_swig.TX_DMA_UIO_DEV
_ad9361_swig.TX_DMA_UIO_SIZE_swigconstant(_ad9361_swig)
TX_DMA_UIO_SIZE = _ad9361_swig.TX_DMA_UIO_SIZE
_ad9361_swig.TX_DMA_UIO_ADDR_swigconstant(_ad9361_swig)
TX_DMA_UIO_ADDR = _ad9361_swig.TX_DMA_UIO_ADDR
_ad9361_swig.TX_BUFF_MEM_SIZE_swigconstant(_ad9361_swig)
TX_BUFF_MEM_SIZE = _ad9361_swig.TX_BUFF_MEM_SIZE
_ad9361_swig.TX_BUFF_MEM_ADDR_swigconstant(_ad9361_swig)
TX_BUFF_MEM_ADDR = _ad9361_swig.TX_BUFF_MEM_ADDR
_ad9361_swig.SPIDEV_DEV_swigconstant(_ad9361_swig)
SPIDEV_DEV = _ad9361_swig.SPIDEV_DEV
_ad9361_swig.AD9361_B_UIO_DEV_swigconstant(_ad9361_swig)
AD9361_B_UIO_DEV = _ad9361_swig.AD9361_B_UIO_DEV
_ad9361_swig.AD9361_B_UIO_SIZE_swigconstant(_ad9361_swig)
AD9361_B_UIO_SIZE = _ad9361_swig.AD9361_B_UIO_SIZE
_ad9361_swig.AD9361_B_UIO_ADDR_swigconstant(_ad9361_swig)
AD9361_B_UIO_ADDR = _ad9361_swig.AD9361_B_UIO_ADDR
_ad9361_swig.SPIDEV_B_DEV_swigconstant(_ad9361_swig)
SPIDEV_B_DEV = _ad9361_swig.SPIDEV_B_DEV
[docs]class device(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, device, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, device, name)
__repr__ = _swig_repr
def __init__(self):
this = _ad9361_swig.new_device()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_device
__del__ = lambda self: None
device_swigregister = _ad9361_swig.device_swigregister
device_swigregister(device)
[docs]class spi_device(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, spi_device, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, spi_device, name)
__repr__ = _swig_repr
__swig_setmethods__["dev"] = _ad9361_swig.spi_device_dev_set
__swig_getmethods__["dev"] = _ad9361_swig.spi_device_dev_get
if _newclass:
dev = _swig_property(_ad9361_swig.spi_device_dev_get, _ad9361_swig.spi_device_dev_set)
__swig_setmethods__["id_no"] = _ad9361_swig.spi_device_id_no_set
__swig_getmethods__["id_no"] = _ad9361_swig.spi_device_id_no_get
if _newclass:
id_no = _swig_property(_ad9361_swig.spi_device_id_no_get, _ad9361_swig.spi_device_id_no_set)
def __init__(self):
this = _ad9361_swig.new_spi_device()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_spi_device
__del__ = lambda self: None
spi_device_swigregister = _ad9361_swig.spi_device_swigregister
spi_device_swigregister(spi_device)
[docs]class axiadc_state(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, axiadc_state, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, axiadc_state, name)
__repr__ = _swig_repr
__swig_setmethods__["phy"] = _ad9361_swig.axiadc_state_phy_set
__swig_getmethods__["phy"] = _ad9361_swig.axiadc_state_phy_get
if _newclass:
phy = _swig_property(_ad9361_swig.axiadc_state_phy_get, _ad9361_swig.axiadc_state_phy_set)
__swig_setmethods__["pcore_version"] = _ad9361_swig.axiadc_state_pcore_version_set
__swig_getmethods__["pcore_version"] = _ad9361_swig.axiadc_state_pcore_version_get
if _newclass:
pcore_version = _swig_property(_ad9361_swig.axiadc_state_pcore_version_get, _ad9361_swig.axiadc_state_pcore_version_set)
def __init__(self):
this = _ad9361_swig.new_axiadc_state()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_axiadc_state
__del__ = lambda self: None
axiadc_state_swigregister = _ad9361_swig.axiadc_state_swigregister
axiadc_state_swigregister(axiadc_state)
[docs]class axiadc_chip_info(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, axiadc_chip_info, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, axiadc_chip_info, name)
__repr__ = _swig_repr
__swig_setmethods__["name"] = _ad9361_swig.axiadc_chip_info_name_set
__swig_getmethods__["name"] = _ad9361_swig.axiadc_chip_info_name_get
if _newclass:
name = _swig_property(_ad9361_swig.axiadc_chip_info_name_get, _ad9361_swig.axiadc_chip_info_name_set)
__swig_setmethods__["num_channels"] = _ad9361_swig.axiadc_chip_info_num_channels_set
__swig_getmethods__["num_channels"] = _ad9361_swig.axiadc_chip_info_num_channels_get
if _newclass:
num_channels = _swig_property(_ad9361_swig.axiadc_chip_info_num_channels_get, _ad9361_swig.axiadc_chip_info_num_channels_set)
__swig_setmethods__["max_rate"] = _ad9361_swig.axiadc_chip_info_max_rate_set
__swig_getmethods__["max_rate"] = _ad9361_swig.axiadc_chip_info_max_rate_get
if _newclass:
max_rate = _swig_property(_ad9361_swig.axiadc_chip_info_max_rate_get, _ad9361_swig.axiadc_chip_info_max_rate_set)
def __init__(self):
this = _ad9361_swig.new_axiadc_chip_info()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_axiadc_chip_info
__del__ = lambda self: None
axiadc_chip_info_swigregister = _ad9361_swig.axiadc_chip_info_swigregister
axiadc_chip_info_swigregister(axiadc_chip_info)
[docs]class axiadc_converter(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, axiadc_converter, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, axiadc_converter, name)
__repr__ = _swig_repr
__swig_setmethods__["chip_info"] = _ad9361_swig.axiadc_converter_chip_info_set
__swig_getmethods__["chip_info"] = _ad9361_swig.axiadc_converter_chip_info_get
if _newclass:
chip_info = _swig_property(_ad9361_swig.axiadc_converter_chip_info_get, _ad9361_swig.axiadc_converter_chip_info_set)
__swig_setmethods__["scratch_reg"] = _ad9361_swig.axiadc_converter_scratch_reg_set
__swig_getmethods__["scratch_reg"] = _ad9361_swig.axiadc_converter_scratch_reg_get
if _newclass:
scratch_reg = _swig_property(_ad9361_swig.axiadc_converter_scratch_reg_get, _ad9361_swig.axiadc_converter_scratch_reg_set)
def __init__(self):
this = _ad9361_swig.new_axiadc_converter()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_axiadc_converter
__del__ = lambda self: None
axiadc_converter_swigregister = _ad9361_swig.axiadc_converter_swigregister
axiadc_converter_swigregister(axiadc_converter)
[docs]class clk(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, clk, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, clk, name)
__repr__ = _swig_repr
__swig_setmethods__["name"] = _ad9361_swig.clk_name_set
__swig_getmethods__["name"] = _ad9361_swig.clk_name_get
if _newclass:
name = _swig_property(_ad9361_swig.clk_name_get, _ad9361_swig.clk_name_set)
__swig_setmethods__["rate"] = _ad9361_swig.clk_rate_set
__swig_getmethods__["rate"] = _ad9361_swig.clk_rate_get
if _newclass:
rate = _swig_property(_ad9361_swig.clk_rate_get, _ad9361_swig.clk_rate_set)
def __init__(self):
this = _ad9361_swig.new_clk()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_clk
__del__ = lambda self: None
clk_swigregister = _ad9361_swig.clk_swigregister
clk_swigregister(clk)
[docs]class clk_hw(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, clk_hw, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, clk_hw, name)
__repr__ = _swig_repr
__swig_setmethods__["clk"] = _ad9361_swig.clk_hw_clk_set
__swig_getmethods__["clk"] = _ad9361_swig.clk_hw_clk_get
if _newclass:
clk = _swig_property(_ad9361_swig.clk_hw_clk_get, _ad9361_swig.clk_hw_clk_set)
def __init__(self):
this = _ad9361_swig.new_clk_hw()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_clk_hw
__del__ = lambda self: None
clk_hw_swigregister = _ad9361_swig.clk_hw_swigregister
clk_hw_swigregister(clk_hw)
[docs]class clk_init_data(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, clk_init_data, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, clk_init_data, name)
__repr__ = _swig_repr
__swig_setmethods__["name"] = _ad9361_swig.clk_init_data_name_set
__swig_getmethods__["name"] = _ad9361_swig.clk_init_data_name_get
if _newclass:
name = _swig_property(_ad9361_swig.clk_init_data_name_get, _ad9361_swig.clk_init_data_name_set)
__swig_setmethods__["ops"] = _ad9361_swig.clk_init_data_ops_set
__swig_getmethods__["ops"] = _ad9361_swig.clk_init_data_ops_get
if _newclass:
ops = _swig_property(_ad9361_swig.clk_init_data_ops_get, _ad9361_swig.clk_init_data_ops_set)
__swig_setmethods__["parent_names"] = _ad9361_swig.clk_init_data_parent_names_set
__swig_getmethods__["parent_names"] = _ad9361_swig.clk_init_data_parent_names_get
if _newclass:
parent_names = _swig_property(_ad9361_swig.clk_init_data_parent_names_get, _ad9361_swig.clk_init_data_parent_names_set)
__swig_setmethods__["num_parents"] = _ad9361_swig.clk_init_data_num_parents_set
__swig_getmethods__["num_parents"] = _ad9361_swig.clk_init_data_num_parents_get
if _newclass:
num_parents = _swig_property(_ad9361_swig.clk_init_data_num_parents_get, _ad9361_swig.clk_init_data_num_parents_set)
__swig_setmethods__["flags"] = _ad9361_swig.clk_init_data_flags_set
__swig_getmethods__["flags"] = _ad9361_swig.clk_init_data_flags_get
if _newclass:
flags = _swig_property(_ad9361_swig.clk_init_data_flags_get, _ad9361_swig.clk_init_data_flags_set)
def __init__(self):
this = _ad9361_swig.new_clk_init_data()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_clk_init_data
__del__ = lambda self: None
clk_init_data_swigregister = _ad9361_swig.clk_init_data_swigregister
clk_init_data_swigregister(clk_init_data)
[docs]class clk_onecell_data(_object):
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, clk_onecell_data, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, clk_onecell_data, name)
__repr__ = _swig_repr
__swig_setmethods__["clks"] = _ad9361_swig.clk_onecell_data_clks_set
__swig_getmethods__["clks"] = _ad9361_swig.clk_onecell_data_clks_get
if _newclass:
clks = _swig_property(_ad9361_swig.clk_onecell_data_clks_get, _ad9361_swig.clk_onecell_data_clks_set)
__swig_setmethods__["clk_num"] = _ad9361_swig.clk_onecell_data_clk_num_set
__swig_getmethods__["clk_num"] = _ad9361_swig.clk_onecell_data_clk_num_get
if _newclass:
clk_num = _swig_property(_ad9361_swig.clk_onecell_data_clk_num_get, _ad9361_swig.clk_onecell_data_clk_num_set)
def __init__(self):
this = _ad9361_swig.new_clk_onecell_data()
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _ad9361_swig.delete_clk_onecell_data
__del__ = lambda self: None
clk_onecell_data_swigregister = _ad9361_swig.clk_onecell_data_swigregister
clk_onecell_data_swigregister(clk_onecell_data)
# This file is compatible with both classic and new-style classes.